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Lin" , Sean Paul , Jason Chen , Fei Shao , , , , , Hsiao Chien Sung Subject: [PATCH v9 05/21] drm/mediatek: Set DRM mode configs accordingly Date: Fri, 14 Jun 2024 10:46:04 +0800 Message-ID: <20240614024620.19011-6-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240614024620.19011-1-shawn.sung@mediatek.com> References: <20240614024620.19011-1-shawn.sung@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Hsiao Chien Sung Set DRM mode configs limitation according to the hardware capabilities and pass the IGT checks as below: - The test "graphics.IgtKms.kms_plane" requires a frame buffer with width of 4512 pixels (> 4096). - The test "graphics.IgtKms.kms_cursor_crc" checks if the cursor size is defined, and run the test with cursor size from 1x1 to 512x512. Please notice that the test conditions may change as IGT is updated. Reviewed-by: CK Hu Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.h | 4 ++++ 2 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/media= tek/mtk_drm_drv.c index 34d1a3aacde5..3737180e1e53 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -298,6 +298,9 @@ static const struct mtk_mmsys_driver_data mt8188_vdosys= 0_driver_data =3D { .conn_routes =3D mt8188_mtk_ddp_main_routes, .num_conn_routes =3D ARRAY_SIZE(mt8188_mtk_ddp_main_routes), .mmsys_dev_num =3D 2, + .max_width =3D 8191, + .min_width =3D 1, + .min_height =3D 1, }; =20 static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data =3D { @@ -312,6 +315,9 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys= 0_driver_data =3D { .main_path =3D mt8195_mtk_ddp_main, .main_len =3D ARRAY_SIZE(mt8195_mtk_ddp_main), .mmsys_dev_num =3D 2, + .max_width =3D 8191, + .min_width =3D 1, + .min_height =3D 1, }; =20 static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data =3D { @@ -319,6 +325,9 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys= 1_driver_data =3D { .ext_len =3D ARRAY_SIZE(mt8195_mtk_ddp_ext), .mmsys_id =3D 1, .mmsys_dev_num =3D 2, + .max_width =3D 8191, + .min_width =3D 2, /* 2-pixel align when ethdr is bypassed */ + .min_height =3D 1, }; =20 static const struct of_device_id mtk_drm_of_ids[] =3D { @@ -497,6 +506,15 @@ static int mtk_drm_kms_init(struct drm_device *drm) for (j =3D 0; j < private->data->mmsys_dev_num; j++) { priv_n =3D private->all_drm_private[j]; =20 + if (priv_n->data->max_width) + drm->mode_config.max_width =3D priv_n->data->max_width; + + if (priv_n->data->min_width) + drm->mode_config.min_width =3D priv_n->data->min_width; + + if (priv_n->data->min_height) + drm->mode_config.min_height =3D priv_n->data->min_height; + if (i =3D=3D CRTC_MAIN && priv_n->data->main_len) { ret =3D mtk_crtc_create(drm, priv_n->data->main_path, priv_n->data->main_len, j, @@ -524,6 +542,10 @@ static int mtk_drm_kms_init(struct drm_device *drm) } } =20 + /* IGT will check if the cursor size is configured */ + drm->mode_config.cursor_width =3D drm->mode_config.max_width; + drm->mode_config.cursor_height =3D drm->mode_config.max_height; + /* Use OVL device for all DMA memory allocations */ crtc =3D drm_crtc_from_index(drm, 0); if (crtc) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/media= tek/mtk_drm_drv.h index 78d698ede1bf..ce897984de51 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -46,6 +46,10 @@ struct mtk_mmsys_driver_data { bool shadow_register; unsigned int mmsys_id; unsigned int mmsys_dev_num; + + u16 max_width; + u16 min_width; + u16 min_height; }; =20 struct mtk_drm_private { --=20 2.18.0