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Lin" , Sean Paul , Jason Chen , Fei Shao , , , , , Hsiao Chien Sung Subject: [PATCH v9 12/21] drm/mediatek: Support DRM plane alpha in OVL Date: Fri, 14 Jun 2024 10:46:11 +0800 Message-ID: <20240614024620.19011-13-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240614024620.19011-1-shawn.sung@mediatek.com> References: <20240614024620.19011-1-shawn.sung@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Hsiao Chien Sung Set the plane alpha according to DRM plane property. Signed-off-by: Hsiao Chien Sung Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/medi= atek/mtk_disp_ovl.c index 1923bbd96014..2316d4a6dca7 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -450,8 +450,10 @@ void mtk_ovl_layer_config(struct device *dev, unsigned= int idx, } =20 con =3D ovl_fmt_convert(ovl, fmt); - if (state->base.fb && state->base.fb->format->has_alpha) - con |=3D OVL_CON_AEN | OVL_CON_ALPHA; + if (state->base.fb) { + con |=3D OVL_CON_AEN; + con |=3D state->base.alpha & OVL_CON_ALPHA; + } =20 /* CONST_BLD must be enabled for XRGB formats although the alpha channel * can be ignored, or OVL will still read the value from memory. --=20 2.18.0