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Thu, 13 Jun 2024 12:41:37 -0400 (EDT) From: Jiaxun Yang Date: Thu, 13 Jun 2024 17:41:34 +0100 Subject: [PATCH 1/2] LoongArch: Initialise unused Direct Map Windows Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240613-loongarch64-sleep-v1-1-a245232af5e4@flygoat.com> References: <20240613-loongarch64-sleep-v1-0-a245232af5e4@flygoat.com> In-Reply-To: <20240613-loongarch64-sleep-v1-0-a245232af5e4@flygoat.com> To: Huacai Chen , WANG Xuerui Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, Jiaxun Yang , stable@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4178; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=ylvLQTm7lYYDCejRFR9lGTs7S0TaD9j4Be9Usi3hi2E=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrRsRXulqIc/r5r375CtTP+85PpRxsoVgccWv2DmFvj0V Ex2Wx9TRykLgxgXg6yYIkuIgFLfhsaLC64/yPoDM4eVCWQIAxenAExk5w5Gho9Hfy7vT+I0Pi6W sSMs4p3V2k8fJETOxoTPnnHwUo/Zui6Gf4auM51U1X+JPfx6SLxK+s6y8pKG0o8nn+qwrX+uFK2 rzgoA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 DMW 2 & 3 are unused by kernel, however firmware may leave garbage in them and interfere kernel's address mapping. Clear them as necessary. Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang --- arch/loongarch/include/asm/loongarch.h | 4 ++++ arch/loongarch/include/asm/stackframe.h | 11 +++++++++++ arch/loongarch/kernel/head.S | 12 ++---------- arch/loongarch/power/suspend_asm.S | 6 +----- drivers/firmware/efi/libstub/loongarch.c | 2 ++ 5 files changed, 20 insertions(+), 15 deletions(-) diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/includ= e/asm/loongarch.h index eb09adda54b7..3720096efcf9 100644 --- a/arch/loongarch/include/asm/loongarch.h +++ b/arch/loongarch/include/asm/loongarch.h @@ -889,6 +889,10 @@ #define CSR_DMW1_BASE (CSR_DMW1_VSEG << DMW_PABITS) #define CSR_DMW1_INIT (CSR_DMW1_BASE | CSR_DMW1_MAT | CSR_DMW1_PLV0) =20 +/* Direct Map window 2/3 - unused */ +#define CSR_DMW2_INIT 0 +#define CSR_DMW3_INIT 0 + /* Performance Counter registers */ #define LOONGARCH_CSR_PERFCTRL0 0x200 /* 32 perf event 0 config */ #define LOONGARCH_CSR_PERFCNTR0 0x201 /* 64 perf event 0 count value */ diff --git a/arch/loongarch/include/asm/stackframe.h b/arch/loongarch/inclu= de/asm/stackframe.h index d9eafd3ee3d1..10c5dcf56bc7 100644 --- a/arch/loongarch/include/asm/stackframe.h +++ b/arch/loongarch/include/asm/stackframe.h @@ -38,6 +38,17 @@ cfi_restore \reg \offset \docfi .endm =20 + .macro SETUP_DMWS temp1 + li.d \temp1, CSR_DMW0_INIT + csrwr \temp1, LOONGARCH_CSR_DMWIN0 + li.d \temp1, CSR_DMW1_INIT + csrwr \temp1, LOONGARCH_CSR_DMWIN1 + li.d \temp1, CSR_DMW2_INIT + csrwr \temp1, LOONGARCH_CSR_DMWIN2 + li.d \temp1, CSR_DMW3_INIT + csrwr \temp1, LOONGARCH_CSR_DMWIN3 + .endm + /* Jump to the runtime virtual address. */ .macro JUMP_VIRT_ADDR temp1 temp2 li.d \temp1, CACHE_BASE diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S index 4677ea8fa8e9..1a71fc09bfd6 100644 --- a/arch/loongarch/kernel/head.S +++ b/arch/loongarch/kernel/head.S @@ -44,11 +44,7 @@ SYM_DATA(kernel_fsize, .long _kernel_fsize); SYM_CODE_START(kernel_entry) # kernel entry point =20 /* Config direct window and set PG */ - li.d t0, CSR_DMW0_INIT # UC, PLV0, 0x8000 xxxx xxxx xxxx - csrwr t0, LOONGARCH_CSR_DMWIN0 - li.d t0, CSR_DMW1_INIT # CA, PLV0, 0x9000 xxxx xxxx xxxx - csrwr t0, LOONGARCH_CSR_DMWIN1 - + SETUP_DMWS t0 JUMP_VIRT_ADDR t0, t1 =20 /* Enable PG */ @@ -124,11 +120,7 @@ SYM_CODE_END(kernel_entry) * function after setting up the stack and tp registers. */ SYM_CODE_START(smpboot_entry) - li.d t0, CSR_DMW0_INIT # UC, PLV0 - csrwr t0, LOONGARCH_CSR_DMWIN0 - li.d t0, CSR_DMW1_INIT # CA, PLV0 - csrwr t0, LOONGARCH_CSR_DMWIN1 - + SETUP_DMWS t0 JUMP_VIRT_ADDR t0, t1 =20 #ifdef CONFIG_PAGE_SIZE_4KB diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/susp= end_asm.S index e2fc3b4e31f0..6fdd74eb219b 100644 --- a/arch/loongarch/power/suspend_asm.S +++ b/arch/loongarch/power/suspend_asm.S @@ -73,11 +73,7 @@ SYM_FUNC_START(loongarch_suspend_enter) * Reload all of the registers and return. */ SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL) - li.d t0, CSR_DMW0_INIT # UC, PLV0 - csrwr t0, LOONGARCH_CSR_DMWIN0 - li.d t0, CSR_DMW1_INIT # CA, PLV0 - csrwr t0, LOONGARCH_CSR_DMWIN1 - + SETUP_DMWS t0 JUMP_VIRT_ADDR t0, t1 =20 /* Enable PG */ diff --git a/drivers/firmware/efi/libstub/loongarch.c b/drivers/firmware/ef= i/libstub/loongarch.c index d0ef93551c44..3782d0a187d1 100644 --- a/drivers/firmware/efi/libstub/loongarch.c +++ b/drivers/firmware/efi/libstub/loongarch.c @@ -74,6 +74,8 @@ efi_status_t efi_boot_kernel(void *handle, efi_loaded_ima= ge_t *image, /* Config Direct Mapping */ csr_write64(CSR_DMW0_INIT, LOONGARCH_CSR_DMWIN0); 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Thu, 13 Jun 2024 12:41:39 -0400 (EDT) From: Jiaxun Yang Date: Thu, 13 Jun 2024 17:41:35 +0100 Subject: [PATCH 2/2] LoongArch: Fix ACPI standard register based S3 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240613-loongarch64-sleep-v1-2-a245232af5e4@flygoat.com> References: <20240613-loongarch64-sleep-v1-0-a245232af5e4@flygoat.com> In-Reply-To: <20240613-loongarch64-sleep-v1-0-a245232af5e4@flygoat.com> To: Huacai Chen , WANG Xuerui Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, Jiaxun Yang , stable@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2868; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=YmkuZ5nOlN7lTRobe6yTymBK842DdK3E0zbosM2LIRM=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrRsRftNZkdPzC62P7/Hdrq3+TL33KMK76vaPvKKe65vC K97Wnm3o5SFQYyLQVZMkSVEQKlvQ+PFBdcfZP2BmcPKBDKEgYtTACYSHsHw3/PO7o7LyTuEvj/d 9+1DXqMdy/73nVe/nvn780+2jjDH38OMDLMend1h4nfmyq3MzE+bOJ3540Nbe/2zbzdZNywQZw3 xZgEA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Most LoongArch 64 machines are using custom "SADR" ACPI extension to perform ACPI S3 sleep. However the standard ACPI way to perform sleep is to write a value to ACPI PM1/SLEEP_CTL register, and this is never supported properly in kernel. Fix standard S3 sleep by providing a fallback DoSuspend function which calls ACPI's acpi_enter_sleep_state routine when SADR is not provided by the firmware. Also fix suspend assembly code so that ra is set properly before go into sleep routine. (Previously linked address of jirl was set to a0, some firmware do require return address in a0 but it's already set with la.pcrel before). Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang --- arch/loongarch/power/platform.c | 24 ++++++++++++++++++------ arch/loongarch/power/suspend_asm.S | 2 +- 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platfor= m.c index 3ea8e07aa225..2aea41f8e3ff 100644 --- a/arch/loongarch/power/platform.c +++ b/arch/loongarch/power/platform.c @@ -34,22 +34,34 @@ void enable_pci_wakeup(void) acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0); } =20 +static void acpi_suspend_register_fallback(void) +{ + acpi_enter_sleep_state(ACPI_STATE_S3); +} + static int __init loongson3_acpi_suspend_init(void) { #ifdef CONFIG_ACPI acpi_status status; uint64_t suspend_addr =3D 0; =20 - if (acpi_disabled || acpi_gbl_reduced_hardware) + if (acpi_disabled) return 0; =20 - acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1); + if (!acpi_sleep_state_supported(ACPI_STATE_S3)) + return 0; + + if (!acpi_gbl_reduced_hardware) + acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1); + status =3D acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr); - if (ACPI_FAILURE(status) || !suspend_addr) { - pr_err("ACPI S3 is not support!\n"); - return -1; + if (!ACPI_FAILURE(status) && suspend_addr) { + loongson_sysconf.suspend_addr =3D (u64)phys_to_virt(PHYSADDR(suspend_add= r)); + return 0; } - loongson_sysconf.suspend_addr =3D (u64)phys_to_virt(PHYSADDR(suspend_addr= )); + + pr_info("ACPI S3 supported with hw register fallback\n"); + loongson_sysconf.suspend_addr =3D (u64)acpi_suspend_register_fallback; #endif return 0; } diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/susp= end_asm.S index 6fdd74eb219b..fe08dbb73c87 100644 --- a/arch/loongarch/power/suspend_asm.S +++ b/arch/loongarch/power/suspend_asm.S @@ -66,7 +66,7 @@ SYM_FUNC_START(loongarch_suspend_enter) la.pcrel a0, loongarch_wakeup_start la.pcrel t0, loongarch_suspend_addr ld.d t0, t0, 0 - jirl a0, t0, 0 /* Call BIOS's STR sleep routine */ + jirl ra, t0, 0 /* Call BIOS's STR sleep routine */ =20 /* * This is where we return upon wakeup. --=20 2.43.0