From nobody Wed Dec 17 11:35:01 2025 Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D37D184A30 for ; Wed, 12 Jun 2024 19:55:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.60.130.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718222154; cv=none; b=Ro6BzwjV3qEVlx934Lit6RmobZutUwZBZgnaYscVSB6cje3DN1ZEpBJl2gTE19D8lMxWHwKlgRdLn/mJt8jFdkov51ioNoefPFNmymm3H9oLg5GPA4ZCdOT5kNsjUnj7ErIQus2Ks68S2jXIInI7TrN71IppQhI3dVUlUcV1QGs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718222154; c=relaxed/simple; bh=uKeP+wAXni5MOUXsaMG406PdThCXm4RY4vNFb5fsM8o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=VhQGLCWk04/g5Z2EfUQRYTm8KuOzLS7aBNJ3GMwppWBAOY4aK/52n9TnjmxugE4TKXsFWrB8oLsZRSREPohnGUXQ5VjXXI+l0nSW7+7Dn1HS3eqYDX2IBMPxInxtH+Z2DHA1ondstFQtYKfXZMR0okWAFyfZjbCE7IoNaQ4meqI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=Z1DlfMwK; arc=none smtp.client-ip=178.60.130.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="Z1DlfMwK" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=z9r8+zo+4FzJ8W7BNm4EVq7tJIuBmkd8YYzubry2x7c=; b=Z1DlfMwKkSBovovn64D05AzEnZ /SnVdz89JrylCVzuIYa5F8K6Sl2Yt9/SfVMSy6knCuAh5i/reWDzNUhxSPkmLzwF5MdKGVcnp7wK5 GkNk49vAMrUhPVUIuxiUG81dZNR3ZIoaQDF26XdwkO/Nfw81lnAEGkzZcqhUhP1BXdUeJukUaitEg /1Q/EYbMohJRxIPVOISW6XfAvp7BcKx56/BNMypc2j9GNd1/0O8oS9PBPVsFwBbAR3mykSkgSCK5b 9hAUnBVf9kVSpFjiRLex5w94ZxtzdjiQrMsuOTfnjH1w5r1Z/U5n61IoKBovTQeBxo4kHMf0E5kAe mFWRNvsg==; Received: from [191.204.194.169] (helo=localhost.localdomain) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1sHTml-002RtF-14; Wed, 12 Jun 2024 21:37:31 +0200 From: =?UTF-8?q?Andr=C3=A9=20Almeida?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: kernel-dev@igalia.com, alexander.deucher@amd.com, christian.koenig@amd.com, Simon Ser , Pekka Paalanen , daniel@ffwll.ch, Daniel Stone , =?UTF-8?q?=27Marek=20Ol=C5=A1=C3=A1k=27?= , Dave Airlie , ville.syrjala@linux.intel.com, Xaver Hugl , Joshua Ashton , =?UTF-8?q?Michel=20D=C3=A4nzer?= , =?UTF-8?q?Andr=C3=A9=20Almeida?= Subject: [PATCH v5 2/3] drm: Allow drivers to choose plane types to async flip Date: Wed, 12 Jun 2024 16:37:12 -0300 Message-ID: <20240612193713.167448-3-andrealmeid@igalia.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240612193713.167448-1-andrealmeid@igalia.com> References: <20240612193713.167448-1-andrealmeid@igalia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Different planes may have different capabilities of doing async flips, so create a field to let drivers allow async flip per plane type. Signed-off-by: Andr=C3=A9 Almeida --- drivers/gpu/drm/drm_atomic_uapi.c | 4 ++-- drivers/gpu/drm/drm_plane.c | 3 +++ include/drm/drm_plane.h | 5 +++++ 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic= _uapi.c index 2e1d9391febe..dd4b1578f141 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -1079,9 +1079,9 @@ int drm_atomic_set_property(struct drm_atomic_state *= state, break; } =20 - if (async_flip && plane_state->plane->type !=3D DRM_PLANE_TYPE_PRIMARY) { + if (async_flip && !plane_state->plane->async_flip) { drm_dbg_atomic(prop->dev, - "[OBJECT:%d] Only primary planes can be changed during async fl= ip\n", + "[OBJECT:%d] This type of plane cannot be changed during async = flip\n", obj->id); ret =3D -EINVAL; break; diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index 57662a1fd345..bbcec3940636 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -385,6 +385,9 @@ static int __drm_universal_plane_init(struct drm_device= *dev, =20 drm_modeset_lock_init(&plane->mutex); =20 + if (type =3D=3D DRM_PLANE_TYPE_PRIMARY) + plane->async_flip =3D true; + plane->base.properties =3D &plane->properties; plane->dev =3D dev; plane->funcs =3D funcs; diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index 9507542121fa..0bebc72af5c3 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -786,6 +786,11 @@ struct drm_plane { * @kmsg_panic: Used to register a panic notifier for this plane */ struct kmsg_dumper kmsg_panic; + + /** + * @async_flip: indicates if a plane can do async flips + */ + bool async_flip; }; =20 #define obj_to_plane(x) container_of(x, struct drm_plane, base) --=20 2.45.2