From nobody Thu Feb 12 14:10:04 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B12A16F901; Wed, 12 Jun 2024 11:23:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718191413; cv=none; b=WcQv7AT7xvbj/4P4an6tkAizr7aTkP729LGW+Boj9GGL8MKeZfiVgiXE8L7MhZ91qC7RpXEHiAFQKnSrTY6ab980w8zs2bmM+Ik59DqmlhZQYB32bPNLE1i2j3zrXZE77yr4mPRbqgVO0beKQ9x72sQ2tojXZvDsUbnnBdtpilU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718191413; c=relaxed/simple; bh=eOM+rlNe4Ccmiqqj78VRC7CbyAJhediEgq9+gqUJt5c=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=t9NbLKCPtSgxLcBbDS1KEj452gXpPCA0Yq03mW77pcD3iKtgHYlhjeV6t77KpejJDXzrIgBuiUZY9UY7DHlynCjEN1RFwHoVPPXnuwfyPAT4Hq6RDiUAa+c3dPwiRT1xvqMQv4+7C4asWJS3g2qWvfmMZY6RZMmrjMigAAH1Zxo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=ly4XYAeX; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="ly4XYAeX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1718191412; x=1749727412; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eOM+rlNe4Ccmiqqj78VRC7CbyAJhediEgq9+gqUJt5c=; b=ly4XYAeXU368ABooJbncngtIeO6etP3CVj343H5xygIAYlG2AzYgn+a6 vcfAEyVMPjwIKCChRBMyu3hp3Fy4VLifZI1sWvtvoYET5stlPs6YV38TJ arYpf5Rb6qIHK6tP4sfXdeTXKyGm1N12MpC97ZxHGMLook8kn3u02HLal s5Z5BPVK0uHzLf1+48CUuriQzpfsiiy1Z/4fGmYe6mr7ipcFzydFXFw2n TE8aiSJH4oCoB8/2E3ve0xYBg7izvr+SnwXobGKnbepJlmvGlN8HppdoK SEpZjyhVU7lbJnvSH4klUAO3jG/3mFzkrVHmA4VM/4+3x0FYapps5G/zl g==; X-CSE-ConnectionGUID: hzPuRHFvRM+Wy8rrRTyffQ== X-CSE-MsgGUID: jgaw45dBQPqiWppOjWLXvQ== X-IronPort-AV: E=Sophos;i="6.08,233,1712646000"; d="scan'208";a="29761713" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 Jun 2024 04:23:23 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Wed, 12 Jun 2024 04:22:52 -0700 Received: from daire-X570.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Wed, 12 Jun 2024 04:22:49 -0700 From: To: , CC: , , , , , , , , , Subject: [PATCH v3 3/3] dt-bindings: PCI: microchip,pcie-host: allow dma-noncoherent Date: Wed, 12 Jun 2024 12:22:13 +0100 Message-ID: <20240612112213.2734748-4-daire.mcnamara@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240612112213.2734748-1-daire.mcnamara@microchip.com> References: <20240612112213.2734748-1-daire.mcnamara@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley PolarFire SoC may be configured in a way that requires non-coherent DMA handling. On RISC-V, buses are coherent by default & the dma-noncoherent property is required to denote buses or devices that are non-coherent. Signed-off-by: Conor Dooley Signed-off-by: Daire McNamara Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml= b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml index f7a3c2636355..c84e1ae20532 100644 --- a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml @@ -52,6 +52,8 @@ properties: items: pattern: '^fic[0-3]$' =20 + dma-noncoherent: true + interrupts: minItems: 1 items: --=20 2.34.1