From nobody Thu Feb 12 17:28:58 2026 Received: from SE2P216CU007.outbound.protection.outlook.com (mail-koreacentralazon11020003.outbound.protection.outlook.com [52.101.154.3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A7095172BD5; Tue, 11 Jun 2024 07:15:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.154.3 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718090124; cv=fail; b=enyl51fz0Rq9lEh3jkj/bW9+hbkf2sdPDxnt/gQ0HBtVstSY8e9W8Gh1NzaNOR0DymWsBWoR+GFURSz+cs4+NJxQm4eL31m8fXMzstVGzb1XiGfeq/PQNL0z/RJ3NNx+YB1qSZUtaDBJUnZz1EDojuQcqfTbPSu6rO1jF4goznQ= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718090124; c=relaxed/simple; bh=m66wow6D8ksolIHJBfC5trVFgEfm7TlZXlRPzugrWkE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Content-Type:MIME-Version; b=VcU1deS2D2YFqFGBNq6wod3l0YxrLc3bRun6LZlrK6kc2s88sEevei8d6gZ7wu4ka7mWLprv9egZGjaHdT2+swmOBwCebsFb5/+ZKobQ45SRf0Wf7N9GRknZvcgJz/vVQG2hwyLAOTQaVZ71pB023gdFWDxI1BRoPHyjA7nrayQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=chipsnmedia.com; spf=pass smtp.mailfrom=chipsnmedia.com; dkim=pass (1024-bit key) header.d=chipsnmedia.com header.i=@chipsnmedia.com header.b=cNB8LYHM; arc=fail smtp.client-ip=52.101.154.3 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=chipsnmedia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chipsnmedia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chipsnmedia.com header.i=@chipsnmedia.com header.b="cNB8LYHM" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=YeS8TZySahs0AN4YfPOX1uc0Y1sGb4ytUfP/IGyzaJZVIKuVGMo5I9c+1ZMlGXf1xox3ryCTPu0ie6YKkqJSoCLmiX2PSct1IPQeLNHM9tw0x2+4C4ynw2tFseeoFN1Qh5OEv95i1tchb/3gxJ8hFr7YGE7JkAuFl4XPeZAv6pgQYxRZ5SQQP4qA19X33sW4F/X6AljXYkoU02q0L5Bc9mkZeVRhKQ02hCrnjx30y592KWJ3K2Cs1zVGLZPh0TIUaOVRKMH79/KCnswlkyxn2Lb0QrW183RltZqTtQWenNP9kKMN13jCYqkQXqRqsipyKFZKIArVgVQWb2iWuQHUog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ASyWbkkM9u0HLjNw8t1PkckbREEsvStBzNCj0SkBQ/g=; b=eDo9kPOp68Yi1Wx6ho0Kh2Dgw66DRezihJvhA83Hx7GocF6mjAbHOstkAJ9q0DHdfqsB5GxQGSOqWUTbMs23ApF1hVYJm3Mqj6qCiBZdcCa0lPijDQt0QLDJYbtCKRczz1TuPJnetg0deOr22dw2fa2F1h0LcI+DqRPOONvazcAhtBpZ7t0TSNWoh8s/neO41yXUPf/yqIrsNvgOkHE8my1sC7PL7npIP2w17NWpt17em3oSaAp669IoAPuoZUKFoRWw4KCUSKL0Mex6b3VH572ASO4TWAVhD84CcffUShbG69jOd0iDmJEzPGY+fkMF9sA6iVUwEZtMrtinw7ZH6A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=chipsnmedia.com; dmarc=pass action=none header.from=chipsnmedia.com; dkim=pass header.d=chipsnmedia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chipsnmedia.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ASyWbkkM9u0HLjNw8t1PkckbREEsvStBzNCj0SkBQ/g=; b=cNB8LYHMPp6yPL2NMb45NWINPKCllTzQlfXMyxjGYtmTTxgwpJDROFeQ3ak49V8QupigbFef9Dawf+SzlBca4Nh3pQ9qbkALyV7m8R1Ea8v8Bp0Tigl4xJ8qqDV86GkCcOOWWvKdjeA6rr+3hV9hiTXD0jQiTieobarqviTrSLk= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=chipsnmedia.com; Received: from SE1P216MB1303.KORP216.PROD.OUTLOOK.COM (2603:1096:101:15::5) by SEWP216MB2956.KORP216.PROD.OUTLOOK.COM (2603:1096:101:295::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7633.36; Tue, 11 Jun 2024 07:15:10 +0000 Received: from SE1P216MB1303.KORP216.PROD.OUTLOOK.COM ([fe80::b711:5ab1:b5a4:d01b]) by SE1P216MB1303.KORP216.PROD.OUTLOOK.COM ([fe80::b711:5ab1:b5a4:d01b%4]) with mapi id 15.20.7633.036; Tue, 11 Jun 2024 07:15:10 +0000 From: Jackson Lee To: mchehab@kernel.org, nicolas@ndufresne.ca, sebastian.fricke@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, hverkuil@xs4all.nl, nas.chung@chipsnmedia.com, lafley.kim@chipsnmedia.com, b-brnich@ti.com, jackson.lee@chipsnmedia.com, Nicolas Dufresne Subject: [PATCH v5 3/4] media: chips-media: wave5: Use helpers to calculate bytesperline and sizeimage. Date: Tue, 11 Jun 2024 16:15:00 +0900 Message-Id: <20240611071501.80-4-jackson.lee@chipsnmedia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240611071501.80-1-jackson.lee@chipsnmedia.com> References: <20240611071501.80-1-jackson.lee@chipsnmedia.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SE2P216CA0014.KORP216.PROD.OUTLOOK.COM (2603:1096:101:117::11) To SE1P216MB1303.KORP216.PROD.OUTLOOK.COM (2603:1096:101:15::5) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SE1P216MB1303:EE_|SEWP216MB2956:EE_ X-MS-Office365-Filtering-Correlation-Id: eb6ee9ba-e1f8-4e04-e9ef-08dc89e63ada X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|366007|376005|1800799015|52116005|38350700005; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?oQ7sNN5FTL8omDWVmQCL3iXEKXPdIZJ+cm/YL6riqUhwEtq5ng5L3DSeBm4F?= =?us-ascii?Q?bh3y8E0OhWd/qb7fM4H5vXwAzwex6953NJEGhi1dPFpCRcDzbIS4hbgCQPiW?= =?us-ascii?Q?0gbe2PmY76wFpIZf6ISmCNuuYA2LL1eHX4O89Qr0TwUk7h+tJ9XvqqBoMJR2?= =?us-ascii?Q?j8NajzzaqerQizfJzVnw1prsCaDX7iJHNNObww7oSgqaOcgchlfF5qJkHV0t?= =?us-ascii?Q?mcLQ0LphWXAb1gN0Ph53pbXG4Lkl1IgvXIgVFxgqa9eYalgRqL64eCn6poqY?= =?us-ascii?Q?qZUtMyrvqz/OXKC+xdkpjrXhwL/D+KkQ+kioiAPLbRca08nWrZzYCNBjVUHf?= =?us-ascii?Q?ZF0DISnXk7oud4O0DhFVLpwONEolejzOSThYb62TIBhZlXqZzLGBgNAex5Ss?= =?us-ascii?Q?A8OaquQYn3uonRL6IXOf83i9vXUAxDKkwKXk1iOKwqYkzrx1pgSIrucOoFrj?= =?us-ascii?Q?yjwoumPiU2GmZ6pidhqOnyyHYoYdYvxgjUBjPd5R3EEMWAEoqiOgDDEwFZag?= =?us-ascii?Q?QhD4aF8D9LfCPpwcvvyZsrMgQ74Zt8stMJTATH1erL1rxA3G/e8QEg5aFrEi?= =?us-ascii?Q?wHo7bo7ofLJYG3ZEpblywlT0qJNHeICiOTKOdYBriPoig0xWqnFtsPa6ZGFd?= =?us-ascii?Q?tLy02A+fiee8PrNkeW30ZwzbRsxXDXK5Js1Q9VdO8P85OghFxuK2wOnWUw9m?= =?us-ascii?Q?KkoRG52s4em+o683PekP+dwcLZSq7ddG1PxkpFggszGcrrVrumPSxk8hf98i?= =?us-ascii?Q?n3vN9LppvA3WJu8AW9xZ2zdmyHY2bkB4/njaU+zZMEcn6+86GWZmU/Jwu6qk?= =?us-ascii?Q?8bo29GVdttprcVPU4PCdNBmBFcC3HicTcer+S4pKLWQ5ATkNA2Zrs1al0Phl?= =?us-ascii?Q?JjFji/EsApwtMJj8BxCMTQ2MxMT6ZyTcENh+zNLn5q/HN09V5Hqu2ubtJ9ju?= =?us-ascii?Q?liuSFzx/phxWsPsbqGKy73MrJRwfL9kjlQjK7hcZ5wRR+I8RpoNlYd7Zp3zb?= =?us-ascii?Q?xKezOaIOaN90cEB5jlzn111+wiqItIWqjAvd5VFmtniKnC/khqbfxbQ6EnZr?= =?us-ascii?Q?r7pOX4qPPRKChr3p4FnRAqnOJHJZ4NfhLh4eTyGGHiDnmcYcKyUoYsndHODd?= =?us-ascii?Q?io74ey2hfynpNlvoOMVd1M5Zu1fuji3gRQ/mTEE7crbBqFKBBQicwC8MAtzc?= =?us-ascii?Q?FtYTw7XELm2xg5YGpxxw7xPeKUDpGF3sbKFxKofMkE037tjwO9NGBM0Kmsq1?= =?us-ascii?Q?dJjn9YqAFpffKPk01pcbtRVJeOOaatJKiZ3ztxTjLlv28fTv6KuqiajRkXEr?= =?us-ascii?Q?3lMRojzce0IwdXDaMCjj62l4nDv81sOcpVz+fpIcVZCfU4OovblrQ3nRAmPC?= =?us-ascii?Q?8NRkgGE=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SE1P216MB1303.KORP216.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230031)(366007)(376005)(1800799015)(52116005)(38350700005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?9fy/zPclFfTGJsyhuo+VOsLaOZQYMeP00HLUkGm+q3u6q593MtNiVYhE9GO5?= =?us-ascii?Q?PtO9gqWU/+vmEugWxLTzCqfVbN8VXjAWWLCnJP5zFTA3d7qx0XUmvi7F+HvK?= =?us-ascii?Q?VkncLTqUyCxVibb/g/WqUkc5xpvOa16phfKWTI+qGp34FCQofe3OQJrJF6PA?= =?us-ascii?Q?rQ8RPSeEbqf894mABVfoT09HkxP++FPgEeKWnJNZhP/UPNhJo0WvLXAIyBlP?= =?us-ascii?Q?dXEQ8XG1v9pvz1iFgvFaJxSbYf7eQd462Ydm6ZYwBc+6Dz3RLIBzJaPpmRuG?= =?us-ascii?Q?jjZ2XLs+j1pqH6ieqLsH24ukCQKiCfQ+2Vc1pXqdtYrGAnhnPPZbJoSCo9w2?= =?us-ascii?Q?XBkE17al9rvZ1LsqmvQqcLWBf2n2OfOw3zAmhSNiHNK7DPgIHFfsyGEls1lt?= =?us-ascii?Q?62wp0RnIINmVX2tvIHqiWvAipiyEeLz238eg7ewaIPDwTNYlBgVu4PswJxyI?= =?us-ascii?Q?DWJmaecNE+aoSTpvaxjeJEjHczejau6vgyH2ynRKXuxxE9epENv/GVjjbJfS?= =?us-ascii?Q?VvRJzYyvTiYvshpHL6tvXHGLS1mNsm9pukrszOHaDmuA2Vu4WmkOBUlr0Wcb?= =?us-ascii?Q?OD2xxgM10usNoHiuGgqHHigRrLVSj0ZpHnTzZtZfhJagC14wyCExGSMdQlGf?= =?us-ascii?Q?WCqC39g6ixF/cZZ+O1ZXJ3kDTXDO+LjQ8pf9xm3iDpF7k1d/JLrv/d2MSTDY?= =?us-ascii?Q?TnruBh7LjL/YvERU8nsotACgHnfAYarGcShfFdwBq84R0jdNrnSDjbK9Hku3?= =?us-ascii?Q?JL3Y9hgPJX3HZ8TMYlxJ2PQ2dVUNvSMOH0aO46TAUqz8i0AwM6QXZ0H70iut?= =?us-ascii?Q?Zts/wcjm09Q5FL3HcLT7t2F63KB15SMtFc2k5vqy4Xt98MrJxrT1Tzn45m1P?= =?us-ascii?Q?DrWxWr4/I0sbdoRDAxiquAPdWzanJxcITpzRib/RdvjvSbW9YulKTGlXsKE6?= =?us-ascii?Q?pe4GXSDrkkrcjliMee/BWvN0UNxhfqRE8UQoF2coy6SESKvfxp4BNZDyqUdC?= =?us-ascii?Q?7buoHs/tegGuIMpCNaaHlsk645fOU1xiyhXER5XINx/mMSjRnykhEURlMFZC?= =?us-ascii?Q?a6rdpjacqMIqOr0ikJC98apUT5F+hDe7YltXd/4VTjLk/K5PcyQVCGLuNP4B?= =?us-ascii?Q?OVgHdgbS0BQTyz9EWsJnoJvRSCvngAGWnfzwnJ6T7j6D767w6bDWHjPm44oI?= =?us-ascii?Q?XdFkzcnbGusZi1QVtP6soqJ7/5bfLVHILPW0Zi75bHMyKt/hRXRY1eEeAEYb?= =?us-ascii?Q?m5whQehDZ30uLtLzfimUIG05vNY9h8taIeMSqVdWBrMFdHeG3VejiuRdRsOr?= =?us-ascii?Q?sGCNzXv+o4axAzXtt24ExLBpB7lxuPeIiQtXQHSpcOMu/KV9OQ+c8ADqsKDK?= =?us-ascii?Q?SO5RW+bCnJFJbxjrfOvoFZtuV/CT/b+72jsPAj/YlzSaiZ7Iy+fl+qndxFPO?= =?us-ascii?Q?pKOC8QQXhdzGfpvdL6lzG/KWlmK1UMkvLhg29uJhoN72cmPdSPIQHkDq6Slg?= =?us-ascii?Q?86iROHKhcaTA4OH4W3UHMZ3wvcnGt57nPsf63WXHwkVI7Y70A7WTjCO0RyYz?= =?us-ascii?Q?2kAGLKshTzS4haf9eROXkOGd3G25Zw3D9LfW214QFxJYn7L0DOVC3mRh65nc?= =?us-ascii?Q?aA=3D=3D?= X-OriginatorOrg: chipsnmedia.com X-MS-Exchange-CrossTenant-Network-Message-Id: eb6ee9ba-e1f8-4e04-e9ef-08dc89e63ada X-MS-Exchange-CrossTenant-AuthSource: SE1P216MB1303.KORP216.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jun 2024 07:15:10.3632 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 4d70c8e9-142b-4389-b7f2-fa8a3c68c467 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: KMqbtq8MLHziS4skqG4SMOqIkRRjnN+FSw6YzEw0OFf4/OC17mx3PH/KlCZ3LPSSSY1DcS7lsP5FCXcgrMCrwEEQfhtHYOoqEPXJUA9pUDE= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEWP216MB2956 Content-Type: text/plain; charset="utf-8" From: "jackson.lee" Use v4l2-common helper functions to calculate bytesperline and sizeimage, instead of calculating in a wave5 driver directly. In case of raw(YUV) v4l2_pix_format, the wave5 driver updates v4l2_pix_format_mplane struct through v4l2_fill_pixfmt_mp() function. Encoder and Decoder need same bytesperline and sizeimage values for same v4l2_pix_format. So, a wave5_update_pix_fmt is refactored to support both together. Signed-off-by: Jackson.lee Signed-off-by: Nas Chung Reviewed-by: Nicolas Dufresne --- .../platform/chips-media/wave5/wave5-helper.c | 24 ++ .../platform/chips-media/wave5/wave5-helper.h | 5 + .../chips-media/wave5/wave5-vpu-dec.c | 296 ++++++------------ .../chips-media/wave5/wave5-vpu-enc.c | 197 +++++------- .../platform/chips-media/wave5/wave5-vpu.h | 5 +- .../chips-media/wave5/wave5-vpuconfig.h | 27 +- 6 files changed, 235 insertions(+), 319 deletions(-) diff --git a/drivers/media/platform/chips-media/wave5/wave5-helper.c b/driv= ers/media/platform/chips-media/wave5/wave5-helper.c index 7e0f34bfa5be..b20ab69cd341 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-helper.c +++ b/drivers/media/platform/chips-media/wave5/wave5-helper.c @@ -7,6 +7,8 @@ =20 #include "wave5-helper.h" =20 +#define DEFAULT_BS_SIZE(width, height) ((width) * (height) / 8 * 3) + const char *state_to_str(enum vpu_instance_state state) { switch (state) { @@ -224,3 +226,25 @@ void wave5_return_bufs(struct vb2_queue *q, u32 state) v4l2_m2m_buf_done(vbuf, state); } } + +void wave5_update_pix_fmt(struct v4l2_pix_format_mplane *pix_mp, + int pix_fmt_type, + unsigned int width, + unsigned int height, + const struct v4l2_frmsize_stepwise *frmsize) +{ + v4l2_apply_frmsize_constraints(&width, &height, frmsize); + + if (pix_fmt_type =3D=3D VPU_FMT_TYPE_CODEC) { + pix_mp->width =3D width; + pix_mp->height =3D height; + pix_mp->num_planes =3D 1; + pix_mp->plane_fmt[0].bytesperline =3D 0; + pix_mp->plane_fmt[0].sizeimage =3D max(DEFAULT_BS_SIZE(width, height), + pix_mp->plane_fmt[0].sizeimage); + } else { + v4l2_fill_pixfmt_mp(pix_mp, pix_mp->pixelformat, width, height); + } + pix_mp->flags =3D 0; + pix_mp->field =3D V4L2_FIELD_NONE; +} diff --git a/drivers/media/platform/chips-media/wave5/wave5-helper.h b/driv= ers/media/platform/chips-media/wave5/wave5-helper.h index 6cee1c14d3ce..9937fce553fc 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-helper.h +++ b/drivers/media/platform/chips-media/wave5/wave5-helper.h @@ -28,4 +28,9 @@ const struct vpu_format *wave5_find_vpu_fmt_by_idx(unsign= ed int idx, const struct vpu_format fmt_list[MAX_FMTS]); enum wave_std wave5_to_vpu_std(unsigned int v4l2_pix_fmt, enum vpu_instanc= e_type type); void wave5_return_bufs(struct vb2_queue *q, u32 state); +void wave5_update_pix_fmt(struct v4l2_pix_format_mplane *pix_mp, + int pix_fmt_type, + unsigned int width, + unsigned int height, + const struct v4l2_frmsize_stepwise *frmsize); #endif diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c b/dri= vers/media/platform/chips-media/wave5/wave5-vpu-dec.c index 861a0664047c..f246c290ad6a 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c +++ b/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c @@ -11,111 +11,92 @@ #define VPU_DEC_DEV_NAME "C&M Wave5 VPU decoder" #define VPU_DEC_DRV_NAME "wave5-dec" =20 -#define DEFAULT_SRC_SIZE(width, height) ({ \ - (width) * (height) / 8 * 3; \ -}) +static const struct v4l2_frmsize_stepwise dec_hevc_frmsize =3D { + .min_width =3D W5_MIN_DEC_PIC_8_WIDTH, + .max_width =3D W5_MAX_DEC_PIC_WIDTH, + .step_width =3D W5_DEC_CODEC_STEP_WIDTH, + .min_height =3D W5_MIN_DEC_PIC_8_HEIGHT, + .max_height =3D W5_MAX_DEC_PIC_HEIGHT, + .step_height =3D W5_DEC_CODEC_STEP_HEIGHT, +}; + +static const struct v4l2_frmsize_stepwise dec_h264_frmsize =3D { + .min_width =3D W5_MIN_DEC_PIC_32_WIDTH, + .max_width =3D W5_MAX_DEC_PIC_WIDTH, + .step_width =3D W5_DEC_CODEC_STEP_WIDTH, + .min_height =3D W5_MIN_DEC_PIC_32_HEIGHT, + .max_height =3D W5_MAX_DEC_PIC_HEIGHT, + .step_height =3D W5_DEC_CODEC_STEP_HEIGHT, +}; + +static const struct v4l2_frmsize_stepwise dec_raw_frmsize =3D { + .min_width =3D W5_MIN_DEC_PIC_8_WIDTH, + .max_width =3D W5_MAX_DEC_PIC_WIDTH, + .step_width =3D W5_DEC_RAW_STEP_WIDTH, + .min_height =3D W5_MIN_DEC_PIC_8_HEIGHT, + .max_height =3D W5_MAX_DEC_PIC_HEIGHT, + .step_height =3D W5_DEC_RAW_STEP_HEIGHT, +}; =20 static const struct vpu_format dec_fmt_list[FMT_TYPES][MAX_FMTS] =3D { [VPU_FMT_TYPE_CODEC] =3D { { .v4l2_pix_fmt =3D V4L2_PIX_FMT_HEVC, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_hevc_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_H264, - .max_width =3D 8192, - .min_width =3D 32, - .max_height =3D 4320, - .min_height =3D 32, + .v4l2_frmsize =3D &dec_h264_frmsize, }, }, [VPU_FMT_TYPE_RAW] =3D { { .v4l2_pix_fmt =3D V4L2_PIX_FMT_YUV420, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV12, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV21, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_YUV422P, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV16, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV61, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_YUV420M, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV12M, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV21M, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_YUV422M, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV16M, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV61M, - .max_width =3D 8192, - .min_width =3D 8, - .max_height =3D 4320, - .min_height =3D 8, + .v4l2_frmsize =3D &dec_raw_frmsize, }, } }; @@ -234,74 +215,6 @@ static void wave5_handle_src_buffer(struct vpu_instanc= e *inst, dma_addr_t rd_ptr inst->remaining_consumed_bytes =3D consumed_bytes; } =20 -static void wave5_update_pix_fmt(struct v4l2_pix_format_mplane *pix_mp, un= signed int width, - unsigned int height) -{ - switch (pix_mp->pixelformat) { - case V4L2_PIX_FMT_YUV420: - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV21: - pix_mp->width =3D round_up(width, 32); - pix_mp->height =3D round_up(height, 16); - pix_mp->plane_fmt[0].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[0].sizeimage =3D width * height * 3 / 2; - break; - case V4L2_PIX_FMT_YUV422P: - case V4L2_PIX_FMT_NV16: - case V4L2_PIX_FMT_NV61: - pix_mp->width =3D round_up(width, 32); - pix_mp->height =3D round_up(height, 16); - pix_mp->plane_fmt[0].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[0].sizeimage =3D width * height * 2; - break; - case V4L2_PIX_FMT_YUV420M: - pix_mp->width =3D round_up(width, 32); - pix_mp->height =3D round_up(height, 16); - pix_mp->plane_fmt[0].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[0].sizeimage =3D width * height; - pix_mp->plane_fmt[1].bytesperline =3D round_up(width, 32) / 2; - pix_mp->plane_fmt[1].sizeimage =3D width * height / 4; - pix_mp->plane_fmt[2].bytesperline =3D round_up(width, 32) / 2; - pix_mp->plane_fmt[2].sizeimage =3D width * height / 4; - break; - case V4L2_PIX_FMT_NV12M: - case V4L2_PIX_FMT_NV21M: - pix_mp->width =3D round_up(width, 32); - pix_mp->height =3D round_up(height, 16); - pix_mp->plane_fmt[0].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[0].sizeimage =3D width * height; - pix_mp->plane_fmt[1].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[1].sizeimage =3D width * height / 2; - break; - case V4L2_PIX_FMT_YUV422M: - pix_mp->width =3D round_up(width, 32); - pix_mp->height =3D round_up(height, 16); - pix_mp->plane_fmt[0].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[0].sizeimage =3D width * height; - pix_mp->plane_fmt[1].bytesperline =3D round_up(width, 32) / 2; - pix_mp->plane_fmt[1].sizeimage =3D width * height / 2; - pix_mp->plane_fmt[2].bytesperline =3D round_up(width, 32) / 2; - pix_mp->plane_fmt[2].sizeimage =3D width * height / 2; - break; - case V4L2_PIX_FMT_NV16M: - case V4L2_PIX_FMT_NV61M: - pix_mp->width =3D round_up(width, 32); - pix_mp->height =3D round_up(height, 16); - pix_mp->plane_fmt[0].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[0].sizeimage =3D width * height; - pix_mp->plane_fmt[1].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[1].sizeimage =3D width * height; - break; - default: - pix_mp->width =3D width; - pix_mp->height =3D height; - pix_mp->plane_fmt[0].bytesperline =3D 0; - pix_mp->plane_fmt[0].sizeimage =3D max(DEFAULT_SRC_SIZE(width, height), - pix_mp->plane_fmt[0].sizeimage); - break; - } -} - static int start_decode(struct vpu_instance *inst, u32 *fail_res) { struct v4l2_m2m_ctx *m2m_ctx =3D inst->v4l2_fh.m2m_ctx; @@ -389,6 +302,8 @@ static int handle_dynamic_resolution_change(struct vpu_= instance *inst) } =20 if (p_dec_info->initial_info_obtained) { + const struct vpu_format *vpu_fmt; + inst->conf_win.left =3D initial_info->pic_crop_rect.left; inst->conf_win.top =3D initial_info->pic_crop_rect.top; inst->conf_win.width =3D initial_info->pic_width - @@ -396,10 +311,27 @@ static int handle_dynamic_resolution_change(struct vp= u_instance *inst) inst->conf_win.height =3D initial_info->pic_height - initial_info->pic_crop_rect.top - initial_info->pic_crop_rect.bottom; =20 - wave5_update_pix_fmt(&inst->src_fmt, initial_info->pic_width, - initial_info->pic_height); - wave5_update_pix_fmt(&inst->dst_fmt, initial_info->pic_width, - initial_info->pic_height); + vpu_fmt =3D wave5_find_vpu_fmt(inst->src_fmt.pixelformat, + dec_fmt_list[VPU_FMT_TYPE_CODEC]); + if (!vpu_fmt) + return -EINVAL; + + wave5_update_pix_fmt(&inst->src_fmt, + VPU_FMT_TYPE_CODEC, + initial_info->pic_width, + initial_info->pic_height, + vpu_fmt->v4l2_frmsize); + + vpu_fmt =3D wave5_find_vpu_fmt(inst->dst_fmt.pixelformat, + dec_fmt_list[VPU_FMT_TYPE_RAW]); + if (!vpu_fmt) + return -EINVAL; + + wave5_update_pix_fmt(&inst->dst_fmt, + VPU_FMT_TYPE_RAW, + initial_info->pic_width, + initial_info->pic_height, + vpu_fmt->v4l2_frmsize); } =20 v4l2_event_queue_fh(fh, &vpu_event_src_ch); @@ -545,15 +477,11 @@ static int wave5_vpu_dec_enum_framesizes(struct file = *f, void *fh, struct v4l2_f vpu_fmt =3D wave5_find_vpu_fmt(fsize->pixel_format, dec_fmt_list[VPU_FMT= _TYPE_RAW]); if (!vpu_fmt) return -EINVAL; + return -ENOTTY; } =20 fsize->type =3D V4L2_FRMSIZE_TYPE_CONTINUOUS; - fsize->stepwise.min_width =3D vpu_fmt->min_width; - fsize->stepwise.max_width =3D vpu_fmt->max_width; - fsize->stepwise.step_width =3D 1; - fsize->stepwise.min_height =3D vpu_fmt->min_height; - fsize->stepwise.max_height =3D vpu_fmt->max_height; - fsize->stepwise.step_height =3D 1; + fsize->stepwise =3D *vpu_fmt->v4l2_frmsize; =20 return 0; } @@ -576,6 +504,7 @@ static int wave5_vpu_dec_try_fmt_cap(struct file *file,= void *fh, struct v4l2_fo { struct vpu_instance *inst =3D wave5_to_vpu_inst(fh); struct dec_info *p_dec_info =3D &inst->codec_info->dec_info; + const struct v4l2_frmsize_stepwise *frmsize; const struct vpu_format *vpu_fmt; int width, height; =20 @@ -589,14 +518,12 @@ static int wave5_vpu_dec_try_fmt_cap(struct file *fil= e, void *fh, struct v4l2_fo width =3D inst->dst_fmt.width; height =3D inst->dst_fmt.height; f->fmt.pix_mp.pixelformat =3D inst->dst_fmt.pixelformat; - f->fmt.pix_mp.num_planes =3D inst->dst_fmt.num_planes; + frmsize =3D &dec_raw_frmsize; } else { - const struct v4l2_format_info *info =3D v4l2_format_info(vpu_fmt->v4l2_p= ix_fmt); - - width =3D clamp(f->fmt.pix_mp.width, vpu_fmt->min_width, vpu_fmt->max_wi= dth); - height =3D clamp(f->fmt.pix_mp.height, vpu_fmt->min_height, vpu_fmt->max= _height); + width =3D f->fmt.pix_mp.width; + height =3D f->fmt.pix_mp.height; f->fmt.pix_mp.pixelformat =3D vpu_fmt->v4l2_pix_fmt; - f->fmt.pix_mp.num_planes =3D info->mem_planes; + frmsize =3D vpu_fmt->v4l2_frmsize; } =20 if (p_dec_info->initial_info_obtained) { @@ -604,9 +531,8 @@ static int wave5_vpu_dec_try_fmt_cap(struct file *file,= void *fh, struct v4l2_fo height =3D inst->dst_fmt.height; } =20 - wave5_update_pix_fmt(&f->fmt.pix_mp, width, height); - f->fmt.pix_mp.flags =3D 0; - f->fmt.pix_mp.field =3D V4L2_FIELD_NONE; + wave5_update_pix_fmt(&f->fmt.pix_mp, VPU_FMT_TYPE_RAW, + width, height, frmsize); f->fmt.pix_mp.colorspace =3D inst->colorspace; f->fmt.pix_mp.ycbcr_enc =3D inst->ycbcr_enc; f->fmt.pix_mp.quantization =3D inst->quantization; @@ -718,7 +644,9 @@ static int wave5_vpu_dec_enum_fmt_out(struct file *file= , void *fh, struct v4l2_f static int wave5_vpu_dec_try_fmt_out(struct file *file, void *fh, struct v= 4l2_format *f) { struct vpu_instance *inst =3D wave5_to_vpu_inst(fh); + const struct v4l2_frmsize_stepwise *frmsize; const struct vpu_format *vpu_fmt; + int width, height; =20 dev_dbg(inst->dev->dev, "%s: fourcc: %u width: %u height: %u num_planes: %u colorspace: %u field= : %u\n", @@ -727,20 +655,19 @@ static int wave5_vpu_dec_try_fmt_out(struct file *fil= e, void *fh, struct v4l2_fo =20 vpu_fmt =3D wave5_find_vpu_fmt(f->fmt.pix_mp.pixelformat, dec_fmt_list[VP= U_FMT_TYPE_CODEC]); if (!vpu_fmt) { + width =3D inst->src_fmt.width; + height =3D inst->src_fmt.height; f->fmt.pix_mp.pixelformat =3D inst->src_fmt.pixelformat; - f->fmt.pix_mp.num_planes =3D inst->src_fmt.num_planes; - wave5_update_pix_fmt(&f->fmt.pix_mp, inst->src_fmt.width, inst->src_fmt.= height); + frmsize =3D &dec_hevc_frmsize; } else { - int width =3D clamp(f->fmt.pix_mp.width, vpu_fmt->min_width, vpu_fmt->ma= x_width); - int height =3D clamp(f->fmt.pix_mp.height, vpu_fmt->min_height, vpu_fmt-= >max_height); - + width =3D f->fmt.pix_mp.width; + height =3D f->fmt.pix_mp.height; f->fmt.pix_mp.pixelformat =3D vpu_fmt->v4l2_pix_fmt; - f->fmt.pix_mp.num_planes =3D 1; - wave5_update_pix_fmt(&f->fmt.pix_mp, width, height); + frmsize =3D vpu_fmt->v4l2_frmsize; } =20 - f->fmt.pix_mp.flags =3D 0; - f->fmt.pix_mp.field =3D V4L2_FIELD_NONE; + wave5_update_pix_fmt(&f->fmt.pix_mp, VPU_FMT_TYPE_CODEC, + width, height, frmsize); =20 return 0; } @@ -748,6 +675,7 @@ static int wave5_vpu_dec_try_fmt_out(struct file *file,= void *fh, struct v4l2_fo static int wave5_vpu_dec_s_fmt_out(struct file *file, void *fh, struct v4l= 2_format *f) { struct vpu_instance *inst =3D wave5_to_vpu_inst(fh); + const struct vpu_format *vpu_fmt; int i, ret; =20 dev_dbg(inst->dev->dev, @@ -782,7 +710,13 @@ static int wave5_vpu_dec_s_fmt_out(struct file *file, = void *fh, struct v4l2_form inst->quantization =3D f->fmt.pix_mp.quantization; inst->xfer_func =3D f->fmt.pix_mp.xfer_func; =20 - wave5_update_pix_fmt(&inst->dst_fmt, f->fmt.pix_mp.width, f->fmt.pix_mp.h= eight); + vpu_fmt =3D wave5_find_vpu_fmt(inst->dst_fmt.pixelformat, dec_fmt_list[VP= U_FMT_TYPE_RAW]); + if (!vpu_fmt) + return -EINVAL; + + wave5_update_pix_fmt(&inst->dst_fmt, VPU_FMT_TYPE_RAW, + f->fmt.pix_mp.width, f->fmt.pix_mp.height, + vpu_fmt->v4l2_frmsize); =20 return 0; } @@ -1005,6 +939,7 @@ static int wave5_vpu_dec_queue_setup(struct vb2_queue = *q, unsigned int *num_buff struct vpu_instance *inst =3D vb2_get_drv_priv(q); struct v4l2_pix_format_mplane inst_format =3D (q->type =3D=3D V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) ? inst->src_fmt : ins= t->dst_fmt; + unsigned int i; =20 dev_dbg(inst->dev->dev, "%s: num_buffers: %u | num_planes: %u | type: %u\= n", __func__, *num_buffers, *num_planes, q->type); @@ -1018,31 +953,9 @@ static int wave5_vpu_dec_queue_setup(struct vb2_queue= *q, unsigned int *num_buff if (*num_buffers < inst->fbc_buf_count) *num_buffers =3D inst->fbc_buf_count; =20 - if (*num_planes =3D=3D 1) { - if (inst->output_format =3D=3D FORMAT_422) - sizes[0] =3D inst_format.width * inst_format.height * 2; - else - sizes[0] =3D inst_format.width * inst_format.height * 3 / 2; - dev_dbg(inst->dev->dev, "%s: size[0]: %u\n", __func__, sizes[0]); - } else if (*num_planes =3D=3D 2) { - sizes[0] =3D inst_format.width * inst_format.height; - if (inst->output_format =3D=3D FORMAT_422) - sizes[1] =3D inst_format.width * inst_format.height; - else - sizes[1] =3D inst_format.width * inst_format.height / 2; - dev_dbg(inst->dev->dev, "%s: size[0]: %u | size[1]: %u\n", - __func__, sizes[0], sizes[1]); - } else if (*num_planes =3D=3D 3) { - sizes[0] =3D inst_format.width * inst_format.height; - if (inst->output_format =3D=3D FORMAT_422) { - sizes[1] =3D inst_format.width * inst_format.height / 2; - sizes[2] =3D inst_format.width * inst_format.height / 2; - } else { - sizes[1] =3D inst_format.width * inst_format.height / 4; - sizes[2] =3D inst_format.width * inst_format.height / 4; - } - dev_dbg(inst->dev->dev, "%s: size[0]: %u | size[1]: %u | size[2]: %u\n", - __func__, sizes[0], sizes[1], sizes[2]); + for (i =3D 0; i < *num_planes; i++) { + sizes[i] =3D inst_format.plane_fmt[i].sizeimage; + dev_dbg(inst->dev->dev, "%s: size[%u]: %u\n", __func__, i, sizes[i]); } } =20 @@ -1564,20 +1477,15 @@ static const struct vb2_ops wave5_vpu_dec_vb2_ops = =3D { static void wave5_set_default_format(struct v4l2_pix_format_mplane *src_fm= t, struct v4l2_pix_format_mplane *dst_fmt) { - unsigned int dst_pix_fmt =3D dec_fmt_list[VPU_FMT_TYPE_RAW][0].v4l2_pix_f= mt; - const struct v4l2_format_info *dst_fmt_info =3D v4l2_format_info(dst_pix_= fmt); - src_fmt->pixelformat =3D dec_fmt_list[VPU_FMT_TYPE_CODEC][0].v4l2_pix_fmt; - src_fmt->field =3D V4L2_FIELD_NONE; - src_fmt->flags =3D 0; - src_fmt->num_planes =3D 1; - wave5_update_pix_fmt(src_fmt, 720, 480); - - dst_fmt->pixelformat =3D dst_pix_fmt; - dst_fmt->field =3D V4L2_FIELD_NONE; - dst_fmt->flags =3D 0; - dst_fmt->num_planes =3D dst_fmt_info->mem_planes; - wave5_update_pix_fmt(dst_fmt, 736, 480); + wave5_update_pix_fmt(src_fmt, VPU_FMT_TYPE_CODEC, + W5_DEF_DEC_PIC_WIDTH, W5_DEF_DEC_PIC_HEIGHT, + &dec_hevc_frmsize); + + dst_fmt->pixelformat =3D dec_fmt_list[VPU_FMT_TYPE_RAW][0].v4l2_pix_fmt; + wave5_update_pix_fmt(dst_fmt, VPU_FMT_TYPE_RAW, + W5_DEF_DEC_PIC_WIDTH, W5_DEF_DEC_PIC_HEIGHT, + &dec_raw_frmsize); } =20 static int wave5_vpu_dec_queue_init(void *priv, struct vb2_queue *src_vq, = struct vb2_queue *dst_vq) diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c b/dri= vers/media/platform/chips-media/wave5/wave5-vpu-enc.c index 703fd8d1c7da..a470f24cbabe 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c +++ b/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c @@ -11,65 +11,60 @@ #define VPU_ENC_DEV_NAME "C&M Wave5 VPU encoder" #define VPU_ENC_DRV_NAME "wave5-enc" =20 +static const struct v4l2_frmsize_stepwise enc_frmsize[FMT_TYPES] =3D { + [VPU_FMT_TYPE_CODEC] =3D { + .min_width =3D W5_MIN_ENC_PIC_WIDTH, + .max_width =3D W5_MAX_ENC_PIC_WIDTH, + .step_width =3D W5_ENC_CODEC_STEP_WIDTH, + .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .max_height =3D W5_MAX_ENC_PIC_HEIGHT, + .step_height =3D W5_ENC_CODEC_STEP_HEIGHT, + }, + [VPU_FMT_TYPE_RAW] =3D { + .min_width =3D W5_MIN_ENC_PIC_WIDTH, + .max_width =3D W5_MAX_ENC_PIC_WIDTH, + .step_width =3D W5_ENC_RAW_STEP_WIDTH, + .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .max_height =3D W5_MAX_ENC_PIC_HEIGHT, + .step_height =3D W5_ENC_RAW_STEP_HEIGHT, + }, +}; + static const struct vpu_format enc_fmt_list[FMT_TYPES][MAX_FMTS] =3D { [VPU_FMT_TYPE_CODEC] =3D { { .v4l2_pix_fmt =3D V4L2_PIX_FMT_HEVC, - .max_width =3D W5_MAX_ENC_PIC_WIDTH, - .min_width =3D W5_MIN_ENC_PIC_WIDTH, - .max_height =3D W5_MAX_ENC_PIC_HEIGHT, - .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .v4l2_frmsize =3D &enc_frmsize[VPU_FMT_TYPE_CODEC], }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_H264, - .max_width =3D W5_MAX_ENC_PIC_WIDTH, - .min_width =3D W5_MIN_ENC_PIC_WIDTH, - .max_height =3D W5_MAX_ENC_PIC_HEIGHT, - .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .v4l2_frmsize =3D &enc_frmsize[VPU_FMT_TYPE_CODEC], }, }, [VPU_FMT_TYPE_RAW] =3D { { .v4l2_pix_fmt =3D V4L2_PIX_FMT_YUV420, - .max_width =3D W5_MAX_ENC_PIC_WIDTH, - .min_width =3D W5_MIN_ENC_PIC_WIDTH, - .max_height =3D W5_MAX_ENC_PIC_HEIGHT, - .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .v4l2_frmsize =3D &enc_frmsize[VPU_FMT_TYPE_RAW], }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV12, - .max_width =3D W5_MAX_ENC_PIC_WIDTH, - .min_width =3D W5_MIN_ENC_PIC_WIDTH, - .max_height =3D W5_MAX_ENC_PIC_HEIGHT, - .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .v4l2_frmsize =3D &enc_frmsize[VPU_FMT_TYPE_RAW], }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV21, - .max_width =3D W5_MAX_ENC_PIC_WIDTH, - .min_width =3D W5_MIN_ENC_PIC_WIDTH, - .max_height =3D W5_MAX_ENC_PIC_HEIGHT, - .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .v4l2_frmsize =3D &enc_frmsize[VPU_FMT_TYPE_RAW], }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_YUV420M, - .max_width =3D W5_MAX_ENC_PIC_WIDTH, - .min_width =3D W5_MIN_ENC_PIC_WIDTH, - .max_height =3D W5_MAX_ENC_PIC_HEIGHT, - .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .v4l2_frmsize =3D &enc_frmsize[VPU_FMT_TYPE_RAW], }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV12M, - .max_width =3D W5_MAX_ENC_PIC_WIDTH, - .min_width =3D W5_MIN_ENC_PIC_WIDTH, - .max_height =3D W5_MAX_ENC_PIC_HEIGHT, - .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .v4l2_frmsize =3D &enc_frmsize[VPU_FMT_TYPE_RAW], }, { .v4l2_pix_fmt =3D V4L2_PIX_FMT_NV21M, - .max_width =3D W5_MAX_ENC_PIC_WIDTH, - .min_width =3D W5_MIN_ENC_PIC_WIDTH, - .max_height =3D W5_MAX_ENC_PIC_HEIGHT, - .min_height =3D W5_MIN_ENC_PIC_HEIGHT, + .v4l2_frmsize =3D &enc_frmsize[VPU_FMT_TYPE_RAW], }, } }; @@ -106,46 +101,6 @@ static int switch_state(struct vpu_instance *inst, enu= m vpu_instance_state state return -EINVAL; } =20 -static void wave5_update_pix_fmt(struct v4l2_pix_format_mplane *pix_mp, un= signed int width, - unsigned int height) -{ - switch (pix_mp->pixelformat) { - case V4L2_PIX_FMT_YUV420: - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV21: - pix_mp->width =3D width; - pix_mp->height =3D height; - pix_mp->plane_fmt[0].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[0].sizeimage =3D round_up(width, 32) * height * 3 / 2; - break; - case V4L2_PIX_FMT_YUV420M: - pix_mp->width =3D width; - pix_mp->height =3D height; - pix_mp->plane_fmt[0].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[0].sizeimage =3D round_up(width, 32) * height; - pix_mp->plane_fmt[1].bytesperline =3D round_up(width, 32) / 2; - pix_mp->plane_fmt[1].sizeimage =3D round_up(width, 32) * height / 4; - pix_mp->plane_fmt[2].bytesperline =3D round_up(width, 32) / 2; - pix_mp->plane_fmt[2].sizeimage =3D round_up(width, 32) * height / 4; - break; - case V4L2_PIX_FMT_NV12M: - case V4L2_PIX_FMT_NV21M: - pix_mp->width =3D width; - pix_mp->height =3D height; - pix_mp->plane_fmt[0].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[0].sizeimage =3D round_up(width, 32) * height; - pix_mp->plane_fmt[1].bytesperline =3D round_up(width, 32); - pix_mp->plane_fmt[1].sizeimage =3D round_up(width, 32) * height / 2; - break; - default: - pix_mp->width =3D width; - pix_mp->height =3D height; - pix_mp->plane_fmt[0].bytesperline =3D 0; - pix_mp->plane_fmt[0].sizeimage =3D width * height / 8 * 3; - break; - } -} - static int start_encode(struct vpu_instance *inst, u32 *fail_res) { struct v4l2_m2m_ctx *m2m_ctx =3D inst->v4l2_fh.m2m_ctx; @@ -360,13 +315,8 @@ static int wave5_vpu_enc_enum_framesizes(struct file *= f, void *fh, struct v4l2_f return -EINVAL; } =20 - fsize->type =3D V4L2_FRMSIZE_TYPE_CONTINUOUS; - fsize->stepwise.min_width =3D vpu_fmt->min_width; - fsize->stepwise.max_width =3D vpu_fmt->max_width; - fsize->stepwise.step_width =3D 1; - fsize->stepwise.min_height =3D vpu_fmt->min_height; - fsize->stepwise.max_height =3D vpu_fmt->max_height; - fsize->stepwise.step_height =3D 1; + fsize->type =3D V4L2_FRMSIZE_TYPE_STEPWISE; + fsize->stepwise =3D enc_frmsize[VPU_FMT_TYPE_CODEC]; =20 return 0; } @@ -391,7 +341,9 @@ static int wave5_vpu_enc_enum_fmt_cap(struct file *file= , void *fh, struct v4l2_f static int wave5_vpu_enc_try_fmt_cap(struct file *file, void *fh, struct v= 4l2_format *f) { struct vpu_instance *inst =3D wave5_to_vpu_inst(fh); + const struct v4l2_frmsize_stepwise *frmsize; const struct vpu_format *vpu_fmt; + int width, height; =20 dev_dbg(inst->dev->dev, "%s: fourcc: %u width: %u height: %u num_planes: = %u field: %u\n", __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, f->fmt.pix_mp.= height, @@ -399,20 +351,19 @@ static int wave5_vpu_enc_try_fmt_cap(struct file *fil= e, void *fh, struct v4l2_fo =20 vpu_fmt =3D wave5_find_vpu_fmt(f->fmt.pix_mp.pixelformat, enc_fmt_list[VP= U_FMT_TYPE_CODEC]); if (!vpu_fmt) { + width =3D inst->dst_fmt.width; + height =3D inst->dst_fmt.height; f->fmt.pix_mp.pixelformat =3D inst->dst_fmt.pixelformat; - f->fmt.pix_mp.num_planes =3D inst->dst_fmt.num_planes; - wave5_update_pix_fmt(&f->fmt.pix_mp, inst->dst_fmt.width, inst->dst_fmt.= height); + frmsize =3D &enc_frmsize[VPU_FMT_TYPE_CODEC]; } else { - int width =3D clamp(f->fmt.pix_mp.width, vpu_fmt->min_width, vpu_fmt->ma= x_width); - int height =3D clamp(f->fmt.pix_mp.height, vpu_fmt->min_height, vpu_fmt-= >max_height); - + width =3D f->fmt.pix_mp.width; + height =3D f->fmt.pix_mp.height; f->fmt.pix_mp.pixelformat =3D vpu_fmt->v4l2_pix_fmt; - f->fmt.pix_mp.num_planes =3D 1; - wave5_update_pix_fmt(&f->fmt.pix_mp, width, height); + frmsize =3D vpu_fmt->v4l2_frmsize; } =20 - f->fmt.pix_mp.flags =3D 0; - f->fmt.pix_mp.field =3D V4L2_FIELD_NONE; + wave5_update_pix_fmt(&f->fmt.pix_mp, VPU_FMT_TYPE_CODEC, + width, height, frmsize); f->fmt.pix_mp.colorspace =3D inst->colorspace; f->fmt.pix_mp.ycbcr_enc =3D inst->ycbcr_enc; f->fmt.pix_mp.quantization =3D inst->quantization; @@ -499,7 +450,9 @@ static int wave5_vpu_enc_enum_fmt_out(struct file *file= , void *fh, struct v4l2_f static int wave5_vpu_enc_try_fmt_out(struct file *file, void *fh, struct v= 4l2_format *f) { struct vpu_instance *inst =3D wave5_to_vpu_inst(fh); + const struct v4l2_frmsize_stepwise *frmsize; const struct vpu_format *vpu_fmt; + int width, height; =20 dev_dbg(inst->dev->dev, "%s: fourcc: %u width: %u height: %u num_planes: = %u field: %u\n", __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, f->fmt.pix_mp.= height, @@ -507,28 +460,26 @@ static int wave5_vpu_enc_try_fmt_out(struct file *fil= e, void *fh, struct v4l2_fo =20 vpu_fmt =3D wave5_find_vpu_fmt(f->fmt.pix_mp.pixelformat, enc_fmt_list[VP= U_FMT_TYPE_RAW]); if (!vpu_fmt) { + width =3D inst->src_fmt.width; + height =3D inst->src_fmt.height; f->fmt.pix_mp.pixelformat =3D inst->src_fmt.pixelformat; - f->fmt.pix_mp.num_planes =3D inst->src_fmt.num_planes; - wave5_update_pix_fmt(&f->fmt.pix_mp, inst->src_fmt.width, inst->src_fmt.= height); + frmsize =3D &enc_frmsize[VPU_FMT_TYPE_RAW]; } else { - int width =3D clamp(f->fmt.pix_mp.width, vpu_fmt->min_width, vpu_fmt->ma= x_width); - int height =3D clamp(f->fmt.pix_mp.height, vpu_fmt->min_height, vpu_fmt-= >max_height); - const struct v4l2_format_info *info =3D v4l2_format_info(vpu_fmt->v4l2_p= ix_fmt); - + width =3D f->fmt.pix_mp.width; + height =3D f->fmt.pix_mp.height; f->fmt.pix_mp.pixelformat =3D vpu_fmt->v4l2_pix_fmt; - f->fmt.pix_mp.num_planes =3D info->mem_planes; - wave5_update_pix_fmt(&f->fmt.pix_mp, width, height); + frmsize =3D vpu_fmt->v4l2_frmsize; } =20 - f->fmt.pix_mp.flags =3D 0; - f->fmt.pix_mp.field =3D V4L2_FIELD_NONE; - + wave5_update_pix_fmt(&f->fmt.pix_mp, VPU_FMT_TYPE_RAW, + width, height, frmsize); return 0; } =20 static int wave5_vpu_enc_s_fmt_out(struct file *file, void *fh, struct v4l= 2_format *f) { struct vpu_instance *inst =3D wave5_to_vpu_inst(fh); + const struct vpu_format *vpu_fmt; int i, ret; =20 dev_dbg(inst->dev->dev, "%s: fourcc: %u width: %u height: %u num_planes: = %u field: %u\n", @@ -568,7 +519,15 @@ static int wave5_vpu_enc_s_fmt_out(struct file *file, = void *fh, struct v4l2_form inst->quantization =3D f->fmt.pix_mp.quantization; inst->xfer_func =3D f->fmt.pix_mp.xfer_func; =20 - wave5_update_pix_fmt(&inst->dst_fmt, f->fmt.pix_mp.width, f->fmt.pix_mp.h= eight); + vpu_fmt =3D wave5_find_vpu_fmt(inst->dst_fmt.pixelformat, enc_fmt_list[VP= U_FMT_TYPE_CODEC]); + if (!vpu_fmt) + return -EINVAL; + + wave5_update_pix_fmt(&inst->dst_fmt, VPU_FMT_TYPE_CODEC, + f->fmt.pix_mp.width, f->fmt.pix_mp.height, + vpu_fmt->v4l2_frmsize); + inst->conf_win.width =3D inst->dst_fmt.width; + inst->conf_win.height =3D inst->dst_fmt.height; =20 return 0; } @@ -584,12 +543,17 @@ static int wave5_vpu_enc_g_selection(struct file *fil= e, void *fh, struct v4l2_se switch (s->target) { case V4L2_SEL_TGT_CROP_DEFAULT: case V4L2_SEL_TGT_CROP_BOUNDS: - case V4L2_SEL_TGT_CROP: s->r.left =3D 0; s->r.top =3D 0; s->r.width =3D inst->dst_fmt.width; s->r.height =3D inst->dst_fmt.height; break; + case V4L2_SEL_TGT_CROP: + s->r.left =3D 0; + s->r.top =3D 0; + s->r.width =3D inst->conf_win.width; + s->r.height =3D inst->conf_win.height; + break; default: return -EINVAL; } @@ -612,8 +576,10 @@ static int wave5_vpu_enc_s_selection(struct file *file= , void *fh, struct v4l2_se =20 s->r.left =3D 0; s->r.top =3D 0; - s->r.width =3D inst->src_fmt.width; - s->r.height =3D inst->src_fmt.height; + s->r.width =3D min(s->r.width, inst->dst_fmt.width); + s->r.height =3D min(s->r.height, inst->dst_fmt.height); + + inst->conf_win =3D s->r; =20 return 0; } @@ -1151,8 +1117,8 @@ static void wave5_set_enc_openparam(struct enc_open_p= aram *open_param, open_param->wave_param.lambda_scaling_enable =3D 1; =20 open_param->line_buf_int_en =3D true; - open_param->pic_width =3D inst->dst_fmt.width; - open_param->pic_height =3D inst->dst_fmt.height; + open_param->pic_width =3D inst->conf_win.width; + open_param->pic_height =3D inst->conf_win.height; open_param->frame_rate_info =3D inst->frame_rate; open_param->rc_enable =3D inst->rc_enable; if (inst->rc_enable) { @@ -1456,20 +1422,15 @@ static const struct vb2_ops wave5_vpu_enc_vb2_ops = =3D { static void wave5_set_default_format(struct v4l2_pix_format_mplane *src_fm= t, struct v4l2_pix_format_mplane *dst_fmt) { - unsigned int src_pix_fmt =3D enc_fmt_list[VPU_FMT_TYPE_RAW][0].v4l2_pix_f= mt; - const struct v4l2_format_info *src_fmt_info =3D v4l2_format_info(src_pix_= fmt); - - src_fmt->pixelformat =3D src_pix_fmt; - src_fmt->field =3D V4L2_FIELD_NONE; - src_fmt->flags =3D 0; - src_fmt->num_planes =3D src_fmt_info->mem_planes; - wave5_update_pix_fmt(src_fmt, 416, 240); + src_fmt->pixelformat =3D enc_fmt_list[VPU_FMT_TYPE_RAW][0].v4l2_pix_fmt; + wave5_update_pix_fmt(src_fmt, VPU_FMT_TYPE_RAW, + W5_DEF_ENC_PIC_WIDTH, W5_DEF_ENC_PIC_HEIGHT, + &enc_frmsize[VPU_FMT_TYPE_RAW]); =20 dst_fmt->pixelformat =3D enc_fmt_list[VPU_FMT_TYPE_CODEC][0].v4l2_pix_fmt; - dst_fmt->field =3D V4L2_FIELD_NONE; - dst_fmt->flags =3D 0; - dst_fmt->num_planes =3D 1; - wave5_update_pix_fmt(dst_fmt, 416, 240); + wave5_update_pix_fmt(dst_fmt, VPU_FMT_TYPE_CODEC, + W5_DEF_ENC_PIC_WIDTH, W5_DEF_ENC_PIC_HEIGHT, + &enc_frmsize[VPU_FMT_TYPE_CODEC]); } =20 static int wave5_vpu_enc_queue_init(void *priv, struct vb2_queue *src_vq, = struct vb2_queue *dst_vq) @@ -1733,6 +1694,8 @@ static int wave5_vpu_open_enc(struct file *filp) v4l2_ctrl_handler_setup(v4l2_ctrl_hdl); =20 wave5_set_default_format(&inst->src_fmt, &inst->dst_fmt); + inst->conf_win.width =3D inst->dst_fmt.width; + inst->conf_win.height =3D inst->dst_fmt.height; inst->colorspace =3D V4L2_COLORSPACE_REC709; inst->ycbcr_enc =3D V4L2_YCBCR_ENC_DEFAULT; inst->quantization =3D V4L2_QUANTIZATION_DEFAULT; diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu.h b/drivers= /media/platform/chips-media/wave5/wave5-vpu.h index 32b7fd3730b5..3847332551fc 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-vpu.h +++ b/drivers/media/platform/chips-media/wave5/wave5-vpu.h @@ -38,10 +38,7 @@ enum vpu_fmt_type { =20 struct vpu_format { unsigned int v4l2_pix_fmt; - unsigned int max_width; - unsigned int min_width; - unsigned int max_height; - unsigned int min_height; + const struct v4l2_frmsize_stepwise *v4l2_frmsize; }; =20 static inline struct vpu_instance *wave5_to_vpu_inst(struct v4l2_fh *vfh) diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpuconfig.h b/d= rivers/media/platform/chips-media/wave5/wave5-vpuconfig.h index d9751eedb0f9..8e11d93ca38f 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-vpuconfig.h +++ b/drivers/media/platform/chips-media/wave5/wave5-vpuconfig.h @@ -30,10 +30,29 @@ =20 #define MAX_NUM_INSTANCE 32 =20 -#define W5_MIN_ENC_PIC_WIDTH 256 -#define W5_MIN_ENC_PIC_HEIGHT 128 -#define W5_MAX_ENC_PIC_WIDTH 8192 -#define W5_MAX_ENC_PIC_HEIGHT 8192 +#define W5_DEF_DEC_PIC_WIDTH 720U +#define W5_DEF_DEC_PIC_HEIGHT 480U +#define W5_MIN_DEC_PIC_8_WIDTH 8U +#define W5_MIN_DEC_PIC_8_HEIGHT 8U +#define W5_MIN_DEC_PIC_32_WIDTH 32U +#define W5_MIN_DEC_PIC_32_HEIGHT 32U +#define W5_MAX_DEC_PIC_WIDTH 8192U +#define W5_MAX_DEC_PIC_HEIGHT 4320U +#define W5_DEC_CODEC_STEP_WIDTH 1U +#define W5_DEC_CODEC_STEP_HEIGHT 1U +#define W5_DEC_RAW_STEP_WIDTH 32U +#define W5_DEC_RAW_STEP_HEIGHT 16U + +#define W5_DEF_ENC_PIC_WIDTH 416U +#define W5_DEF_ENC_PIC_HEIGHT 240U +#define W5_MIN_ENC_PIC_WIDTH 256U +#define W5_MIN_ENC_PIC_HEIGHT 128U +#define W5_MAX_ENC_PIC_WIDTH 8192U +#define W5_MAX_ENC_PIC_HEIGHT 8192U +#define W5_ENC_CODEC_STEP_WIDTH 8U +#define W5_ENC_CODEC_STEP_HEIGHT 8U +#define W5_ENC_RAW_STEP_WIDTH 32U +#define W5_ENC_RAW_STEP_HEIGHT 16U =20 // application specific configuration #define VPU_ENC_TIMEOUT 60000 --=20 2.43.0