From nobody Tue Dec 16 22:20:42 2025 Received: from mail-pg1-f180.google.com (mail-pg1-f180.google.com [209.85.215.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35EA81527AC for ; Mon, 10 Jun 2024 22:25:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718058352; cv=none; b=pqYP3S9rjiMUDNXQahkONoYFIPnAKvLfKV0VgPTo3gc9MP0cS0tYNZn2y8FAip5YAi2WSBZN/kcMIwliMm6EoBTI7vX6znGZKB1nRVWksoHPg2tb2Ppx+vZQCugqhc0IsRr4QlKUCaWWLaKoc1xm8pFgWGkc4NrSxBBPryzHfA4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718058352; c=relaxed/simple; bh=Vz9TKpxXaJUlf8hvN5Wqa/7wPSCv1FZBm1VFSvSSE8s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=m5xhyPEElIKPe5cn7t4OMxumx/sW95oBsu4+3IUbQl5KPiyzEaSGQMBmioowYkHFcAWNdVKTWc8E8YhVbEl8a4PWRQYgbdsSp5kFm0wY6LF6VSdjtUgBOpn0E23cV1JOLnRBvyBPYMZ5/eNEFQHmFp6J4ltKlhyxHeK13cqLI44= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org; spf=pass smtp.mailfrom=chromium.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b=R/iJd/+V; arc=none smtp.client-ip=209.85.215.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="R/iJd/+V" Received: by mail-pg1-f180.google.com with SMTP id 41be03b00d2f7-6c4926bf9baso3766379a12.2 for ; Mon, 10 Jun 2024 15:25:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1718058350; x=1718663150; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dSTUD4Ocrb2gEGomy7xAcQdY/lBQY+IJMt+9e60LLYI=; b=R/iJd/+V4lGi8cWA2GXBSe7IyiPuuSCH/bAbe6TcWiSRdroDcFX0mVMSqG+To4W+uN JCyJ/xX+IUyEI75ZVMGdKCa21suBaTqYOgxelbg1GESYfB+2hPIMwyqQstaiqTtz3lRo 5carxT1mvbOMl0DggOgWT/XCPLyprO7RX3ELA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718058350; x=1718663150; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dSTUD4Ocrb2gEGomy7xAcQdY/lBQY+IJMt+9e60LLYI=; b=nhNjogoThuMKVhamdQM7NU84iG00JhqbHBQ+pwV2JQ1SwODTWInjeAeOH2jzTlBrWJ 6GCdG1d2NHdgtoNPC6PJ4QNAkAMH7Cqv8tDYuEh5+xzO9EObErRuXf2TETy2Mk6qwu5R 25m9m0GiYSLD25+dJ1CfK3TReuCn8h9BzGPybvE2MgXOyp2LUyx8qtwJKDP6SmRFIxMy +xxNU7rEgfMNvGD5XmdwItrZ7A3FP7oISRFOLF0uOSt4mFdqq7yzlU3utHTg6uWoWhyQ xUUkiA/EZATZ7RPn8r8q0lj9rFILSEs2YrcZJmTVPscYAJqX0bIJKFxYCJssLqhXew6A 40/g== X-Forwarded-Encrypted: i=1; AJvYcCV7t/Ilj3rBeAPuJi+1ZUfnAgfOV0vxqhKe/GrcPGqvGNGWAsZx//ZwYBt4yXdQHWrdQnM2Q+YVKTbYmJ0iy0BVmmY0fwVDmZTPRYMz X-Gm-Message-State: AOJu0YwbeYaiFwiYCDSc/UPkFFwjLoPG37Dqgt43BfFL6nZOAl6pUiH+ SS+veyUnafeqcyIOn0YbI9EwtRYajnqh1H2ztFTZ+qQ8DjJIgGDpy6DI6+DbFA== X-Google-Smtp-Source: AGHT+IHqIr8vpRYc4uwmzpno3iUSS3wJCJ9L8/7MUrxcgwNdr5ZSOTxy7x+jFDss8DeytLWBFbynFg== X-Received: by 2002:a17:902:c406:b0:1f6:7212:75f0 with SMTP id d9443c01a7336-1f6d02e234emr130658925ad.17.1718058350584; Mon, 10 Jun 2024 15:25:50 -0700 (PDT) Received: from dianders.sjc.corp.google.com ([2620:15c:9d:2:bba2:69f4:1b51:d0f5]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f71029e223sm29212325ad.170.2024.06.10.15.25.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Jun 2024 15:25:49 -0700 (PDT) From: Douglas Anderson To: Greg Kroah-Hartman , Jiri Slaby Cc: Yicong Yang , Tony Lindgren , Andy Shevchenko , Johan Hovold , John Ogness , linux-arm-msm@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Stephen Boyd , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Douglas Anderson , Rob Herring , Vijaya Krishna Nivarthi Subject: [PATCH v4 5/8] serial: qcom-geni: Introduce qcom_geni_serial_poll_bitfield() Date: Mon, 10 Jun 2024 15:24:23 -0700 Message-ID: <20240610152420.v4.5.Ic6411eab8d9d37acc451705f583fb535cd6dadb2@changeid> X-Mailer: git-send-email 2.45.2.505.gda0bf45e8d-goog In-Reply-To: <20240610222515.3023730-1-dianders@chromium.org> References: <20240610222515.3023730-1-dianders@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" With a small modification the qcom_geni_serial_poll_bit() function could be used to poll more than just a single bit. Let's generalize it. We'll make the qcom_geni_serial_poll_bit() into just a wrapper of the general function. Signed-off-by: Douglas Anderson Reviewed-by: Konrad Dybcio --- The new function isn't used yet (except by the wrapper) but will be used in a future change. (no changes since v2) Changes in v2: - New drivers/tty/serial/qcom_geni_serial.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qco= m_geni_serial.c index db933a1549ad..bd03b998ed04 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -264,8 +264,8 @@ static bool qcom_geni_serial_secondary_active(struct ua= rt_port *uport) return readl(uport->membase + SE_GENI_STATUS) & S_GENI_CMD_ACTIVE; } =20 -static bool qcom_geni_serial_poll_bit(struct uart_port *uport, - unsigned int offset, u32 field, bool set) +static bool qcom_geni_serial_poll_bitfield(struct uart_port *uport, + unsigned int offset, u32 field, u32 val) { u32 reg; unsigned long timeout_us; @@ -294,7 +294,7 @@ static bool qcom_geni_serial_poll_bit(struct uart_port = *uport, */ while (timeout_us) { reg =3D readl(uport->membase + offset); - if ((bool)(reg & field) =3D=3D set) + if ((reg & field) =3D=3D val) return true; udelay(10); timeout_us -=3D 10; @@ -302,6 +302,12 @@ static bool qcom_geni_serial_poll_bit(struct uart_port= *uport, return false; } =20 +static bool qcom_geni_serial_poll_bit(struct uart_port *uport, + unsigned int offset, u32 field, bool set) +{ + return qcom_geni_serial_poll_bitfield(uport, offset, field, set ? field := 0); +} + static void qcom_geni_serial_setup_tx(struct uart_port *uport, u32 xmit_si= ze) { u32 m_cmd; --=20 2.45.2.505.gda0bf45e8d-goog