From nobody Thu Feb 12 19:04:30 2026 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B71F7225CE; Mon, 10 Jun 2024 07:18:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718003895; cv=none; b=U3pie1/ZFYQloXjCXgYzXjH7GFzKyWbUKTz50VJTBGZR4T7VW3XbxzRUNr4+k3SxHAJw+w0lflIixi5RppooLOPWPbiMkB3EAR4yFEgtLDc34LLRcByDV00IZQMyTOCD2iWfRulFt8SjV5Y+UntX0s8CNLE5Lo515q9LaZGS1Rg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718003895; c=relaxed/simple; bh=hvTmYJeXRCa7YjqZ9W8Ny/Bvy3GoiYbqq4jHbid84Uc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=FtTVwxgJpWK3geJXw99axwNS6z/7ISZok5DwTmcmuCh5mASntSSqq0/v0YMfChV5rtmWgehuGMMP0Y1sGvFynPqeKdEf8uK+mI+0a3Uii0nGRvzZ9LjbFLUiK2KEx0FRdDcQOfO4c9f2VNz3qZeudC/NRu3HX2spKdbuV3nUnFo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=qkUEsUrd; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="qkUEsUrd" Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 459LZncj007336; Mon, 10 Jun 2024 09:17:53 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= CYOngEfmHe6b8YHe3S1okFn+ot5qSYTmSM0D/zq1qec=; b=qkUEsUrdJfYXc3zA 2PKjsQtYHwoGm2URhCpxmfEc5U8O9R25swgTz5gbV7BNh4Z/0qyu1Cgu00kYXpJM hyJdiH9kGKJxcmoGL4o2XfQTmwEWa9gi1yXc53S/zdiIT9CXz4kd8krh71hd063e nx2Z7SbEBoo2rQLwdzTdCWOGdiBo5ytgIM62dW7vTTndGN8ZmLk08PEaxscnizHd xM+tt2O9sdF6338OqsRa7HE3icBjiITZfw66f8/fbqcVBx+IYaAJyC9xwYW0KY6L WgpYzOj3TEzjysOw8EOTcPljVEX1Hc6S/Aymrmz6gRWIffHxc8E8o0MDFuEQsHfD MBH2ag== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3ymce5nk9e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Jun 2024 09:17:53 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id BDE4740048; Mon, 10 Jun 2024 09:17:46 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E564D210758; Mon, 10 Jun 2024 09:16:33 +0200 (CEST) Received: from localhost (10.48.86.164) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 10 Jun 2024 09:16:33 +0200 From: Christophe Roullier To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown , Christophe Roullier , Marek Vasut CC: , , , , Subject: [net-next,PATCH v6 8/8] net: stmmac: dwmac-stm32: add management of stm32mp13 for stm32 Date: Mon, 10 Jun 2024 09:14:59 +0200 Message-ID: <20240610071459.287500-9-christophe.roullier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240610071459.287500-1-christophe.roullier@foss.st.com> References: <20240610071459.287500-1-christophe.roullier@foss.st.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-10_02,2024-06-06_02,2024-05-17_01 Content-Type: text/plain; charset="utf-8" Add Ethernet support for STM32MP13. STM32MP13 is STM32 SOC with 2 GMACs instances. GMAC IP version is SNPS 4.20. GMAC IP configure with 1 RX and 1 TX queue. DMA HW capability register supported RX Checksum Offload Engine supported TX Checksum insertion supported Wake-Up On Lan supported TSO supported Signed-off-by: Christophe Roullier Reviewed-by: Marek Vasut --- .../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 24 +++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/ne= t/ethernet/stmicro/stmmac/dwmac-stm32.c index 09ff0be0bdcdc..b8b3e04ca3ec8 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c @@ -104,6 +104,7 @@ struct stm32_ops { int (*parse_data)(struct stm32_dwmac *dwmac, struct device *dev); bool clk_rx_enable_in_suspend; + bool is_mp13; u32 syscfg_clr_off; }; =20 @@ -224,11 +225,18 @@ static int stm32mp1_configure_pmcr(struct plat_stmmac= enet_data *plat_dat) { struct stm32_dwmac *dwmac =3D plat_dat->bsp_priv; u32 reg =3D dwmac->mode_reg; - int val; + int val =3D 0; =20 switch (plat_dat->mac_interface) { case PHY_INTERFACE_MODE_MII: - val =3D SYSCFG_PMCR_ETH_SEL_MII; + /* + * STM32MP15xx supports both MII and GMII, STM32MP13xx MII only. + * SYSCFG_PMCSETR ETH_SELMII is present only on STM32MP15xx and + * acts as a selector between 0:GMII and 1:MII. As STM32MP13xx + * supports only MII, ETH_SELMII is not present. + */ + if (!dwmac->ops->is_mp13) /* Select MII mode on STM32MP15xx */ + val |=3D SYSCFG_PMCR_ETH_SEL_MII; break; case PHY_INTERFACE_MODE_GMII: val =3D SYSCFG_PMCR_ETH_SEL_GMII; @@ -560,12 +568,24 @@ static struct stm32_ops stm32mp1_dwmac_data =3D { .resume =3D stm32mp1_resume, .parse_data =3D stm32mp1_parse_data, .syscfg_clr_off =3D 0x44, + .is_mp13 =3D false, + .clk_rx_enable_in_suspend =3D true +}; + +static struct stm32_ops stm32mp13_dwmac_data =3D { + .set_mode =3D stm32mp1_set_mode, + .suspend =3D stm32mp1_suspend, + .resume =3D stm32mp1_resume, + .parse_data =3D stm32mp1_parse_data, + .syscfg_clr_off =3D 0x08, + .is_mp13 =3D true, .clk_rx_enable_in_suspend =3D true }; =20 static const struct of_device_id stm32_dwmac_match[] =3D { { .compatible =3D "st,stm32-dwmac", .data =3D &stm32mcu_dwmac_data}, { .compatible =3D "st,stm32mp1-dwmac", .data =3D &stm32mp1_dwmac_data}, + { .compatible =3D "st,stm32mp13-dwmac", .data =3D &stm32mp13_dwmac_data}, { } }; MODULE_DEVICE_TABLE(of, stm32_dwmac_match); --=20 2.25.1