From nobody Thu Feb 12 17:28:58 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFBF715CE for ; Mon, 10 Jun 2024 00:39:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717979978; cv=none; b=ZuhIY1LbrAUAhX51ODTNkEeoUg1NbTCPCZoADIK4WrRhMZKN9rMHefRtQuYAlharYaklITNo3cypUvkkh6hkyqloa0IJYnqoPK7MZ+3QfSicoF2JSUASpVwZ4cY7uG+R2epnyUg+p7c4AcPPGx7izJWq3qctx2Hii/ea3bwoYmU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717979978; c=relaxed/simple; bh=KrgBmWQXmMI5ZHOl1JgRcgR4CFvwj+D+f1AyQNCY1ys=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WERo0o21nELDtUu1EYTsKCwPv/IGJ0p4ju4TBgJBEXzPgHmDbZiOs04Xx6vNOoHvdPx1MUJCdlc36MOhNPvFWBADSpXcD/x7ec6OOogz2yhesxtH411/+LPx0+gMAt4NuCGDgNlK27Gzmx3rtcCF1BTRWz6GOZNGBo1O1x0peBw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=iWiVSvC3; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="iWiVSvC3" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717979977; x=1749515977; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KrgBmWQXmMI5ZHOl1JgRcgR4CFvwj+D+f1AyQNCY1ys=; b=iWiVSvC3CMWTGMRwAjtL/LqoEd8NkY6injUh9I7N8j6hD0gatf1C7/0n hSb8Jfd3JzVyL1rqsy4B0seExMTaH5gjceBa1myTCfSTU/MhEFJPxdE5X /YKW3dPAPMovU86S1NNpH8U3cLNHtAKETkujntclYwxPeeZ6iNG6OPo0s 9c8BtGb7Tw93FePv65el27Oe8+R36WuCoItCaE9haxSgpnlr4+lvyZ2ej LOmGCNS4fuzYXPua/BhSSbM8ks57DTu5b54qWUfr7+yledjKi/SjNjOEG o+3ImQbHGFvn6Qo2lXhTX2fQ7Vvne/vuJoxPvP+h96aC2RZFagzg7G/er g==; X-CSE-ConnectionGUID: QQpEXxpXR+SBMxA5/MSHKA== X-CSE-MsgGUID: YkX/8Cm8Qr2HEQ1hmD5wag== X-IronPort-AV: E=McAfee;i="6600,9927,11098"; a="37154962" X-IronPort-AV: E=Sophos;i="6.08,226,1712646000"; d="scan'208";a="37154962" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2024 17:39:35 -0700 X-CSE-ConnectionGUID: JaP/M0FfTe+VNnklssA+cw== X-CSE-MsgGUID: BHrBrcuFTY6GWYbyn2sMVw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,226,1712646000"; d="scan'208";a="38829877" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2024 17:39:36 -0700 From: Tony Luck To: Borislav Petkov Cc: x86@kernel.org, Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v4 1/4] cpu: Move CPU hotplug function declarations into their own header Date: Sun, 9 Jun 2024 17:39:24 -0700 Message-ID: <20240610003927.341707-2-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240610003927.341707-1-tony.luck@intel.com> References: <20240610003927.341707-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Avoid upcoming #include hell when wants to use lockdep_assert_cpus_held() and creates a #include loop that would break the build for arch/riscv. Signed-off-by: Tony Luck --- include/linux/cpu.h | 33 +-------------------------- include/linux/cpuhplock.h | 47 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+), 32 deletions(-) create mode 100644 include/linux/cpuhplock.h diff --git a/include/linux/cpu.h b/include/linux/cpu.h index 861c3bfc5f17..a8926d0a28cd 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h @@ -18,6 +18,7 @@ #include #include #include +#include #include =20 struct device; @@ -132,38 +133,6 @@ static inline int add_cpu(unsigned int cpu) { return 0= ;} #endif /* CONFIG_SMP */ extern const struct bus_type cpu_subsys; =20 -extern int lockdep_is_cpus_held(void); - -#ifdef CONFIG_HOTPLUG_CPU -extern void cpus_write_lock(void); -extern void cpus_write_unlock(void); -extern void cpus_read_lock(void); -extern void cpus_read_unlock(void); -extern int cpus_read_trylock(void); -extern void lockdep_assert_cpus_held(void); -extern void cpu_hotplug_disable(void); -extern void cpu_hotplug_enable(void); -void clear_tasks_mm_cpumask(int cpu); -int remove_cpu(unsigned int cpu); -int cpu_device_down(struct device *dev); -extern void smp_shutdown_nonboot_cpus(unsigned int primary_cpu); - -#else /* CONFIG_HOTPLUG_CPU */ - -static inline void cpus_write_lock(void) { } -static inline void cpus_write_unlock(void) { } -static inline void cpus_read_lock(void) { } -static inline void cpus_read_unlock(void) { } -static inline int cpus_read_trylock(void) { return true; } -static inline void lockdep_assert_cpus_held(void) { } -static inline void cpu_hotplug_disable(void) { } -static inline void cpu_hotplug_enable(void) { } -static inline int remove_cpu(unsigned int cpu) { return -EPERM; } -static inline void smp_shutdown_nonboot_cpus(unsigned int primary_cpu) { } -#endif /* !CONFIG_HOTPLUG_CPU */ - -DEFINE_LOCK_GUARD_0(cpus_read_lock, cpus_read_lock(), cpus_read_unlock()) - #ifdef CONFIG_PM_SLEEP_SMP extern int freeze_secondary_cpus(int primary); extern void thaw_secondary_cpus(void); diff --git a/include/linux/cpuhplock.h b/include/linux/cpuhplock.h new file mode 100644 index 000000000000..d42d2434dab6 --- /dev/null +++ b/include/linux/cpuhplock.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * include/linux/cpuhplock.h - cpu hotplug locking + * + * Locking functions for CPU hot plug. + */ +#ifndef _LINUX_CPUHPLOCK_H_ +#define _LINUX_CPUHPLOCK_H_ + +#include +#include + +struct device; + +extern int lockdep_is_cpus_held(void); + +#ifdef CONFIG_HOTPLUG_CPU +extern void cpus_write_lock(void); +extern void cpus_write_unlock(void); +extern void cpus_read_lock(void); +extern void cpus_read_unlock(void); +extern int cpus_read_trylock(void); +extern void lockdep_assert_cpus_held(void); +extern void cpu_hotplug_disable(void); +extern void cpu_hotplug_enable(void); +void clear_tasks_mm_cpumask(int cpu); +int remove_cpu(unsigned int cpu); +int cpu_device_down(struct device *dev); +extern void smp_shutdown_nonboot_cpus(unsigned int primary_cpu); + +#else /* CONFIG_HOTPLUG_CPU */ + +static inline void cpus_write_lock(void) { } +static inline void cpus_write_unlock(void) { } +static inline void cpus_read_lock(void) { } +static inline void cpus_read_unlock(void) { } +static inline int cpus_read_trylock(void) { return true; } +static inline void lockdep_assert_cpus_held(void) { } +static inline void cpu_hotplug_disable(void) { } +static inline void cpu_hotplug_enable(void) { } +static inline int remove_cpu(unsigned int cpu) { return -EPERM; } +static inline void smp_shutdown_nonboot_cpus(unsigned int primary_cpu) { } +#endif /* !CONFIG_HOTPLUG_CPU */ + +DEFINE_LOCK_GUARD_0(cpus_read_lock, cpus_read_lock(), cpus_read_unlock()) + +#endif /* _LINUX_CPUHPLOCK_H_ */ --=20 2.45.0 From nobody Thu Feb 12 17:28:58 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8955717F6 for ; Mon, 10 Jun 2024 00:39:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717979980; cv=none; b=tebbT6YvXxaWHmTBrGK0U4HT9KWsy+Hbh8K4vx81pwM0JL/lkTPTahf0IjJJl75iqjXWmPkuYCbLcRkQrUsoOhLw1td/d+R3Ysyok/+R4roq9vqnxSumMhd9jxAWbzAoFVb/o9NGcdsHbQQ3+8Hae//M96BBmqENmIBEOnVDLw4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717979980; 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d="scan'208";a="38829881" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2024 17:39:36 -0700 From: Tony Luck To: Borislav Petkov Cc: x86@kernel.org, Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v4 2/4] cpu: Drop "extern" from function declarations in cpuhplock.h Date: Sun, 9 Jun 2024 17:39:25 -0700 Message-ID: <20240610003927.341707-3-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240610003927.341707-1-tony.luck@intel.com> References: <20240610003927.341707-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This file was created with a direct cut and paste from cpu.h so kept the legacy declaration style. But the Linux coding standard for function declarations in header files is to avoid use of "extern". Drop "extern" from all function declarations. Signed-off-by: Tony Luck --- include/linux/cpuhplock.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/include/linux/cpuhplock.h b/include/linux/cpuhplock.h index d42d2434dab6..999f475bea98 100644 --- a/include/linux/cpuhplock.h +++ b/include/linux/cpuhplock.h @@ -15,18 +15,18 @@ struct device; extern int lockdep_is_cpus_held(void); =20 #ifdef CONFIG_HOTPLUG_CPU -extern void cpus_write_lock(void); -extern void cpus_write_unlock(void); -extern void cpus_read_lock(void); -extern void cpus_read_unlock(void); -extern int cpus_read_trylock(void); -extern void lockdep_assert_cpus_held(void); -extern void cpu_hotplug_disable(void); -extern void cpu_hotplug_enable(void); +void cpus_write_lock(void); +void cpus_write_unlock(void); +void cpus_read_lock(void); +void cpus_read_unlock(void); +int cpus_read_trylock(void); +void lockdep_assert_cpus_held(void); +void cpu_hotplug_disable(void); +void cpu_hotplug_enable(void); void clear_tasks_mm_cpumask(int cpu); int remove_cpu(unsigned int cpu); int cpu_device_down(struct device *dev); -extern void smp_shutdown_nonboot_cpus(unsigned int primary_cpu); +void smp_shutdown_nonboot_cpus(unsigned int primary_cpu); =20 #else /* CONFIG_HOTPLUG_CPU */ =20 --=20 2.45.0 From nobody Thu Feb 12 17:28:58 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A92C01869 for ; Mon, 10 Jun 2024 00:39:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717979980; cv=none; b=iT7BnxwDZtXA/WjIjsi4OwQ+XPFZQlen1+RHcvp3ayusZnsVb5LwajeRXzt0wjji8xaL8+z+kPSWQfFleTb8HZq25/WA41hPL2nXMj6rYX9n2Cp+GYzAdvveVY2TugJZdNzVLfQNcCryEbWi3xY3eOQU/4J2vzEJDq9blawrjBM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717979980; c=relaxed/simple; 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d="scan'208";a="38829884" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2024 17:39:36 -0700 From: Tony Luck To: Borislav Petkov Cc: x86@kernel.org, Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v4 3/4] cacheinfo: Add function to get cacheinfo for a given (cpu, cachelevel) Date: Sun, 9 Jun 2024 17:39:26 -0700 Message-ID: <20240610003927.341707-4-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240610003927.341707-1-tony.luck@intel.com> References: <20240610003927.341707-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Resctrl code open codes a search for information about a given cache level in a couple of places (and more are on the way). Provide a new inline function get_cpu_cacheinfo_level() in to do the search and return a pointer to the cacheinfo structure. Add lockdep_assert_cpus_held() to enforce the comment that cpuhp lock must be held. Simplify the existing get_cpu_cacheinfo_id() by using this new function to do the search. Signed-off-by: Tony Luck Reviewed-by: Reinette Chatre --- include/linux/cacheinfo.h | 25 ++++++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index 2cb15fe4fe12..3dde175f4108 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -3,6 +3,7 @@ #define _LINUX_CACHEINFO_H =20 #include +#include #include #include =20 @@ -113,23 +114,37 @@ int acpi_get_cache_info(unsigned int cpu, const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_= leaf); =20 /* - * Get the id of the cache associated with @cpu at level @level. + * Get the cacheinfo structure for the cache associated with @cpu at + * level @level. * cpuhp lock must be held. */ -static inline int get_cpu_cacheinfo_id(int cpu, int level) +static inline struct cacheinfo *get_cpu_cacheinfo_level(int cpu, int level) { struct cpu_cacheinfo *ci =3D get_cpu_cacheinfo(cpu); int i; =20 + lockdep_assert_cpus_held(); + for (i =3D 0; i < ci->num_leaves; i++) { if (ci->info_list[i].level =3D=3D level) { if (ci->info_list[i].attributes & CACHE_ID) - return ci->info_list[i].id; - return -1; + return &ci->info_list[i]; + return NULL; } } =20 - return -1; + return NULL; +} + +/* + * Get the id of the cache associated with @cpu at level @level. + * cpuhp lock must be held. + */ +static inline int get_cpu_cacheinfo_id(int cpu, int level) +{ + struct cacheinfo *ci =3D get_cpu_cacheinfo_level(cpu, level); + + return ci ? ci->id : -1; } =20 #ifdef CONFIG_ARM64 --=20 2.45.0 From nobody Thu Feb 12 17:28:58 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1B9D1879 for ; Mon, 10 Jun 2024 00:39:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717979980; cv=none; b=SPRmahg3COdPxqGwYUAKz9sXgSTc9I7zCBn0x30gRkJAGOytd9Cx6D2ZZ2ppHuQzghZYJVEQak+HwdMcnCjKCvnNbUYt7vO02DEKTXplxl4vOf7kRw31ZnwEJa33KCOUuX4TEgYDV7VQ7RC5/JEFCdOkVZ189Xg3WdsvpUruWI0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717979980; c=relaxed/simple; bh=RmlyFZFXIPl3nE3NosJA82cQlJCREl1lNzarMkr1BuQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RDcuUL/JVP33fQlcB+uIx1qNW/3nPYAG8miiFl8qeCA7+7IVrI7Tx9us6ORqjlsRVsJUE2rZGHbf0CBvDY3ab0Ew8o6fR2QJNnaKmiDenscXaZa9BNGn7gET/7/Mio1COneK6RgUT83Yu+efXBzpOux4BiEe1Ho+OoRRWcgnRQg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nlHU+imG; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nlHU+imG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717979978; x=1749515978; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RmlyFZFXIPl3nE3NosJA82cQlJCREl1lNzarMkr1BuQ=; b=nlHU+imGRdR2MZ15/V1Pc1HwzmcDDJCHikw1y9gWXfZq0qzp85o+e1lW c4/xHzMUEA4MWiVn6ztTlwr/Yt52RHl99FqX8lx9fhEG7D5jaIjRaFZ/l JztjkzvzeKGvsPEKB0fgLQdUFAzdwtFUfhcXZawqAyQ+lMuS0wftQUolS ZbFRZQE2pCTjcYXJG4Q+rifQhSTRLE1+EIiZBaeac3WTiamgMQ6huS/CH PH2eytDC5nBJlhUIekMv624kvmIEygGJR/i0d9buazzZaUXg/RVUXQ6CL GVoqySE+Fr3H1ew9YikWmunvpHVjvew/TvDa3mfjdwZ4NFqf3KePdr+I0 A==; X-CSE-ConnectionGUID: zB6OoPN/RjyIkVuNqf1c6A== X-CSE-MsgGUID: ltqxHOSCTziKkzs25pzebg== X-IronPort-AV: E=McAfee;i="6600,9927,11098"; a="37154986" X-IronPort-AV: E=Sophos;i="6.08,226,1712646000"; d="scan'208";a="37154986" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2024 17:39:36 -0700 X-CSE-ConnectionGUID: 7h+fxINfQfe2DNAQAI8j7Q== X-CSE-MsgGUID: XBNWwJQeQFCgJi5+7zGlvA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,226,1712646000"; d="scan'208";a="38829888" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2024 17:39:36 -0700 From: Tony Luck To: Borislav Petkov Cc: x86@kernel.org, Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v4 4/4] x86/resctrl: Replace open code cacheinfo searches Date: Sun, 9 Jun 2024 17:39:27 -0700 Message-ID: <20240610003927.341707-5-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240610003927.341707-1-tony.luck@intel.com> References: <20240610003927.341707-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" pseudo_lock_region_init() and rdtgroup_cbm_to_size() open code a search for details of a particular cache level. Replace with get_cpu_cacheinfo_level() Signed-off-by: Tony Luck Reviewed-by: Reinette Chatre --- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 17 ++++++----------- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 14 +++++--------- 2 files changed, 11 insertions(+), 20 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index aacf236dfe3b..1bbfd3c1e300 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -292,9 +292,8 @@ static void pseudo_lock_region_clear(struct pseudo_lock= _region *plr) */ static int pseudo_lock_region_init(struct pseudo_lock_region *plr) { - struct cpu_cacheinfo *ci; + struct cacheinfo *ci; int ret; - int i; =20 /* Pick the first cpu we find that is associated with the cache. */ plr->cpu =3D cpumask_first(&plr->d->cpu_mask); @@ -306,15 +305,11 @@ static int pseudo_lock_region_init(struct pseudo_lock= _region *plr) goto out_region; } =20 - ci =3D get_cpu_cacheinfo(plr->cpu); - - plr->size =3D rdtgroup_cbm_to_size(plr->s->res, plr->d, plr->cbm); - - for (i =3D 0; i < ci->num_leaves; i++) { - if (ci->info_list[i].level =3D=3D plr->s->res->cache_level) { - plr->line_size =3D ci->info_list[i].coherency_line_size; - return 0; - } + ci =3D get_cpu_cacheinfo_level(plr->cpu, plr->s->res->cache_level); + if (ci) { + plr->line_size =3D ci->coherency_line_size; + plr->size =3D rdtgroup_cbm_to_size(plr->s->res, plr->d, plr->cbm); + return 0; } =20 ret =3D -1; diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 02f213f1c51c..cb68a121dabb 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1450,18 +1450,14 @@ static ssize_t rdtgroup_mode_write(struct kernfs_op= en_file *of, unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r, struct rdt_domain *d, unsigned long cbm) { - struct cpu_cacheinfo *ci; unsigned int size =3D 0; - int num_b, i; + struct cacheinfo *ci; + int num_b; =20 num_b =3D bitmap_weight(&cbm, r->cache.cbm_len); - ci =3D get_cpu_cacheinfo(cpumask_any(&d->cpu_mask)); - for (i =3D 0; i < ci->num_leaves; i++) { - if (ci->info_list[i].level =3D=3D r->cache_level) { - size =3D ci->info_list[i].size / r->cache.cbm_len * num_b; - break; - } - } + ci =3D get_cpu_cacheinfo_level(cpumask_any(&d->cpu_mask), r->cache_level); + if (ci) + size =3D ci->size / r->cache.cbm_len * num_b; =20 return size; } --=20 2.45.0