From nobody Tue Dec 16 20:43:45 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80C3617B508; Sat, 8 Jun 2024 15:57:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717862241; cv=none; b=ub/nxln4oXzocKLCm9NYgaFNtRte2hufr3rC8YSVRLKImFskN5RL0IvIjN1Bq5WYGQXDmAqi1K/Q7UWuI9QJ3hsp3XDGpl3TR9+lc0/zf4R4XLzR02OWgcalTw/mRotq1YWW+qCbTvq8u+XIZjD38srIAgeAIGtdDyd6K/jrAoU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717862241; c=relaxed/simple; bh=mrE9CflCyD5JGJU45JpmcouGaGOztDkM/lJ4oalLK0c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Frfs9URPqNh3cyDffZUYOaqJAoeBAMY9YjL/iKlQGnQhwtlchkNYiLoPXNQlCAX7QmZ3qf8T8u10BbMhCuaPoeaEGVTckJ80nEmmM2YHtcCx4TuymEGHdmlsmYhcvYnatOjQq3Z3E+u2pG01ppguYLxTJtReZBva4P4SZYqdkLI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oGxkhm4Y; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oGxkhm4Y" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 10A95C4DE00; Sat, 8 Jun 2024 15:57:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717862241; bh=mrE9CflCyD5JGJU45JpmcouGaGOztDkM/lJ4oalLK0c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oGxkhm4YIAttg9cFJNPyiFrl4ijOQsL6rfF0KwRw5jU1mDiWrWCwCzuCQrMoO5eaE KPr+719Jx14U6SK4/vpnlrNvSRKI0alg300+P0XM2WSWT9vqWub/6aylm0OC417psp e/ymxXVIA+KtjVcZJibDuxcoHWwS9Fw1IHS+ilwdYLA12NrytGF2P/dRN1UsUb8WAK vs8uKTH5q4fzREncAidWEFyuc+BnC5d/3xdzooIPSL8He+WJlqmMkzcoRyAxWKHUyO ZUXo1lItASsMG+zMOszCVF5WpzKnacEjd7AxbVAq968ue+LF6Lx7eqIO1fU4zC2yPW z3dfc2F9xjNkQ== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sFyRU-000000003QN-2Rhf; Sat, 08 Jun 2024 17:57:20 +0200 From: Johan Hovold To: Lee Jones , Mark Brown , Bjorn Andersson Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Liam Girdwood , Das Srinagesh , Satya Priya Kakitapalli , Linus Walleij , Stephen Boyd , Bryan O'Donoghue , Andy Shevchenko , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 12/12] arm64: dts: qcom: sc8280xp-x13s: enable pm8008 camera pmic Date: Sat, 8 Jun 2024 17:55:26 +0200 Message-ID: <20240608155526.12996-13-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.1 In-Reply-To: <20240608155526.12996-1-johan+linaro@kernel.org> References: <20240608155526.12996-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable the PM8008 PMIC which is used to power the camera sensors. Reviewed-by: Bryan O'Donoghue Tested-by: Bryan O'Donoghue Signed-off-by: Johan Hovold Reviewed-by: Konrad Dybcio --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 123 ++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/a= rch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 642705b7d896..daca6bd2e34c 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -297,6 +297,27 @@ linux,cma { }; =20 thermal-zones { + pm8008-thermal { + polling-delay-passive =3D <100>; + polling-delay =3D <0>; + + thermal-sensors =3D <&pm8008>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + skin-temp-thermal { polling-delay-passive =3D <250>; polling-delay =3D <0>; @@ -671,6 +692,85 @@ touchscreen@10 { }; }; =20 +&i2c11 { + clock-frequency =3D <400000>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c11_default>; + + status =3D "okay"; + + pm8008: pmic@c { + compatible =3D "qcom,pm8008"; + reg =3D <0xc>; + + interrupts-extended =3D <&tlmm 41 IRQ_TYPE_EDGE_RISING>; + reset-gpios =3D <&tlmm 42 GPIO_ACTIVE_LOW>; + + vdd-l1-l2-supply =3D <&vreg_s11b>; + vdd-l3-l4-supply =3D <&vreg_bob>; + vdd-l5-supply =3D <&vreg_bob>; + vdd-l6-supply =3D <&vreg_bob>; + vdd-l7-supply =3D <&vreg_bob>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pm8008_default>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pm8008 0 0 2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + + #thermal-sensor-cells =3D <0>; + + regulators { + vreg_l1q: ldo1 { + regulator-name =3D "vreg_l1q"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + }; + + vreg_l2q: ldo2 { + regulator-name =3D "vreg_l2q"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + }; + + vreg_l3q: ldo3 { + regulator-name =3D "vreg_l3q"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + }; + + vreg_l4q: ldo4 { + regulator-name =3D "vreg_l4q"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + }; + + vreg_l5q: ldo5 { + regulator-name =3D "vreg_l5q"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + vreg_l6q: ldo6 { + regulator-name =3D "vreg_l6q"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + vreg_l7q: ldo7 { + regulator-name =3D "vreg_l7q"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + }; + }; + }; +}; + &i2c21 { clock-frequency =3D <400000>; =20 @@ -1361,6 +1461,13 @@ i2c4_default: i2c4-default-state { bias-disable; }; =20 + i2c11_default: i2c11-default-state { + pins =3D "gpio18", "gpio19"; + function =3D "qup11"; + drive-strength =3D <16>; + bias-disable; + }; + i2c21_default: i2c21-default-state { pins =3D "gpio81", "gpio82"; function =3D "qup21"; @@ -1464,6 +1571,22 @@ wake-n-pins { }; }; =20 + pm8008_default: pm8008-default-state { + int-pins { + pins =3D "gpio41"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + + reset-n-pins { + pins =3D "gpio42"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + }; + spkr_1_sd_n_default: spkr-1-sd-n-default-state { perst-n-pins { pins =3D "gpio178"; --=20 2.44.1