From nobody Thu Feb 12 23:07:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1463E198A22 for ; Thu, 6 Jun 2024 16:40:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717692059; cv=none; b=my40Qjb2fESnun2i9aEERXaMMSUwtQaI4Ux8tFFoZbCPKEp3b+XEDYtHN1HQbrgvh0pASdBiOv6X9JKG5uusXaotUnfqsfyxSF7gm6uIbdpyv64OGS7Q+1m6E2bMuGs5+7vdVrR6T9VWDISZIPQps6lbHWYCOEpEJSofTb7q/7Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717692059; c=relaxed/simple; bh=RmlyFZFXIPl3nE3NosJA82cQlJCREl1lNzarMkr1BuQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SAnzCeR7bAg5+Lr8y0+Mpb2p97+6iVRhCQuJ8l9gx/FQFzxCII9b/riewAz4mXDBTg2lYfe/zhrD6RmAfGHULluM80y8wIdaIhWObCWZbBmwEiP0PUwld4mM6XpR7LGc95z0DTXYmhMR5iHa8FChpNtZaAEI5ueFqOrQWMk384o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=RXFlaGHr; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="RXFlaGHr" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717692058; x=1749228058; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RmlyFZFXIPl3nE3NosJA82cQlJCREl1lNzarMkr1BuQ=; b=RXFlaGHr/GAGsS1h1k/89eaviPEUG711/V/1V84akMQvlfsLIIg2JUYl 2CUerWHBfSXFo2WYi/rF8jXDYn7TZt7lqvtjRKNr/s+Gu2kjPS1vvXYJS I7Adl3ZioKDch929bU2GJzE06YpoDhnPM4J7FBRa1Q3G92X+JQIFoW2P7 jZJkBhAF0M3dgiLGVjlrMcLJ8lhXrwSneNuMJ5gutfLoU84OSNKpDE3eG 0m8zEc+gCQVzmKnOBODrYTu9gJTiXSeSfWPfFNiUEqxuCB2N50eWXHo8a IjfOVFv9UeUnRFWlVzRb7asXDqDwA5PpBoPSulEg3W+lIoNX6P9kHZ1Mp A==; X-CSE-ConnectionGUID: mrtJZItGT5Kv0Dpljrp5lA== X-CSE-MsgGUID: hFxwg+JrS2SAWZj6mRmvOA== X-IronPort-AV: E=McAfee;i="6600,9927,11095"; a="14214924" X-IronPort-AV: E=Sophos;i="6.08,219,1712646000"; d="scan'208";a="14214924" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jun 2024 09:40:55 -0700 X-CSE-ConnectionGUID: y8y2lb7hTYyloqRnKfn7ZA== X-CSE-MsgGUID: cWeFKkAYQZeYvCJGXGOWpg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,219,1712646000"; d="scan'208";a="38033095" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jun 2024 09:40:55 -0700 From: Tony Luck To: Borislav Petkov Cc: x86@kernel.org, Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v3 2/2] x86/resctrl: Replace open code cacheinfo searches Date: Thu, 6 Jun 2024 09:40:47 -0700 Message-ID: <20240606164047.318378-3-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240606164047.318378-1-tony.luck@intel.com> References: <20240606164047.318378-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" pseudo_lock_region_init() and rdtgroup_cbm_to_size() open code a search for details of a particular cache level. Replace with get_cpu_cacheinfo_level() Signed-off-by: Tony Luck Reviewed-by: Reinette Chatre --- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 17 ++++++----------- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 14 +++++--------- 2 files changed, 11 insertions(+), 20 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index aacf236dfe3b..1bbfd3c1e300 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -292,9 +292,8 @@ static void pseudo_lock_region_clear(struct pseudo_lock= _region *plr) */ static int pseudo_lock_region_init(struct pseudo_lock_region *plr) { - struct cpu_cacheinfo *ci; + struct cacheinfo *ci; int ret; - int i; =20 /* Pick the first cpu we find that is associated with the cache. */ plr->cpu =3D cpumask_first(&plr->d->cpu_mask); @@ -306,15 +305,11 @@ static int pseudo_lock_region_init(struct pseudo_lock= _region *plr) goto out_region; } =20 - ci =3D get_cpu_cacheinfo(plr->cpu); - - plr->size =3D rdtgroup_cbm_to_size(plr->s->res, plr->d, plr->cbm); - - for (i =3D 0; i < ci->num_leaves; i++) { - if (ci->info_list[i].level =3D=3D plr->s->res->cache_level) { - plr->line_size =3D ci->info_list[i].coherency_line_size; - return 0; - } + ci =3D get_cpu_cacheinfo_level(plr->cpu, plr->s->res->cache_level); + if (ci) { + plr->line_size =3D ci->coherency_line_size; + plr->size =3D rdtgroup_cbm_to_size(plr->s->res, plr->d, plr->cbm); + return 0; } =20 ret =3D -1; diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 02f213f1c51c..cb68a121dabb 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1450,18 +1450,14 @@ static ssize_t rdtgroup_mode_write(struct kernfs_op= en_file *of, unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r, struct rdt_domain *d, unsigned long cbm) { - struct cpu_cacheinfo *ci; unsigned int size =3D 0; - int num_b, i; + struct cacheinfo *ci; + int num_b; =20 num_b =3D bitmap_weight(&cbm, r->cache.cbm_len); - ci =3D get_cpu_cacheinfo(cpumask_any(&d->cpu_mask)); - for (i =3D 0; i < ci->num_leaves; i++) { - if (ci->info_list[i].level =3D=3D r->cache_level) { - size =3D ci->info_list[i].size / r->cache.cbm_len * num_b; - break; - } - } + ci =3D get_cpu_cacheinfo_level(cpumask_any(&d->cpu_mask), r->cache_level); + if (ci) + size =3D ci->size / r->cache.cbm_len * num_b; =20 return size; } --=20 2.45.0