From nobody Thu Feb 12 23:20:10 2026 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5459713DDB6; Thu, 6 Jun 2024 08:09:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717661370; cv=none; b=WvtFndjwGqWBLvPdr6B/UNGTcLB5ikypQVpyoGCjZvDlYEieP4vz1SoEvbTPyxsyijS2nq1aAk9hdmknHH1QwnjWQIaiURG7T6JGczG0PUEALvBelq5nEej9bIqjD2LznXV9x/F3D2DKLrv9OF/RtaRRCuH7SfxwkkemNCGQOQo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717661370; c=relaxed/simple; bh=LssabN+XthOn6U6NE+DSU9k1nhNWks6ad+9GAqDUaI4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=jYgtLfqKcaziRLqw1T95iB+SZ5J2V6pu0ceYDTWkfvjwe04h4boMHBtiBYm9BkS7lYdoG0XPFUt1LExPz64qMrZxsKoH8UHzKIdMJkjqMr9lIO0o3blk4m8VZ1ppYideSRnCmaSo5p397Nokgm/GIV1VVWyDmVNYXK3yXcxnCuo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=dOAT8N+A; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="dOAT8N+A" Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 45689L2W051728; Thu, 6 Jun 2024 03:09:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1717661361; bh=F1/xNTjUNkjPqU5B/NvgKixmWsXl5A1tcGKVBAxVZqs=; h=From:Date:Subject:References:In-Reply-To:To:CC; b=dOAT8N+ARzkW+XmfhLrv5QGCVJ7IxCUFYUR4fMytBfWlvNZgrtu3JnmR2o9M/tSav oDtEg0aq9zhRu2eiHQ/vyZX4rqobSlW7dkGH0gMjdZQI3dBPdEHE2omqlUGTlT0UU1 435qnpinm2tCBfnJaV0IHNmf9hRpMX/tkgp99GEc= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 45689L0g095515 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 6 Jun 2024 03:09:21 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 6 Jun 2024 03:09:21 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 6 Jun 2024 03:09:21 -0500 Received: from localhost (jluthra.dhcp.ti.com [172.24.227.116]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45689KZJ017614; Thu, 6 Jun 2024 03:09:20 -0500 From: Jai Luthra Date: Thu, 6 Jun 2024 13:37:46 +0530 Subject: [PATCH v2 7/7] arm64: dts: ti: k3-am62p5-sk: Fix pinmux for McASP1 TX Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240606-mcasp_fifo_drop-v2-7-8c317dabdd0a@ti.com> References: <20240606-mcasp_fifo_drop-v2-0-8c317dabdd0a@ti.com> In-Reply-To: <20240606-mcasp_fifo_drop-v2-0-8c317dabdd0a@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jayesh Choudhary , Devarsh Thakkar , Bryan Brattlof , Aradhya Bhatia , Francesco Dolcini CC: , , , Devarsh Thakkar , Jai Luthra X-Mailer: b4 0.12.4 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On SK-AM62P, McASP1 uses two pins for communicating with the codec over I2S protocol. One of these pins (AXR0) is used for audio playback (TX) so the direction of the pin should be OUTPUT. Fixes: c00504ea42c0 ("arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM") Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62p5-sk.dts index 78d4d44e8bd4..fb980d46e304 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -207,7 +207,7 @@ main_mcasp1_pins_default: main-mcasp1-default-pins { pinctrl-single,pins =3D < AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX= */ AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */ - AM62PX_IOPAD(0x008c, PIN_INPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ + AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 = */ >; }; --=20 2.43.0