From nobody Thu Feb 12 23:17:48 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C1961553B3 for ; Wed, 5 Jun 2024 16:14:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717604081; cv=none; b=aW8nAGe9zbg26Vw0Esq7FtEuXb5ZPT86PR57l0+naPUmLU5rfGGs5uWYcpOZIPIxQbNIipfry9NOJrkcAtgG362ulUhkCuJy71cWQ+eGTIIgeHdQZ935l6JEiyPY/VVPWYbkJcLOkTin5qQFGgPknpHUmspCPd5NQTPMM/pZBwQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717604081; c=relaxed/simple; bh=yanHfd6jlJmGT0zmUR9ubQ+HVlgEg5ygOb5UbWWoM5o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Dy0pJOf9RgndyZ0vtwTrhjAfSh+nuXMRcbEYEhGzECYvvDah3DwqIh2KZ5zWEQ3S6jNEEGQA2j1DrFhBOumIGUEXZsrSMgqm+u220QYoamHaRSMWlPn4ZZgvDtOX70wrAi5SQul9udVOGQiSFBrNP8SN9mPdlqBxcSW4cgwQ77o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cmFtgbHt; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cmFtgbHt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717604079; x=1749140079; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yanHfd6jlJmGT0zmUR9ubQ+HVlgEg5ygOb5UbWWoM5o=; b=cmFtgbHt6hfcggoHIqGOyKzpnlG5suMufYExESWAxYU+OcSO8lQqJ4Kq LMOX+n10u3sy9Z/EFGcHOedpGeDRM74pIscniGmzuvMkWbn3XIbAH8Cz2 SKP2wa/51ZFPTSaGPbIVFZ36PZBr99lR7I+AP2injn+yOe52SazSaKDPR i721aGLnJ8nyyi/nHmcnaMM451dDsYSy8vQYP58oxUN1uX/GGCRMeGTlM K21L9BWfndbMspZTi9CHMzE3A+MeiQlBIGOLwrBXQ/MSBWUIFajFTdrw2 CjDa2XAmrrGo2HqSLOcks2Jp0AUZ55aaG684yn29wk/VyorpQ7ZiKQldJ w==; X-CSE-ConnectionGUID: p4X7r8y3RCSn9o2VdHqHNQ== X-CSE-MsgGUID: GNi/YDXITiWV+R8uvCX3aQ== X-IronPort-AV: E=McAfee;i="6600,9927,11094"; a="31772289" X-IronPort-AV: E=Sophos;i="6.08,217,1712646000"; d="scan'208";a="31772289" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jun 2024 09:14:37 -0700 X-CSE-ConnectionGUID: AQuyBpvDQACNsZSEi0KIFw== X-CSE-MsgGUID: YmYw7eXRSMuVIMIaAiQw7g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,217,1712646000"; d="scan'208";a="42581898" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jun 2024 09:14:36 -0700 From: Tony Luck To: Borislav Petkov Cc: x86@kernel.org, Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v2 1/3] cacheinfo: Add function to get cacheinfo for a given (cpu, cachelevel) Date: Wed, 5 Jun 2024 09:14:25 -0700 Message-ID: <20240605161427.312994-2-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240605161427.312994-1-tony.luck@intel.com> References: <20240605161427.312994-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Resctrl code open codes a search for information about a given cache level in a couple of places (and more are on the way). Provide a new inline function get_cpu_cacheinfo_level() in to do the search and return a pointer to the cacheinfo structure. Simplify the existing get_cpu_cacheinfo_id() by using this new function to do the search. Signed-off-by: Tony Luck Reviewed-by: Reinette Chatre --- include/linux/cacheinfo.h | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index 2cb15fe4fe12..b4d99052d186 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -113,10 +113,11 @@ int acpi_get_cache_info(unsigned int cpu, const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_= leaf); =20 /* - * Get the id of the cache associated with @cpu at level @level. + * Get the cacheinfo structure for the cache associated with @cpu at + * level @level. * cpuhp lock must be held. */ -static inline int get_cpu_cacheinfo_id(int cpu, int level) +static inline struct cacheinfo *get_cpu_cacheinfo_level(int cpu, int level) { struct cpu_cacheinfo *ci =3D get_cpu_cacheinfo(cpu); int i; @@ -124,12 +125,23 @@ static inline int get_cpu_cacheinfo_id(int cpu, int l= evel) for (i =3D 0; i < ci->num_leaves; i++) { if (ci->info_list[i].level =3D=3D level) { if (ci->info_list[i].attributes & CACHE_ID) - return ci->info_list[i].id; - return -1; + return &ci->info_list[i]; + return NULL; } } =20 - return -1; + return NULL; +} + +/* + * Get the id of the cache associated with @cpu at level @level. + * cpuhp lock must be held. + */ +static inline int get_cpu_cacheinfo_id(int cpu, int level) +{ + struct cacheinfo *ci =3D get_cpu_cacheinfo_level(cpu, level); + + return ci ? ci->id : -1; } =20 #ifdef CONFIG_ARM64 --=20 2.45.0 From nobody Thu Feb 12 23:17:48 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D52D8155C9E for ; Wed, 5 Jun 2024 16:14:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717604081; cv=none; b=GDyPt8c/8G7EXYknm+bsnKD926d82zqUS5/i/4Sgf6WDcD+TvgdflAENakkjURg8nTdrzQ9Esbg6MGgFX9VrIedD00LLyUyK+r8bEDdlEC/X7kre5lAUh6g7JX+25eYy67VkrTVZSRwakRqsgtNtNSdmYP2FWuvfUD/p7Yw0zn0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717604081; c=relaxed/simple; bh=/HprfpwiUePty9wSFJRY3CNQ9aV3syZxAQmyCvvz/FY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XRNXw5v9rCJQ164SGctLS1af5HirAIBHMkMhtjXoNXyZ2EYhw/8nt6vIjQCU4EG8ExZp7Z9R81HzvZu8bwsMR4kp+yUDZ8rZvW+14DpawH17Dy8DemXNpre+/a0X4oOu06wE886uXtWgIxLozscb/qmf3qO9FVjXCMVDy+RxtlI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=BX4qZwQW; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="BX4qZwQW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717604080; x=1749140080; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/HprfpwiUePty9wSFJRY3CNQ9aV3syZxAQmyCvvz/FY=; b=BX4qZwQW7CPPqT+95vvBn4s/nIlSHFrXO4D31Lto3dqcsyGSWhfs1gyX oy7B+4s0h5UFyf432Fhis1CuavSzV98dJux+J1q0XbgVCiJwbKW64MSQ0 nBfXhDhH786IvV1GbyO+BPW9uEBc7Go0wHSmTJ7RyJ3/jNwRkZbsPzmrC Eb0IlhOVcSL2ItYFwUdGi2p2FVwMHtcdrvRTXRn46Wc80rjGr4zA8goA2 ugCYmsgBllMV0Rh+/AfT89uuUjvi5ESHRaDpnJkhUDyyZPq/PA+oxZy7F tovlGsZoNZ9AY4FP4YuJVSFbpJu0FXqPcQFtUsk8k46ngGLpAzEdQBTQj w==; X-CSE-ConnectionGUID: TwMC6Mv7R/OI2hl5xTXXGg== X-CSE-MsgGUID: 2AvaSLfhSNmOrMcxgxMlZQ== X-IronPort-AV: E=McAfee;i="6600,9927,11094"; a="31772298" X-IronPort-AV: E=Sophos;i="6.08,217,1712646000"; d="scan'208";a="31772298" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jun 2024 09:14:37 -0700 X-CSE-ConnectionGUID: Fnvn3mh+TyCMfVK9Cxg1kA== X-CSE-MsgGUID: ankv2ZDmTkSaV5CBK2+oWQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,217,1712646000"; d="scan'208";a="42581902" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jun 2024 09:14:37 -0700 From: Tony Luck To: Borislav Petkov Cc: x86@kernel.org, Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v2 2/3] x86/resctrl: Replace open code cacheinfo search in pseudo_lock_region_init() Date: Wed, 5 Jun 2024 09:14:26 -0700 Message-ID: <20240605161427.312994-3-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240605161427.312994-1-tony.luck@intel.com> References: <20240605161427.312994-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use get_cpu_cacheinfo_level() instead of open coded search. Signed-off-by: Tony Luck Reviewed-by: Reinette Chatre --- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index aacf236dfe3b..1bbfd3c1e300 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -292,9 +292,8 @@ static void pseudo_lock_region_clear(struct pseudo_lock= _region *plr) */ static int pseudo_lock_region_init(struct pseudo_lock_region *plr) { - struct cpu_cacheinfo *ci; + struct cacheinfo *ci; int ret; - int i; =20 /* Pick the first cpu we find that is associated with the cache. */ plr->cpu =3D cpumask_first(&plr->d->cpu_mask); @@ -306,15 +305,11 @@ static int pseudo_lock_region_init(struct pseudo_lock= _region *plr) goto out_region; } =20 - ci =3D get_cpu_cacheinfo(plr->cpu); - - plr->size =3D rdtgroup_cbm_to_size(plr->s->res, plr->d, plr->cbm); - - for (i =3D 0; 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d="scan'208";a="42581905" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jun 2024 09:14:37 -0700 From: Tony Luck To: Borislav Petkov Cc: x86@kernel.org, Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v2 3/3] x86/resctrl: Replace open code cacheinfo search in rdtgroup_cbm_to_size() Date: Wed, 5 Jun 2024 09:14:27 -0700 Message-ID: <20240605161427.312994-4-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240605161427.312994-1-tony.luck@intel.com> References: <20240605161427.312994-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use get_cpu_cacheinfo_level() instead of open coded search. Signed-off-by: Tony Luck Reviewed-by: Reinette Chatre --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 02f213f1c51c..cb68a121dabb 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1450,18 +1450,14 @@ static ssize_t rdtgroup_mode_write(struct kernfs_op= en_file *of, unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r, struct rdt_domain *d, unsigned long cbm) { - struct cpu_cacheinfo *ci; unsigned int size =3D 0; - int num_b, i; + struct cacheinfo *ci; + int num_b; =20 num_b =3D bitmap_weight(&cbm, r->cache.cbm_len); - ci =3D get_cpu_cacheinfo(cpumask_any(&d->cpu_mask)); - for (i =3D 0; i < ci->num_leaves; i++) { - if (ci->info_list[i].level =3D=3D r->cache_level) { - size =3D ci->info_list[i].size / r->cache.cbm_len * num_b; - break; - } - } + ci =3D get_cpu_cacheinfo_level(cpumask_any(&d->cpu_mask), r->cache_level); + if (ci) + size =3D ci->size / r->cache.cbm_len * num_b; =20 return size; } --=20 2.45.0