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a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE All PCIe controllers found on X1E80100 have MHI register region and VDDPE supplies. Add them to the schema as well. Fixes: 692eadd51698 ("dt-bindings: PCI: qcom: Document the X1E80100 PCIe Co= ntroller") Signed-off-by: Abel Vesa Reviewed-by: Krzysztof Kozlowski --- This patchset fixes the following warning: https://lore.kernel.org/all/171751454535.785265.18156799252281879515.robh@k= ernel.org/ Also fixes a MHI reg region warning that will be triggered by the following= patch: https://lore.kernel.org/all/20240604-x1e80100-dts-fixes-pcie6a-v2-1-0b4d8c6= 256e5@linaro.org/ --- Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml = b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml index 1074310a8e7a..7ceba32c4cf9 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml @@ -19,11 +19,10 @@ properties: const: qcom,pcie-x1e80100 =20 reg: - minItems: 5 + minItems: 6 maxItems: 6 =20 reg-names: - minItems: 5 items: - const: parf # Qualcomm specific registers - const: dbi # DesignWare PCIe registers @@ -71,6 +70,9 @@ properties: - const: pci # PCIe core reset - const: link_down # PCIe link down reset =20 + vddpe-3v3-supply: + description: A phandle to the PCIe endpoint power supply + allOf: - $ref: qcom,pcie-common.yaml# =20 --- base-commit: d97496ca23a2d4ee80b7302849404859d9058bcd change-id: 20240604-x1e80100-pci-bindings-fix-196925d15260 Best regards, --=20 Abel Vesa