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([2401:4900:1c07:3bcb:e05d:a577:9add:a9ce]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f63240c947sm450105ad.269.2024.05.30.10.42.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 May 2024 10:42:19 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Claudiu Beznea , Fabrizio Castro , Paul Barker , Lad Prabhakar Subject: [PATCH v3 08/15] pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to PMC register Date: Thu, 30 May 2024 18:38:50 +0100 Message-Id: <20240530173857.164073-9-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240530173857.164073-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240530173857.164073-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Introduces pmc_writeb() function pointer, in the struct rzg2l_pinctrl_data to facilitate writing to the PMC register. On the RZ/V2H(P) SoC, unlocking the PWPR.REGWE_A bit before writing to PMC registers is required, whereas this is not the case for the existing RZ/G2L family. This addition enables the reuse of existing code for RZ/V2H(P). Additionally, this patch populates this function pointer with appropriate data for existing SoCs. Note that this functionality is only handled in rzg2l_gpio_request(), as PMC unlock/lock during PFC setup will be taken care of in the pwpr_pfc_lock_unlock() function pointer. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Tested-by: Claudiu Beznea # on RZ/G3S --- v2->v3 - Now passing offset to pmc_writeb() instead of virtual address RFC->v2 - No change --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/rene= sas/pinctrl-rzg2l.c index a3fd14b95c5a..f8a1a1f2eebe 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -254,6 +254,7 @@ struct rzg2l_pinctrl_data { const u64 *variable_pin_cfg; unsigned int n_variable_pin_cfg; void (*pwpr_pfc_lock_unlock)(struct rzg2l_pinctrl *pctrl, bool lock); + void (*pmc_writeb)(struct rzg2l_pinctrl *pctrl, u8 val, u16 offset); }; =20 /** @@ -383,6 +384,11 @@ static const u64 r9a07g043f_variable_pin_cfg[] =3D { }; #endif =20 +static void rzg2l_pmc_writeb(struct rzg2l_pinctrl *pctrl, u8 val, u16 offs= et) +{ + writeb(val, pctrl->base + offset); +} + static void rzg2l_pinctrl_set_pfc_mode(struct rzg2l_pinctrl *pctrl, u8 pin, u8 off, u8 func) { @@ -1329,7 +1335,7 @@ static int rzg2l_gpio_request(struct gpio_chip *chip,= unsigned int offset) /* Select GPIO mode in PMC Register */ reg8 =3D readb(pctrl->base + PMC(off)); reg8 &=3D ~BIT(bit); - writeb(reg8, pctrl->base + PMC(off)); + pctrl->data->pmc_writeb(pctrl, reg8, PMC(off)); =20 spin_unlock_irqrestore(&pctrl->lock, flags); =20 @@ -2616,6 +2622,7 @@ static struct rzg2l_pinctrl_data r9a07g043_data =3D { .n_variable_pin_cfg =3D ARRAY_SIZE(r9a07g043f_variable_pin_cfg), #endif .pwpr_pfc_lock_unlock =3D &rzg2l_pwpr_pfc_lock_unlock, + .pmc_writeb =3D &rzg2l_pmc_writeb, }; =20 static struct rzg2l_pinctrl_data r9a07g044_data =3D { @@ -2628,6 +2635,7 @@ static struct rzg2l_pinctrl_data r9a07g044_data =3D { ARRAY_SIZE(rzg2l_dedicated_pins.rzg2l_pins), .hwcfg =3D &rzg2l_hwcfg, .pwpr_pfc_lock_unlock =3D &rzg2l_pwpr_pfc_lock_unlock, + .pmc_writeb =3D &rzg2l_pmc_writeb, }; =20 static struct rzg2l_pinctrl_data r9a08g045_data =3D { @@ -2639,6 +2647,7 @@ static struct rzg2l_pinctrl_data r9a08g045_data =3D { .n_dedicated_pins =3D ARRAY_SIZE(rzg3s_dedicated_pins), .hwcfg =3D &rzg3s_hwcfg, .pwpr_pfc_lock_unlock =3D &rzg2l_pwpr_pfc_lock_unlock, + .pmc_writeb =3D &rzg2l_pmc_writeb, }; =20 static const struct of_device_id rzg2l_pinctrl_of_table[] =3D { --=20 2.34.1