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Thu, 30 May 2024 09:48:52 -0700 (PDT) Received: from [127.0.1.1] ([188.27.161.69]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6555bc091asm164155566b.138.2024.05.30.09.48.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 May 2024 09:48:52 -0700 (PDT) From: Abel Vesa Date: Thu, 30 May 2024 19:48:44 +0300 Subject: [PATCH] clk: qcom: gcc-x1e80100: Fix halt_check for all 3 USB PHY pipe clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240530-x1e80100-clk-gcc-fix-halt-check-for-usb-phy-pipe-clks-v1-1-16c6f4dccbd5@linaro.org> X-B4-Tracking: v=1; b=H4sIAOutWGYC/x2N0QrCMBAEf6XcswuX1kjxV8SH5rw0oaUNiUql9 N+NPg7s7OxUNEctdG12yvqOJa5LBXNqSMKwjIr4qEwtt2e2HWMz2rNhhswTRhH4uCEM8xMSVCb 4NeNVHFL4IMWkv12B+l68dfbSGUf1O2Wt3r97ux/HF+D383OHAAAA To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rajendra Nayak , Bryan O'Donoghue , Konrad Dybcio Cc: Sibi Sankar , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE Since the pipe clocks are fed by the QMP PHYs, they are not under the GCC control, therefore the halt bit might not get. This will lead to the clock driver reporting the clock as stuck, but that is inaccurate. So instead of waiting for the halt bit to get set, just use the HALT_DELAY flag. Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver f= or X1E80100") Signed-off-by: Abel Vesa Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/gcc-x1e80100.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/gcc-x1e80100.c b/drivers/clk/qcom/gcc-x1e8010= 0.c index 1404017be918..afff7cd14848 100644 --- a/drivers/clk/qcom/gcc-x1e80100.c +++ b/drivers/clk/qcom/gcc-x1e80100.c @@ -5186,7 +5186,7 @@ static struct clk_regmap_mux gcc_usb3_prim_phy_pipe_c= lk_src =3D { =20 static struct clk_branch gcc_usb3_prim_phy_pipe_clk =3D { .halt_reg =3D 0x39068, - .halt_check =3D BRANCH_HALT_VOTED, + .halt_check =3D BRANCH_HALT_DELAY, .hwcg_reg =3D 0x39068, .hwcg_bit =3D 1, .clkr =3D { @@ -5257,7 +5257,7 @@ static struct clk_regmap_mux gcc_usb3_sec_phy_pipe_cl= k_src =3D { =20 static struct clk_branch gcc_usb3_sec_phy_pipe_clk =3D { .halt_reg =3D 0xa1068, - .halt_check =3D BRANCH_HALT_VOTED, + .halt_check =3D BRANCH_HALT_DELAY, .hwcg_reg =3D 0xa1068, .hwcg_bit =3D 1, .clkr =3D { @@ -5327,7 +5327,7 @@ static struct clk_regmap_mux gcc_usb3_tert_phy_pipe_c= lk_src =3D { =20 static struct clk_branch gcc_usb3_tert_phy_pipe_clk =3D { .halt_reg =3D 0xa2068, - .halt_check =3D BRANCH_HALT_VOTED, + .halt_check =3D BRANCH_HALT_DELAY, .hwcg_reg =3D 0xa2068, .hwcg_bit =3D 1, .clkr =3D { --- base-commit: 9d99040b1bc8dbf385a8aa535e9efcdf94466e19 change-id: 20240530-x1e80100-clk-gcc-fix-halt-check-for-usb-phy-pipe-clks-e= f8cf5b5631b Best regards, --=20 Abel Vesa