From nobody Tue Dec 16 07:28:58 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 717024D11B; Wed, 29 May 2024 10:16:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716977762; cv=none; b=hgR0tkfaOoRHWRziNpZM55YKSkirqInqz2dJKKRoc4y7b9AY4SHePwAylbNT8CM0JDMjmXgrj5rMxT9k3I/sB3ZfWvU8PzWDCWsuLIJxvzQkWU/1WiQADtsYJUN6laVQLstNStv05yNVDY41sw97RUqohHRRrP8k79O7Q8lstws= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716977762; c=relaxed/simple; bh=RfEFRRd9vI94cT0QpxdtWvq4MDXp4Y5OWr17oVhMZww=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=En5UfPmWEnHS8R/O79NS5u4/h1pUGWq5PIWqB2ajEcbXBz9q7UUA9u29ipyswkFmPdqgRkQSDTp+lOqWCB/pCHcqyCoFebgJ0/2wPIgQdGBk4lb0tj7+C0kuBMhyAqq+dFH5omHgfQAESzBz5DsCDB8XF182dNU4NVH5sd/xZBU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=E8feXSlh; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="E8feXSlh" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44TAEA8a001343; Wed, 29 May 2024 10:15:58 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= meCAq1XHQGhKSwQcEsW5CAuloGIpE2Gw4hEHdDvdrCc=; b=E8feXSlhaepZ4DdU OrbGTHpwOLqwjZ06QUH6/gigXtfWdseZpINglK1HGm5bE2wQDIxCp+MdNCKDXkGr Zp9Rfk3WKsuUbcAmTnKwQdoWJSN5UCWBUYCZdAiYLItUGxX4d5fJNmFnfMv4TeDy h6Oa6N9A6dUszPOyqs1vHUBUV+712ZoSVaMCGQtTs5xS8HmYBNYwayBnv0CVNnX6 aQMZG8vRjSi6Tr+vpnN1zUev1RpLuk1vW+JFDRdNBr4jMZN5d5fnuNHsbZjamL0W Ffh7/jtIG3BkKtjnyYbrOVLaNeec0XUoE0XDsvlg5cnl3VsWJsY8FIOIeek9Psk/ zhuG3Q== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3yba0prhye-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 May 2024 10:15:58 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44TAFvYl021494 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 May 2024 10:15:57 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 29 May 2024 03:15:52 -0700 From: Tengfei Fan To: , , , , CC: , , , , Tengfei Fan Subject: [PATCH 1/3] dt-bindings: cache: qcom,llcc: Add SA8775p description Date: Wed, 29 May 2024 18:15:32 +0800 Message-ID: <20240529101534.3166507-2-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240529101534.3166507-1-quic_tengfan@quicinc.com> References: <20240529101534.3166507-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: X-MzcpbGwLSc_rmVRsy52MYyZ86r928h X-Proofpoint-GUID: X-MzcpbGwLSc_rmVRsy52MYyZ86r928h X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-29_06,2024-05-28_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=975 bulkscore=0 suspectscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 mlxscore=0 spamscore=0 adultscore=0 phishscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2405290068 Content-Type: text/plain; charset="utf-8" Add the cache controller compatible and register region descriptions for SA8775p platform. Signed-off-by: Tengfei Fan Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/cache/qcom,llcc.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Docum= entation/devicetree/bindings/cache/qcom,llcc.yaml index 07ccbda4a0ab..37eada55e0f0 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -21,6 +21,7 @@ properties: compatible: enum: - qcom,qdu1000-llcc + - qcom,sa8775p-llcc - qcom,sc7180-llcc - qcom,sc7280-llcc - qcom,sc8180x-llcc @@ -80,6 +81,33 @@ allOf: - const: llcc0_base - const: llcc_broadcast_base =20 + - if: + properties: + compatible: + contains: + enum: + - qcom,sa8775p-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC4 base register region + - description: LLCC5 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc4_base + - const: llcc5_base + - const: llcc_broadcast_base + - if: properties: compatible: --=20 2.25.1 From nobody Tue Dec 16 07:28:58 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C3AA17BB2F; Wed, 29 May 2024 10:16:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716977767; cv=none; b=kibb8eqfRofN4K/zurujdkbJ9JAzs3RDanm73Fg+Z9Y5jrG5jGeXAPnaFaalLmjhUMNAeRLgeBUeVa1WR8JoSQ2awQqENvkcbQOoXZc3bAkZLcH4xsXGARB7G1AhpAHgGQcWeCsWmFuIEuqKK54VUxdrjcSi508zJWUA19euLTo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716977767; c=relaxed/simple; bh=vt66XCwuPa8bwPePqMyaFmKetrMf+SrA//BdM4hfEto=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=h4KnyuUOxniF5DtkOry5pYkjpRRctFmeFot6PzhRIOridjd3RxXoxqOkoJN5ba+wtszM0kBZTHcAywdGLLjakfSc0kiS1lCe7nq2kxhND7gsZBC3LJnyJXSxK1YFbQct+nPp4QAhYGfmf532hXAZCwsPT1Z4k+mDq7Amxhnmu7k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=f1ManWd7; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="f1ManWd7" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44T4wxxj018858; Wed, 29 May 2024 10:16:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= n2JjqOdf8t9u/34m0vQM1GNJ1s/4kQ7PdhzpU0y08w0=; b=f1ManWd7aFPFJD2i nT/8nTdxecxmaHr9eo0+F1WR1RYyV4KcfciSS+MLb2orFUZyswvHxNNgpwbVuMws maAKndQ1glHbdys4+u/jDdpHGJ5RKc/HUznoX9bXoHj5oRZeyE8GOf3J1SbuYuow SEs6fEr8E13iPwy0kbnIevAx/nLGUIAKJN3aj+3Gom1szN5XcwqcSFY/Vq7Y05EM OmSkVVEHmDpzRuh5a4UznvOQw/CYg2vgxH4lhqRgsBsk6iaUd41D79VmJKCUxd8G aagbdhxwzvLmVLTWFpqmhE6ZcVIGDOytqRSKvoGX9Sn84ZK2BoKQaQtGzTju4IbL +Lg6jQ== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3ybadx8nv2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 May 2024 10:16:01 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44TAG0Uv009733 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 May 2024 10:16:00 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 29 May 2024 03:15:55 -0700 From: Tengfei Fan To: , , , , CC: , , , , Tengfei Fan Subject: [PATCH 2/3] soc: qcom: llcc: Add llcc configuration support for the SA8775p platform Date: Wed, 29 May 2024 18:15:33 +0800 Message-ID: <20240529101534.3166507-3-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240529101534.3166507-1-quic_tengfan@quicinc.com> References: <20240529101534.3166507-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: L6sj-DSW9SAiffkQiQsFiJmg6dyBIMBn X-Proofpoint-GUID: L6sj-DSW9SAiffkQiQsFiJmg6dyBIMBn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-29_06,2024-05-28_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 impostorscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 priorityscore=1501 mlxscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2405290068 Content-Type: text/plain; charset="utf-8" Add llcc configuration support for the SA8775p platform. Signed-off-by: Tengfei Fan --- drivers/soc/qcom/llcc-qcom.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index cbef0dea1d5d..4379a5f8ddf3 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -150,6 +150,25 @@ enum llcc_reg_offset { LLCC_COMMON_STATUS0, }; =20 +static const struct llcc_slice_config sa8775p_data[] =3D { + {LLCC_CPUSS, 1, 2048, 1, 0, 0x00FF, 0x0, 0, 0, 0, 1, 1, 0, 0}, + {LLCC_VIDSC0, 2, 512, 3, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, + {LLCC_CPUSS1, 3, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, + {LLCC_CPUHWT, 5, 512, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, + {LLCC_AUDIO, 6, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 0, 0, 0}, + {LLCC_CMPT, 10, 4096, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, + {LLCC_GPUHTW, 11, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, + {LLCC_GPU, 12, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 1, 0}, + {LLCC_MMUHWT, 13, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 1, 0, 0}, + {LLCC_CMPTDMA, 15, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, + {LLCC_DISP, 16, 4096, 2, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, + {LLCC_VIDFW, 17, 3072, 1, 0, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, + {LLCC_AUDHW, 22, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 0, 0, 0}, + {LLCC_CVP, 28, 256, 3, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, + {LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xF0, 1, 0, 0, 1, 0, 0, 0}, + {LLCC_WRCACHE, 31, 512, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 1, 0, 0}, +}; + static const struct llcc_slice_config sc7180_data[] =3D { { LLCC_CPUSS, 1, 256, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 1 }, { LLCC_MDM, 8, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 }, @@ -552,6 +571,16 @@ static const struct qcom_llcc_config qdu1000_cfg[] =3D= { }, }; =20 +static const struct qcom_llcc_config sa8775p_cfg[] =3D { + { + .sct_data =3D sa8775p_data, + .size =3D ARRAY_SIZE(sa8775p_data), + .need_llcc_cfg =3D true, + .reg_offset =3D llcc_v2_1_reg_offset, + .edac_reg_offset =3D &llcc_v2_1_edac_reg_offset, + }, +}; + static const struct qcom_llcc_config sc7180_cfg[] =3D { { .sct_data =3D sc7180_data, @@ -698,6 +727,11 @@ static const struct qcom_sct_config qdu1000_cfgs =3D { .num_config =3D ARRAY_SIZE(qdu1000_cfg), }; =20 +static const struct qcom_sct_config sa8775p_cfgs =3D { + .llcc_config =3D sa8775p_cfg, + .num_config =3D ARRAY_SIZE(sa8775p_cfg), +}; + static const struct qcom_sct_config sc7180_cfgs =3D { .llcc_config =3D sc7180_cfg, .num_config =3D ARRAY_SIZE(sc7180_cfg), @@ -1332,6 +1366,7 @@ static int qcom_llcc_probe(struct platform_device *pd= ev) =20 static const struct of_device_id qcom_llcc_of_match[] =3D { { .compatible =3D "qcom,qdu1000-llcc", .data =3D &qdu1000_cfgs}, + { .compatible =3D "qcom,sa8775p-llcc", .data =3D &sa8775p_cfgs }, { .compatible =3D "qcom,sc7180-llcc", .data =3D &sc7180_cfgs }, { .compatible =3D "qcom,sc7280-llcc", .data =3D &sc7280_cfgs }, { .compatible =3D "qcom,sc8180x-llcc", .data =3D &sc8180x_cfgs }, --=20 2.25.1 From nobody Tue Dec 16 07:28:58 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E556D17DE0D; Wed, 29 May 2024 10:16:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716977767; cv=none; b=WKCqse0dUm0gGB3dlEzCsMEYy/8PkadIv0O99x5xh7t5qxt9Vcb/XA25Sp+pVGhvH5FreWKbrMjeAlKIZVtwvibrG3Gp0j7xh54GnczJtEEi8j5Qptuy+XvuyVT9iQhZoTNoe0YM5EjKhj9/AU7JnRw5OCQbdUFZKCg2FE0vlTo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716977767; c=relaxed/simple; bh=ntFqdUqKYxrTsbJa0FBoNHdPGh4ACO9fJkViEO4r+H4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=sojKq5E3M1g0W1n5NlvKvFcIaOHbaOVyNlw1t5YjOqWi4XjpU1D7qybs4a/625FC4fdqnTHI/RI37s1rgU3OGpCfyoXnCMgnKgBNDAWavywGwA++Hyl8IcRSI/18GTW28zPNl6oLmEh6siWkYMeetbzMQsPviBUbBJ6QzD8pR7U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=GPEAHGEk; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="GPEAHGEk" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44T7MJwh015693; Wed, 29 May 2024 10:16:03 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= BhMsfyU8vMZm7///E/US7eaO4Di6fkE66UjnUDfXHPo=; b=GPEAHGEkiv4cSCtq yrfeRZlIIdi0rQFJZUieabogduw764G/f/szmYeEMUHKwjPnJiRkyGTJ2Eki5/gF a10rILs5THkjHX3FbsrFsD1HzSJ5m984066QZsJanQcfOQBhaZwQh5EBwAWFSr+B qPmT1h8RJY0ZR2NRD/bUPXSBmi2/zCKNiRTgNWDDN6TOZzZk0og2xdsdYn1N2MbE hxg8368OaIaeM/5TKxNHzNMrZXYMy4NSB+I+B3Cv0jHIm+NHAsaFVK8QL0xARmp4 qLqHdBjNnGRyBOCBktLYV28wHGoukaPjefz6K7mRvh6+z1E3y9UWgVFzqk60y648 7QS5Og== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3ydyws0b8f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 May 2024 10:16:03 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44TAG2YN009809 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 May 2024 10:16:02 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 29 May 2024 03:15:58 -0700 From: Tengfei Fan To: , , , , CC: , , , , Tengfei Fan Subject: [PATCH 3/3] arm64: dts: qcom: sa8775p: Add llcc support for the SA8775p platform Date: Wed, 29 May 2024 18:15:34 +0800 Message-ID: <20240529101534.3166507-4-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240529101534.3166507-1-quic_tengfan@quicinc.com> References: <20240529101534.3166507-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 8mtf1OTOl348ZABD3ykoLeA59CQxeG-L X-Proofpoint-GUID: 8mtf1OTOl348ZABD3ykoLeA59CQxeG-L X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-29_06,2024-05-28_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 malwarescore=0 impostorscore=0 suspectscore=0 mlxscore=0 mlxlogscore=604 priorityscore=1501 spamscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2405290068 Content-Type: text/plain; charset="utf-8" Add llcc support for the SA8775p platform. Signed-off-by: Tengfei Fan --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qc= om/sa8775p.dtsi index 5632fa896b93..8f910ab113f5 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -2885,6 +2885,25 @@ serdes1: phy@8902000 { status =3D "disabled"; }; =20 + llcc: system-cache-controller@9200000 { + compatible =3D "qcom,sa8775p-llcc"; + reg =3D <0x0 0x09200000 0x0 0x80000>, + <0x0 0x09300000 0x0 0x80000>, + <0x0 0x09400000 0x0 0x80000>, + <0x0 0x09500000 0x0 0x80000>, + <0x0 0x09600000 0x0 0x80000>, + <0x0 0x09700000 0x0 0x80000>, + <0x0 0x09a00000 0x0 0x80000>; + reg-names =3D "llcc0_base", + "llcc1_base", + "llcc2_base", + "llcc3_base", + "llcc4_base", + "llcc5_base", + "llcc_broadcast_base"; + interrupts =3D ; + }; + pdc: interrupt-controller@b220000 { compatible =3D "qcom,sa8775p-pdc", "qcom,pdc"; reg =3D <0x0 0x0b220000 0x0 0x30000>, --=20 2.25.1