From nobody Thu Sep 19 02:03:28 2024 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50207167D92; Wed, 29 May 2024 08:42:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716972174; cv=none; b=OUQgIRNfDo1GJk+L6PzULAwqWG1rdHEOlxJCyLogipXDEKv3emNYMCVWe+96q4q7/GxfbSBO2CgycSEttPYR2SNs571dkmf9syLKFlmDIddlhY1JFB/cC/E9olJ5X83StL00RvDhI4a7XTnoyh1C2aDegQ9W6PxwSWwtBfd9mj8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716972174; c=relaxed/simple; bh=qfdBbe69nDUVN2YQQNsj3wTHPQ8kwV5tGcY7tpAr9og=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XxsgEDof1SI+ZjwBYbn1118rRbAuZx7EGgdSTw3zb4GAG8HvC4nui+fW2UErfN8dOXgqlfM1ZT8+fJ9J7MnUvM7mGlIJ1WPrxkpVG96gdxmnOuid03wRr8YxPslb1XBsGsuYRqRfdXcLYHXkooTGmOQEL/vqcttl0HG5DtmzqdA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=tn4BW0K/; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="tn4BW0K/" X-UUID: 69c868421d9711ef8c37dd7afa272265-20240529 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=kBqE4j5z86E2dnbIeeWXjkmm4QgYtkEAv9tnNpqDh2I=; b=tn4BW0K/To2qrjKMOWd4F8/+EUTcJX9kckxJ9TZJ5N0IFJ50kRCZDAp9hrNAKRniMDRIQPG4WGBO7iiJNII+86rlyx8OnwwlWQF7csbW5mtQHyNnwQXV6p7MeKJctxWTUg5apFsfaVG8GOm2VLT7j1vk5dVPu+xrn5e/4llw8wk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.39,REQID:27052ddd-8306-480e-a91d-16720015cdf8,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:393d96e,CLOUDID:aaf35b93-e2c0-40b0-a8fe-7c7e47299109,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 69c868421d9711ef8c37dd7afa272265-20240529 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1656790647; Wed, 29 May 2024 16:42:42 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 29 May 2024 16:42:41 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 29 May 2024 16:42:41 +0800 From: Liju-clr Chen To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Corbet , Catalin Marinas , Will Deacon , Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , Richard Cochran , Matthias Brugger , AngeloGioacchino Del Regno , Liju-clr Chen , Yingshiuan Pan , Ze-yu Wang CC: , , , , , , , David Bradil , Trilok Soni , Shawn Hsiao , PeiLun Suei , Chi-shen Yeh , Kevenny Hsieh Subject: [PATCH v11 14/21] virt: geniezone: Optimize performance of protected VM memory Date: Wed, 29 May 2024 16:42:32 +0800 Message-ID: <20240529084239.11478-15-liju-clr.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240529084239.11478-1-liju-clr.chen@mediatek.com> References: <20240529084239.11478-1-liju-clr.chen@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yi-De Wu From: "Yingshiuan Pan" The memory protection mechanism performs better with batch operations on memory pages. To leverage this, we pre-allocate memory for VMs that are set to protected mode. As a result, the memory protection mechanism can proactively protect the pre-allocated memory in advance through batch operations, leading to improved performance during VM booting. Signed-off-by: Yingshiuan Pan Signed-off-by: Jerry Wang Signed-off-by: Liju Chen Signed-off-by: Yi-De Wu --- arch/arm64/geniezone/vm.c | 127 ++++++++++++++++++++++++++ include/linux/soc/mediatek/gzvm_drv.h | 1 + 2 files changed, 128 insertions(+) diff --git a/arch/arm64/geniezone/vm.c b/arch/arm64/geniezone/vm.c index 00c74a4bcfd7..db16716f5b8d 100644 --- a/arch/arm64/geniezone/vm.c +++ b/arch/arm64/geniezone/vm.c @@ -11,6 +11,8 @@ #include #include "gzvm_arch_common.h" =20 +#define PAR_PA47_MASK GENMASK_ULL(47, 12) + /** * gzvm_hypcall_wrapper() - the wrapper for hvc calls * @a0: arguments passed in registers 0 @@ -201,6 +203,126 @@ static int gzvm_vm_ioctl_get_pvmfw_size(struct gzvm *= gzvm, return 0; } =20 +/** + * fill_constituents() - Populate pa to buffer until full + * @consti: Pointer to struct mem_region_addr_range. + * @consti_cnt: Constituent count. + * @max_nr_consti: Maximum number of constituent count. + * @gfn: Guest frame number. + * @total_pages: Total page numbers. + * @slot: Pointer to struct gzvm_memslot. + * + * Return: how many pages we've fill in, negative if error + */ +static int fill_constituents(struct mem_region_addr_range *consti, + int *consti_cnt, int max_nr_consti, u64 gfn, + u32 total_pages, struct gzvm_memslot *slot) +{ + u64 pfn =3D 0, prev_pfn =3D 0, gfn_end =3D 0; + int nr_pages =3D 0; + int i =3D -1; + + if (unlikely(total_pages =3D=3D 0)) + return -EINVAL; + gfn_end =3D gfn + total_pages; + + while (i < max_nr_consti && gfn < gfn_end) { + if (pfn =3D=3D (prev_pfn + 1)) { + consti[i].pg_cnt++; + } else { + i++; + if (i >=3D max_nr_consti) + break; + consti[i].address =3D PFN_PHYS(pfn); + consti[i].pg_cnt =3D 1; + } + prev_pfn =3D pfn; + gfn++; + nr_pages++; + } + if (i !=3D max_nr_consti) + i++; + *consti_cnt =3D i; + + return nr_pages; +} + +/** + * gzvm_vm_populate_mem_region() - Iterate all mem slot and populate pa to + * buffer until it's full + * @gzvm: Pointer to struct gzvm. + * @slot_id: Memory slot id to be populated. + * + * Return: 0 if it is successful, negative if error + */ +int gzvm_vm_populate_mem_region(struct gzvm *gzvm, int slot_id) +{ + struct gzvm_memslot *memslot =3D &gzvm->memslot[slot_id]; + struct gzvm_memory_region_ranges *region; + int max_nr_consti, remain_pages; + u64 gfn, gfn_end; + u32 buf_size; + + buf_size =3D PAGE_SIZE * 2; + region =3D alloc_pages_exact(buf_size, GFP_KERNEL); + if (!region) + return -ENOMEM; + + max_nr_consti =3D (buf_size - sizeof(*region)) / + sizeof(struct mem_region_addr_range); + + region->slot =3D memslot->slot_id; + remain_pages =3D memslot->npages; + gfn =3D memslot->base_gfn; + gfn_end =3D gfn + remain_pages; + + while (gfn < gfn_end) { + int nr_pages; + + nr_pages =3D fill_constituents(region->constituents, + ®ion->constituent_cnt, + max_nr_consti, gfn, + remain_pages, memslot); + + if (nr_pages < 0) { + pr_err("Failed to fill constituents\n"); + free_pages_exact(region, buf_size); + return -EFAULT; + } + + region->gpa =3D PFN_PHYS(gfn); + region->total_pages =3D nr_pages; + remain_pages -=3D nr_pages; + gfn +=3D nr_pages; + + if (gzvm_arch_set_memregion(gzvm->vm_id, buf_size, + virt_to_phys(region))) { + pr_err("Failed to register memregion to hypervisor\n"); + free_pages_exact(region, buf_size); + return -EFAULT; + } + } + free_pages_exact(region, buf_size); + + return 0; +} + +static int populate_all_mem_regions(struct gzvm *gzvm) +{ + int ret, i; + + for (i =3D 0; i < GZVM_MAX_MEM_REGION; i++) { + if (gzvm->memslot[i].npages =3D=3D 0) + continue; + + ret =3D gzvm_vm_populate_mem_region(gzvm, i); + if (ret !=3D 0) + return ret; + } + + return 0; +} + /** * gzvm_vm_ioctl_cap_pvm() - Proceed GZVM_CAP_PROTECTED_VM's subcommands * @gzvm: Pointer to struct gzvm. @@ -222,6 +344,11 @@ static int gzvm_vm_ioctl_cap_pvm(struct gzvm *gzvm, case GZVM_CAP_PVM_SET_PVMFW_GPA: fallthrough; case GZVM_CAP_PVM_SET_PROTECTED_VM: + /* + * To improve performance for protected VM, we have to populate VM's mem= ory + * before VM booting + */ + populate_all_mem_regions(gzvm); ret =3D gzvm_vm_arch_enable_cap(gzvm, cap, &res); return ret; case GZVM_CAP_PVM_GET_PVMFW_SIZE: diff --git a/include/linux/soc/mediatek/gzvm_drv.h b/include/linux/soc/medi= atek/gzvm_drv.h index 982463eea4f6..54ac91670611 100644 --- a/include/linux/soc/mediatek/gzvm_drv.h +++ b/include/linux/soc/mediatek/gzvm_drv.h @@ -159,6 +159,7 @@ int gzvm_vm_ioctl_arch_enable_cap(struct gzvm *gzvm, =20 int gzvm_gfn_to_hva_memslot(struct gzvm_memslot *memslot, u64 gfn, u64 *hva_memslot); +int gzvm_vm_populate_mem_region(struct gzvm *gzvm, int slot_id); =20 int gzvm_vm_ioctl_create_vcpu(struct gzvm *gzvm, u32 cpuid); int gzvm_arch_vcpu_update_one_reg(struct gzvm_vcpu *vcpu, __u64 reg_id, --=20 2.18.0