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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a626cc8da37sm708826166b.183.2024.05.29.04.17.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 May 2024 04:17:23 -0700 (PDT) From: Konrad Dybcio Date: Wed, 29 May 2024 13:17:17 +0200 Subject: [PATCH 1/2] dt-bindings: mfd: qcom,spmi-pmic: Document PMC8380 and SMB2360 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240529-topic-x1e_pmic-v1-1-9de0506179eb@linaro.org> References: <20240529-topic-x1e_pmic-v1-0-9de0506179eb@linaro.org> In-Reply-To: <20240529-topic-x1e_pmic-v1-0-9de0506179eb@linaro.org> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephen Boyd , Bjorn Andersson Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1716981440; l=952; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Sgi0aQngI0ZlefDkmDVYahcNW5XVUG9yQMjjmHM4DJk=; b=mjWejaWxnUbOZHodArs0kptzd3ZTHEACqRcgx/iRVj3VLVEchNMfNYjeB+0wtGtue26lpZYIz AgTsoBC3PQuA1v9mMMCOaOy5Rb5i+jxzqwwDpzkRuOBnvvhB6p5f0Nz X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= These are just some more PMICs adjacent to X1 SoCs. Document them. Signed-off-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Do= cumentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index b7f01cbb8fff..a2b2fbf77d5c 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -75,6 +75,7 @@ properties: - qcom,pma8084 - qcom,pmc8180 - qcom,pmc8180c + - qcom,pmc8380 - qcom,pmd9635 - qcom,pmi632 - qcom,pmi8950 @@ -95,6 +96,7 @@ properties: - qcom,pmx65 - qcom,pmx75 - qcom,smb2351 + - qcom,smb2360 - const: qcom,spmi-pmic =20 reg: --=20 2.45.1 From nobody Tue Dec 16 07:27:35 2025 Received: from mail-ed1-f48.google.com (mail-ed1-f48.google.com [209.85.208.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35B2617BB1A for ; Wed, 29 May 2024 11:17:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716981449; cv=none; b=X8Qh+t8j++oluyQrxLeTtvuLgfTtfJCI7a8+eysCKsoyoQqixdW+TzAjyoRD842+Zkg1KEVccWk7QjMOPWHDIFaCNnfgkXl2+3G1Pz6E+XC9v+xWdIl0sRW8A9u182dUxB+P4txjn9zypApbKoftsmqwadE+GtdM5mf0vIIMi+Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716981449; c=relaxed/simple; bh=yRI61iA92I7OuzMyeSRuApM8Gyb9ffOZWQo8H97O2TI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tCMjcwy06eBNhUptqgPfD0TB3sICu05P4Lu4JKgdSq7RLbwb+nUn3x8EixG5uZAd5pHIJhkh0TMkEuc0BxlRfVcg1Vqw68rcUzpYjrz9+FNl3u4UKjqxr3k6xW4zVEZfo1q4kB0RuxOTEjpHYLNOrMEljF1OcMG3UG0isFP/B08= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=WzayCR74; arc=none smtp.client-ip=209.85.208.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WzayCR74" Received: by mail-ed1-f48.google.com with SMTP id 4fb4d7f45d1cf-57857e0f465so2479985a12.1 for ; Wed, 29 May 2024 04:17:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1716981445; x=1717586245; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hL9TlzSpJxaQE/CgoZ4k6g5IocgtHF1mcOhfzwDMMRQ=; b=WzayCR74HPgvSxL/qKBZw+0ufogE+u3JfDf1sicJ12Gl52TTfFBfA4IsTmwXL8Nql4 8p35D9UWxbDimq6UtwwY393KhAwS5YCeReKU1LZ+dMEelzZFbMQCo6SuNuglqfRkN/kn hTIRFJAky8R6TWqeM76cHYixZRPwmZryURG89rIjZ6q1PnyqX4YWQjoQj27Ysdrjy3w/ dC8IrJFefivjSc3nEmcouJ7w4MVdNbvCWTDtVgf3lWyqBRfft3eNq+eSzl+0u16x1JVv KD+VexWRWm8EqY08FXPYKf5BCZ12BK3HWgQuevUrrK0DiUslpqnF//yOV7ZQ8h3QCl51 3bmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1716981445; x=1717586245; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hL9TlzSpJxaQE/CgoZ4k6g5IocgtHF1mcOhfzwDMMRQ=; b=TULeOVPSM1wx2TpB7j+x8BeVZ2gHoSh78w78VyUvebAr4q1z5dVpkeZBMy3dpSE2g5 7ApBUeHElWdPVgGO/t1o7dnih71yVjycKeaGvMdgrzCq/ngS5EMjuWUgLhc64e4DrqQs Dz41IJignQajV6dUbV2jC3ouW/WtkGMtBTUz2FCC9nryu1ArkFKB08U4jX+g9jLWtnUm gNKlRlj1NgzhIEc35PfsnLxmSSONd65Ys/g57ogOT9SOi4pqDpJmAFIB9jIv5mMi10eK TXH+2cy6KtU4I9nQYKJUI/F2UGO2HsuXzLSIeCyCMY8F7klbW5bINBOr0USSuXATXwqw Rmgg== X-Forwarded-Encrypted: i=1; AJvYcCVmfmho5QEyyBq4M0Wnfk5wulqdRgD2kXlEHHGdJIccCWUcZcvj+1ZhKQMGwTyywWgR56uHFmYV3R4vdI7C1myeMKo439VF1HPBoL8E X-Gm-Message-State: AOJu0Yx4TWdXEMdCo9Tvtef0HTK7GQdFamBXq87b5oYU/YMnToyQc11z HaosQ4OG8T59dY2uwzhQBB3ohAmJtPZrorlI5RLtmoICqys9Z7x47wjPslRw5dI= X-Google-Smtp-Source: AGHT+IFLKgsSe4JQdtGSjIFQXszVWqqRnM6f7kzXKUuYffekZHkYFH0t+F3LtVp5PJy3fGC54Ysnxg== X-Received: by 2002:a17:906:1991:b0:a5a:5496:3c76 with SMTP id a640c23a62f3a-a6264192fe8mr1000027066b.6.1716981445616; Wed, 29 May 2024 04:17:25 -0700 (PDT) Received: from [192.168.128.35] (078088045245.garwolin.vectranet.pl. [78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a626cc8da37sm708826166b.183.2024.05.29.04.17.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 May 2024 04:17:24 -0700 (PDT) From: Konrad Dybcio Date: Wed, 29 May 2024 13:17:18 +0200 Subject: [PATCH 2/2] arm64: dts: qcom: x1e80100-pmics: Add the missing PMICs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240529-topic-x1e_pmic-v1-2-9de0506179eb@linaro.org> References: <20240529-topic-x1e_pmic-v1-0-9de0506179eb@linaro.org> In-Reply-To: <20240529-topic-x1e_pmic-v1-0-9de0506179eb@linaro.org> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephen Boyd , Bjorn Andersson Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1716981440; l=11953; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=yRI61iA92I7OuzMyeSRuApM8Gyb9ffOZWQo8H97O2TI=; b=2v45S0BxCJVEOA9GMNRVgIPzpCfC9iegt98T/QG4l2SJyTHwUyqlMfHkqyqNvHqQbakBXYSgY oEWuUh9MxvpCC09RiZRY0aLoAa8sWMY+yhms4l9EJKngo9EuxA3OD4C X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= During the initial bringup, all of the peripherals on non-SMB PMICs were either not used, or were not necessary to accomplish certain goals. This however, left a hole in the hardware description. Add the missing ones. Note that the PM8010 errors out on reads on the CRD (works fine on the QCP) for reasons unknown, but that shall be ironed out in the future.. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi | 480 +++++++++++++++++++++++= ++++ 1 file changed, 480 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi b/arch/arm64/boot= /dts/qcom/x1e80100-pmics.dtsi index 04301f772fbd..a5662d39fdff 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi @@ -3,10 +3,477 @@ * Copyright (c) 2024, Linaro Limited */ =20 +#include +#include #include #include =20 / { + thermal-zones { + pm8550-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pm8550_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + }; + }; + + pm8550ve-2-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pm8550ve_2_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + }; + }; + + pmc8380-3-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmc8380_3_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + }; + }; + + pmc8380-4-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmc8380_4_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + }; + }; + + pmc8380-5-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmc8380_5_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + }; + }; + + pmc8380-6-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmc8380_6_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + }; + }; + + pm8550ve-8-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pm8550ve_8_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + }; + }; + + pm8550ve-9-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pm8550ve_9_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + }; + }; + + pm8010-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pm8010_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + }; + }; + }; +}; + +&spmi_bus0 { + /* PMK8380 */ + pmk8550: pmic@0 { + compatible =3D "qcom,pm8550", "qcom,spmi-pmic"; + reg =3D <0x0 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmk8550_pon: pon@1300 { + compatible =3D "qcom,pmk8350-pon"; + reg =3D <0x1300>, <0x800>; + reg-names =3D "hlos", "pbs"; + + pon_pwrkey: pwrkey { + compatible =3D "qcom,pmk8350-pwrkey"; + interrupts =3D <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code =3D ; + }; + + pon_resin: resin { + compatible =3D "qcom,pmk8350-resin"; + interrupts =3D <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + status =3D "disabled"; + }; + }; + + pmk8550_rtc: rtc@6100 { + compatible =3D "qcom,pmk8350-rtc"; + reg =3D <0x6100>, <0x6200>; + reg-names =3D "rtc", "alarm"; + interrupts =3D <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + /* Not yet sure what blocks access */ + status =3D "reserved"; + }; + + pmk8550_sdam_2: nvram@7100 { + compatible =3D "qcom,spmi-sdam"; + reg =3D <0x7100>; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0 0x7100 0x100>; + + reboot_reason: reboot-reason@48 { + reg =3D <0x48 0x1>; + bits =3D <1 7>; + }; + }; + + pmk8550_gpios: gpio@8800 { + compatible =3D "qcom,pmk8550-gpio", "qcom,spmi-gpio"; + reg =3D <0xb800>; + gpio-controller; + gpio-ranges =3D <&pmk8550_gpios 0 0 6>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + /* PMC8380C */ + pm8550: pmic@1 { + compatible =3D "qcom,pm8550", "qcom,spmi-pmic"; + reg =3D <0x1 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pm8550_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pm8550_gpios: gpio@8800 { + compatible =3D "qcom,pm8550-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pm8550_gpios 0 0 12>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + pm8550_flash: led-controller@ee00 { + compatible =3D "qcom,pm8550-flash-led", "qcom,spmi-flash-led"; + reg =3D <0xee00>; + status =3D "disabled"; + }; + + pm8550_pwm: pwm { + compatible =3D "qcom,pm8550-pwm", "qcom,pm8350c-pwm"; + #pwm-cells =3D <2>; + + status =3D "disabled"; + }; + }; + + /* PMC8380VE */ + pm8550ve_2: pmic@2 { + compatible =3D "qcom,pm8550", "qcom,spmi-pmic"; + reg =3D <0x2 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pm8550ve_2_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pm8550ve_2_gpios: gpio@8800 { + compatible =3D "qcom,pm8550ve-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pm8550ve_2_gpios 0 0 8>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + /* PMC8380 is actually not a PM8550 series rebrand */ + pmc8380_3: pmic@3 { + compatible =3D "qcom,pmc8380", "qcom,spmi-pmic"; + reg =3D <0x3 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmc8380_3_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x3 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmc8380_3_gpios: gpio@8800 { + compatible =3D "qcom,pmc8380-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmc8380_3_gpios 0 0 10>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + pmc8380_4: pmic@4 { + compatible =3D "qcom,pmc8380", "qcom,spmi-pmic"; + reg =3D <0x4 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmc8380_4_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmc8380_4_gpios: gpio@8800 { + compatible =3D "qcom,pmc8380-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmc8380_4_gpios 0 0 10>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + pmc8380_5: pmic@5 { + compatible =3D "qcom,pmc8380", "qcom,spmi-pmic"; + reg =3D <0x5 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmc8380_5_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmc8380_5_gpios: gpio@8800 { + compatible =3D "qcom,pmc8380-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmc8380_5_gpios 0 0 10>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + pmc8380_6: pmic@6 { + compatible =3D "qcom,pmc8380", "qcom,spmi-pmic"; + reg =3D <0x6 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmc8380_6_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmc8380_6_gpios: gpio@8800 { + compatible =3D "qcom,pmc8380-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmc8380_6_gpios 0 0 10>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + /* PMC8380VE */ + pm8550ve_8: pmic@8 { + compatible =3D "qcom,pm8550", "qcom,spmi-pmic"; + reg =3D <0x8 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pm8550ve_8_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x8 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pm8550ve_8_gpios: gpio@8800 { + compatible =3D "qcom,pm8550ve-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pm8550ve_8_gpios 0 0 8>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + /* PMC8380VE */ + pm8550ve_9: pmic@9 { + compatible =3D "qcom,pm8550", "qcom,spmi-pmic"; + reg =3D <0x9 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pm8550ve_9_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x9 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pm8550ve_9_gpios: gpio@8800 { + compatible =3D "qcom,pm8550ve-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pm8550ve_9_gpios 0 0 8>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + pm8010: pmic@c { + compatible =3D "qcom,pm8010", "qcom,spmi-pmic"; + reg =3D <0xc SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pm8010_temp_alarm: temp-alarm@2400 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0x2400>; + interrupts =3D <0xc 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + }; }; =20 &spmi_bus1 { @@ -48,4 +515,17 @@ smb2360_2_eusb2_repeater: phy@fd00 { #phy-cells =3D <0>; }; }; + + smb2360_3: pmic@c { + compatible =3D "qcom,smb2360", "qcom,spmi-pmic"; + reg =3D <0xc SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + smb2360_3_eusb2_repeater: phy@fd00 { + compatible =3D "qcom,smb2360-eusb2-repeater"; + reg =3D <0xfd00>; + #phy-cells =3D <0>; + }; + }; }; --=20 2.45.1