From nobody Fri Dec 19 21:11:49 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 266F7143897 for ; Tue, 28 May 2024 22:20:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934831; cv=none; b=hKjFixotFCWiujUAhYxf3+3y0CUs4jLU/4ocLyi8KgYCjMb5Jr+dSp/W4nnBNvpITvbeMnnDcj0/9Q8gzdrmtLC2BKC5+02x7tmKkhk77H17Qkd5G7t3NLDHZovY9KTnqcmi+znpvVoHOg3FUq4l42crK+wRXgtJqNlXdRi+utg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934831; c=relaxed/simple; bh=U/FAikBS3HIFP4hXSxgNs+s+WZEIA9TL/WVzdp6SVyw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YLvRtXXDepW1xj0ozHY4ezr+Wbho3LG7Qq55xKmPOOKfgdhTelHr1i+1HQctI9QdF9KqpetjKfdlwYLJ3ROy/pEVeAaJNp3MJZEoWWOdBMSgnnnz8xSvsMND2Cuvd4/sZW7Oby3TzbIJ3kzGM/f9c0fPnFbZWtl3qtZuROPUiuI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=g65LGB+X; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="g65LGB+X" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716934830; x=1748470830; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=U/FAikBS3HIFP4hXSxgNs+s+WZEIA9TL/WVzdp6SVyw=; b=g65LGB+XU5NUvFQtFJoq0qK0m6medeNL7DVeFCzu3nWDaGFUPHPlBpV3 oKcm/MPnrzOCFJnk3qKO5cntzvfOt4PgtttMEtdqWR9PCjzmLbcPFVBf1 KoewG1VppHhQyLLOOtsUOXGbp4mBCQufytsr9Qha9UZVVZ44ImoBf6OaV mzVU3/GJrCVOkVO0eya5Y7VQHIozZsZA/oeaV/GyTHTEB3+GBKCFFdgQK A6YAMLq/TArR6Avt4GeJrfemm6XhVzQUxw+XjdhEPHMu62uA8Zy9541uV MqrGFIaoRGkwWecuXl9iH+yLOtVzNGgGaicQNTGwkb9iRVpNzTbMWhPju g==; X-CSE-ConnectionGUID: IC6XnJ95SXaLht/aglWa3g== X-CSE-MsgGUID: Y1bK4j2URbmzEiySib8Y5A== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="30812268" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812268" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:20 -0700 X-CSE-ConnectionGUID: cy0GYZ9QRe61jPOC1hVxbg== X-CSE-MsgGUID: 3spDZ/YyScyOBcsfGegt8A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090788" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:20 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 19/20] x86/resctrl: Sub-NUMA Cluster (SNC) detection and enabling Date: Tue, 28 May 2024 15:20:04 -0700 Message-ID: <20240528222006.58283-20-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There isn't a simple hardware bit that indicates whether a CPU is running in Sub-NUMA Cluster (SNC) mode. Infer the state by comparing number CPUs sharing the L3 cache with CPU0 to the number of CPUs in the same NUMA node as CPU0. If SNC mode is detected, print a single informational message to the console. Add the missing definition of pr_fmt() to monitor.c. This wasn't noticed before as there are only "can't happen" console messages from this file. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/monitor.c | 59 +++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index c7559735e33a..1c5162a68461 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -15,6 +15,8 @@ * Software Developer Manual June 2016, volume 3, section 17.17. */ =20 +#define pr_fmt(fmt) "resctrl: " fmt + #include #include #include @@ -1095,6 +1097,61 @@ void arch_mon_domain_online(struct rdt_resource *r, = struct rdt_mon_domain *d) wrmsrl(MSR_RMID_SNC_CONFIG, val); } =20 +/* CPU models that support MSR_RMID_SNC_CONFIG */ +static const struct x86_cpu_id snc_cpu_ids[] __initconst =3D { + X86_MATCH_VFM(INTEL_ICELAKE_X, 0), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, 0), + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, 0), + X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, 0), + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, 0), + {} +}; + +/* + * There isn't a simple hardware bit that indicates whether a CPU is runni= ng + * in Sub-NUMA Cluster (SNC) mode. Infer the state by comparing the + * number CPUs sharing the L3 cache with CPU0 to the number of CPUs in + * the same NUMA node as CPU0. + * It is not possible to accurately determine SNC state if the system is + * booted with a maxcpus=3DN parameter. That distorts the ratio of SNC nod= es + * to L3 caches. It will be OK if system is booted with hyperthreading + * disabled (since this doesn't affect the ratio). + */ +static __init int snc_get_config(void) +{ + struct cacheinfo *ci =3D get_cpu_cacheinfo_level(0, RESCTRL_L3_CACHE); + const cpumask_t *node0_cpumask; + int ret; + + if (!x86_match_cpu(snc_cpu_ids) || !ci) + return 1; + + cpus_read_lock(); + if (num_online_cpus() !=3D num_present_cpus()) + pr_warn("Some CPUs offline, SNC detection may be incorrect\n"); + cpus_read_unlock(); + + node0_cpumask =3D cpumask_of_node(cpu_to_node(0)); + + ret =3D cpumask_weight(&ci->shared_cpu_map) / cpumask_weight(node0_cpumas= k); + + /* sanity check: Only valid results are 1, 2, 3, 4 */ + switch (ret) { + case 1: + break; + case 2 ... 4: + pr_info("Sub-NUMA Cluster mode detected with %d nodes per L3 cache\n", r= et); + rdt_resources_all[RDT_RESOURCE_L3].r_resctrl.mon_scope =3D RESCTRL_L3_NO= DE; + break; + default: + pr_warn("Ignore improbable SNC node count %d\n", ret); + ret =3D 1; + break; + } + + return ret; +} + int __init rdt_get_mon_l3_config(struct rdt_resource *r) { unsigned int mbm_offset =3D boot_cpu_data.x86_cache_mbm_width_offset; @@ -1102,6 +1159,8 @@ int __init rdt_get_mon_l3_config(struct rdt_resource = *r) unsigned int threshold; int ret; =20 + snc_nodes_per_l3_cache =3D snc_get_config(); + resctrl_rmid_realloc_limit =3D boot_cpu_data.x86_cache_size * 1024; hw_res->mon_scale =3D boot_cpu_data.x86_cache_occ_scale / snc_nodes_per_l= 3_cache; r->num_rmid =3D (boot_cpu_data.x86_cache_max_rmid + 1) / snc_nodes_per_l3= _cache; --=20 2.45.0