From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 084DB13DDBF for ; Tue, 28 May 2024 22:20:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934818; cv=none; b=IrYAjBkQ6LRIvqwKsHU2vm/jvks7Xb9fkldQlxDn6064Nw+IlFgQ+yfMcpkl1E7WvJ0L8chY6socDCbj0UCxKg130RTq2f506wWorokUIynzc2qKJoP3sjz8ia+wk79YQaPlqIvgZhyuI68R557kDc6LI1gdEHQrYSYChmuaVZ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934818; c=relaxed/simple; bh=5peP8F6oKzRar74xxSOMuHqN2psAFqEAIzjXgPbBI04=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cjl6UAe3GH5DijpUSFuia6EHA3iXMp2grOqlceRJai7KaUt5fBqh5fPUrl9khUGcj3gYW4i+n2+/YDkcgKtX1W/nNobY8y7QGvhVeH0OHq8I47+lgtaf9GTGZEVF+fxdWVuERZJUEtnvX0ZIvAP6p7LNZSiaMZX/gF+5tV5QujE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ctIPmu1t; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ctIPmu1t" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716934816; x=1748470816; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5peP8F6oKzRar74xxSOMuHqN2psAFqEAIzjXgPbBI04=; b=ctIPmu1tLV/IxOUKQyQmO8ew3SdIsWk87QS9d5XSe2IZtBPyDaDh/Tc9 EkO6UzJlAHLM3MmoNoxpIVn0PNoIJF4hDmH7Lz6WpjdNKEBODPs8lmQWo wUGi7d+6GsL0eK7O5BNNEfjRi6uvUT9ixwoyCDr/na5invZCZmUB9xx/G W+vlJ6UIVSyEyJX0Mk/LCHcX7ZJn8PH24SMGXNOpB0rohV2QLvX2q6IcC +DejZDFqYc7Oj7WFDJxB0AqUENJMxqFuQ1eNGuFQW2V63m1iXrmj6x0qQ VgTvd1TePjrqxzP6jTBYRclnn/njMFAKjj8AphJ0RRubv24rJayrMU+lT Q==; X-CSE-ConnectionGUID: eFUmqHXIQQK0oCbFzFLSxA== X-CSE-MsgGUID: 3mPS9GmnTCiYEhn5XGddcw== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="30812139" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812139" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:15 -0700 X-CSE-ConnectionGUID: FFlAPoXiSpqhjzb1eOpa+Q== X-CSE-MsgGUID: SZ9BXpg3RQKT8PSJ2o8TLA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090713" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:14 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 01/20] x86/resctrl: Prepare for new domain scope Date: Tue, 28 May 2024 15:19:46 -0700 Message-ID: <20240528222006.58283-2-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Resctrl resources operate on subsets of CPUs in the system with the defining attribute of each subset being an instance of a particular level of cache. E.g. all CPUs sharing an L3 cache would be part of the same domain. In preparation for features that are scoped at the NUMA node level change the code from explicit references to "cache_level" to a more generic scope. At this point the only options for this scope are groups of CPUs that share an L2 cache or L3 cache. Clean up the error handling when looking up domains. Report invalid id's before calling rdt_find_domain() in preparation for better messages when scope can be other than cache scope. This means that rdt_find_domain() will never return an error. So remove checks for error from the callsites. Signed-off-by: Tony Luck --- include/linux/resctrl.h | 9 ++++- arch/x86/kernel/cpu/resctrl/core.c | 46 ++++++++++++++++------- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 2 +- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 6 ++- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 5 ++- 5 files changed, 49 insertions(+), 19 deletions(-) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index a365f67131ec..ed693bfe474d 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -150,13 +150,18 @@ struct resctrl_membw { struct rdt_parse_data; struct resctrl_schema; =20 +enum resctrl_scope { + RESCTRL_L2_CACHE =3D 2, + RESCTRL_L3_CACHE =3D 3, +}; + /** * struct rdt_resource - attributes of a resctrl resource * @rid: The index of the resource * @alloc_capable: Is allocation available on this machine * @mon_capable: Is monitor feature available on this machine * @num_rmid: Number of RMIDs available - * @cache_level: Which cache level defines scope of this resource + * @scope: Scope of this resource * @cache: Cache allocation related data * @membw: If the component has bandwidth controls, their properties. * @domains: RCU list of all domains for this resource @@ -174,7 +179,7 @@ struct rdt_resource { bool alloc_capable; bool mon_capable; int num_rmid; - int cache_level; + enum resctrl_scope scope; struct resctrl_cache cache; struct resctrl_membw membw; struct list_head domains; diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index a113d9aba553..f85b2ff40eef 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -68,7 +68,7 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_L3, .name =3D "L3", - .cache_level =3D 3, + .scope =3D RESCTRL_L3_CACHE, .domains =3D domain_init(RDT_RESOURCE_L3), .parse_ctrlval =3D parse_cbm, .format_str =3D "%d=3D%0*x", @@ -82,7 +82,7 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_L2, .name =3D "L2", - .cache_level =3D 2, + .scope =3D RESCTRL_L2_CACHE, .domains =3D domain_init(RDT_RESOURCE_L2), .parse_ctrlval =3D parse_cbm, .format_str =3D "%d=3D%0*x", @@ -96,7 +96,7 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_MBA, .name =3D "MB", - .cache_level =3D 3, + .scope =3D RESCTRL_L3_CACHE, .domains =3D domain_init(RDT_RESOURCE_MBA), .parse_ctrlval =3D parse_bw, .format_str =3D "%d=3D%*u", @@ -108,7 +108,7 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_SMBA, .name =3D "SMBA", - .cache_level =3D 3, + .scope =3D RESCTRL_L3_CACHE, .domains =3D domain_init(RDT_RESOURCE_SMBA), .parse_ctrlval =3D parse_bw, .format_str =3D "%d=3D%*u", @@ -392,9 +392,6 @@ struct rdt_domain *rdt_find_domain(struct rdt_resource = *r, int id, struct rdt_domain *d; struct list_head *l; =20 - if (id < 0) - return ERR_PTR(-ENODEV); - list_for_each(l, &r->domains) { d =3D list_entry(l, struct rdt_domain, list); /* When id is found, return its domain. */ @@ -484,6 +481,19 @@ static int arch_domain_mbm_alloc(u32 num_rmid, struct = rdt_hw_domain *hw_dom) return 0; } =20 +static int get_domain_id_from_scope(int cpu, enum resctrl_scope scope) +{ + switch (scope) { + case RESCTRL_L2_CACHE: + case RESCTRL_L3_CACHE: + return get_cpu_cacheinfo_id(cpu, scope); + default: + break; + } + + return -EINVAL; +} + /* * domain_add_cpu - Add a cpu to a resource's domain list. * @@ -499,7 +509,7 @@ static int arch_domain_mbm_alloc(u32 num_rmid, struct r= dt_hw_domain *hw_dom) */ static void domain_add_cpu(int cpu, struct rdt_resource *r) { - int id =3D get_cpu_cacheinfo_id(cpu, r->cache_level); + int id =3D get_domain_id_from_scope(cpu, r->scope); struct list_head *add_pos =3D NULL; struct rdt_hw_domain *hw_dom; struct rdt_domain *d; @@ -507,12 +517,14 @@ static void domain_add_cpu(int cpu, struct rdt_resour= ce *r) =20 lockdep_assert_held(&domain_list_lock); =20 - d =3D rdt_find_domain(r, id, &add_pos); - if (IS_ERR(d)) { - pr_warn("Couldn't find cache id for CPU %d\n", cpu); + if (id < 0) { + pr_warn_once("Can't find domain id for CPU:%d scope:%d for resource %s\n= ", + cpu, r->scope, r->name); return; } =20 + d =3D rdt_find_domain(r, id, &add_pos); + if (d) { cpumask_set_cpu(cpu, &d->cpu_mask); if (r->cache.arch_has_per_cpu_cfg) @@ -552,15 +564,21 @@ static void domain_add_cpu(int cpu, struct rdt_resour= ce *r) =20 static void domain_remove_cpu(int cpu, struct rdt_resource *r) { - int id =3D get_cpu_cacheinfo_id(cpu, r->cache_level); + int id =3D get_domain_id_from_scope(cpu, r->scope); struct rdt_hw_domain *hw_dom; struct rdt_domain *d; =20 lockdep_assert_held(&domain_list_lock); =20 + if (id < 0) { + pr_warn_once("Can't find domain id for CPU:%d scope:%d for resource %s\n= ", + cpu, r->scope, r->name); + return; + } + d =3D rdt_find_domain(r, id, NULL); - if (IS_ERR_OR_NULL(d)) { - pr_warn("Couldn't find cache id for CPU %d\n", cpu); + if (!d) { + pr_warn("Couldn't find domain with id=3D%d for CPU %d\n", id, cpu); return; } hw_dom =3D resctrl_to_arch_dom(d); diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index b7291f60399c..2bf021d42500 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -577,7 +577,7 @@ int rdtgroup_mondata_show(struct seq_file *m, void *arg) =20 r =3D &rdt_resources_all[resid].r_resctrl; d =3D rdt_find_domain(r, domid, NULL); - if (IS_ERR_OR_NULL(d)) { + if (!d) { ret =3D -ENOENT; goto out; } diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index aacf236dfe3b..7c4bf0a006ce 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -292,10 +292,14 @@ static void pseudo_lock_region_clear(struct pseudo_lo= ck_region *plr) */ static int pseudo_lock_region_init(struct pseudo_lock_region *plr) { + enum resctrl_scope scope =3D plr->s->res->scope; struct cpu_cacheinfo *ci; int ret; int i; =20 + if (WARN_ON_ONCE(scope !=3D RESCTRL_L2_CACHE && scope !=3D RESCTRL_L3_CAC= HE)) + return -ENODEV; + /* Pick the first cpu we find that is associated with the cache. */ plr->cpu =3D cpumask_first(&plr->d->cpu_mask); =20 @@ -311,7 +315,7 @@ static int pseudo_lock_region_init(struct pseudo_lock_r= egion *plr) plr->size =3D rdtgroup_cbm_to_size(plr->s->res, plr->d, plr->cbm); =20 for (i =3D 0; i < ci->num_leaves; i++) { - if (ci->info_list[i].level =3D=3D plr->s->res->cache_level) { + if (ci->info_list[i].level =3D=3D scope) { plr->line_size =3D ci->info_list[i].coherency_line_size; return 0; } diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 02f213f1c51c..b8588ce88eef 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1454,10 +1454,13 @@ unsigned int rdtgroup_cbm_to_size(struct rdt_resour= ce *r, unsigned int size =3D 0; int num_b, i; =20 + if (WARN_ON_ONCE(r->scope !=3D RESCTRL_L2_CACHE && r->scope !=3D RESCTRL_= L3_CACHE)) + return size; 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d="scan'208";a="40090716" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:15 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 02/20] x86/resctrl: Prepare to split rdt_domain structure Date: Tue, 28 May 2024 15:19:47 -0700 Message-ID: <20240528222006.58283-3-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The rdt_domain structure is used for both control and monitor features. It is about to be split into separate structures for these two usages because the scope for control and monitoring features for a resource will be different for future resources. To allow for common code that scans a list of domains looking for a specific domain id, move all the common fields ("list", "id", "cpu_mask") into their own structure within the rdt_domain structure. Signed-off-by: Tony Luck --- include/linux/resctrl.h | 16 ++++-- arch/x86/kernel/cpu/resctrl/core.c | 26 +++++----- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 24 ++++----- arch/x86/kernel/cpu/resctrl/monitor.c | 14 +++--- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 14 +++--- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 60 +++++++++++------------ 6 files changed, 81 insertions(+), 73 deletions(-) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index ed693bfe474d..f63fcf17a3bc 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -59,10 +59,20 @@ struct resctrl_staged_config { }; =20 /** - * struct rdt_domain - group of CPUs sharing a resctrl resource + * struct rdt_domain_hdr - common header for different domain types * @list: all instances of this resource * @id: unique id for this instance * @cpu_mask: which CPUs share this resource + */ +struct rdt_domain_hdr { + struct list_head list; + int id; + struct cpumask cpu_mask; +}; + +/** + * struct rdt_domain - group of CPUs sharing a resctrl resource + * @hdr: common header for different domain types * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold * @mbm_total: saved state for MBM total bandwidth * @mbm_local: saved state for MBM local bandwidth @@ -77,9 +87,7 @@ struct resctrl_staged_config { * by closid */ struct rdt_domain { - struct list_head list; - int id; - struct cpumask cpu_mask; + struct rdt_domain_hdr hdr; unsigned long *rmid_busy_llc; struct mbm_state *mbm_total; struct mbm_state *mbm_local; diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index f85b2ff40eef..96fff44f9d03 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -355,9 +355,9 @@ struct rdt_domain *get_domain_from_cpu(int cpu, struct = rdt_resource *r) =20 lockdep_assert_cpus_held(); =20 - list_for_each_entry(d, &r->domains, list) { + list_for_each_entry(d, &r->domains, hdr.list) { /* Find the domain that contains this CPU */ - if (cpumask_test_cpu(cpu, &d->cpu_mask)) + if (cpumask_test_cpu(cpu, &d->hdr.cpu_mask)) return d; } =20 @@ -393,12 +393,12 @@ struct rdt_domain *rdt_find_domain(struct rdt_resourc= e *r, int id, struct list_head *l; =20 list_for_each(l, &r->domains) { - d =3D list_entry(l, struct rdt_domain, list); + d =3D list_entry(l, struct rdt_domain, hdr.list); /* When id is found, return its domain. */ - if (id =3D=3D d->id) + if (id =3D=3D d->hdr.id) return d; /* Stop searching when finding id's position in sorted list. */ - if (id < d->id) + if (id < d->hdr.id) break; } =20 @@ -526,7 +526,7 @@ static void domain_add_cpu(int cpu, struct rdt_resource= *r) d =3D rdt_find_domain(r, id, &add_pos); =20 if (d) { - cpumask_set_cpu(cpu, &d->cpu_mask); + cpumask_set_cpu(cpu, &d->hdr.cpu_mask); if (r->cache.arch_has_per_cpu_cfg) rdt_domain_reconfigure_cdp(r); return; @@ -537,8 +537,8 @@ static void domain_add_cpu(int cpu, struct rdt_resource= *r) return; =20 d =3D &hw_dom->d_resctrl; - d->id =3D id; - cpumask_set_cpu(cpu, &d->cpu_mask); + d->hdr.id =3D id; + cpumask_set_cpu(cpu, &d->hdr.cpu_mask); =20 rdt_domain_reconfigure_cdp(r); =20 @@ -552,11 +552,11 @@ static void domain_add_cpu(int cpu, struct rdt_resour= ce *r) return; } =20 - list_add_tail_rcu(&d->list, add_pos); + list_add_tail_rcu(&d->hdr.list, add_pos); =20 err =3D resctrl_online_domain(r, d); if (err) { - list_del_rcu(&d->list); + list_del_rcu(&d->hdr.list); synchronize_rcu(); domain_free(hw_dom); } @@ -583,10 +583,10 @@ static void domain_remove_cpu(int cpu, struct rdt_res= ource *r) } hw_dom =3D resctrl_to_arch_dom(d); =20 - cpumask_clear_cpu(cpu, &d->cpu_mask); - if (cpumask_empty(&d->cpu_mask)) { + cpumask_clear_cpu(cpu, &d->hdr.cpu_mask); + if (cpumask_empty(&d->hdr.cpu_mask)) { resctrl_offline_domain(r, d); - list_del_rcu(&d->list); + list_del_rcu(&d->hdr.list); synchronize_rcu(); =20 /* diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index 2bf021d42500..6246f48b0449 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -69,7 +69,7 @@ int parse_bw(struct rdt_parse_data *data, struct resctrl_= schema *s, =20 cfg =3D &d->staged_config[s->conf_type]; if (cfg->have_new_ctrl) { - rdt_last_cmd_printf("Duplicate domain %d\n", d->id); + rdt_last_cmd_printf("Duplicate domain %d\n", d->hdr.id); return -EINVAL; } =20 @@ -148,7 +148,7 @@ int parse_cbm(struct rdt_parse_data *data, struct resct= rl_schema *s, =20 cfg =3D &d->staged_config[s->conf_type]; if (cfg->have_new_ctrl) { - rdt_last_cmd_printf("Duplicate domain %d\n", d->id); + rdt_last_cmd_printf("Duplicate domain %d\n", d->hdr.id); return -EINVAL; } =20 @@ -231,8 +231,8 @@ static int parse_line(char *line, struct resctrl_schema= *s, return -EINVAL; } dom =3D strim(dom); - list_for_each_entry(d, &r->domains, list) { - if (d->id =3D=3D dom_id) { + list_for_each_entry(d, &r->domains, hdr.list) { + if (d->hdr.id =3D=3D dom_id) { data.buf =3D dom; data.rdtgrp =3D rdtgrp; if (r->parse_ctrlval(&data, s, d)) @@ -280,7 +280,7 @@ int resctrl_arch_update_one(struct rdt_resource *r, str= uct rdt_domain *d, u32 idx =3D get_config_index(closid, t); struct msr_param msr_param; =20 - if (!cpumask_test_cpu(smp_processor_id(), &d->cpu_mask)) + if (!cpumask_test_cpu(smp_processor_id(), &d->hdr.cpu_mask)) return -EINVAL; =20 hw_dom->ctrl_val[idx] =3D cfg_val; @@ -306,7 +306,7 @@ int resctrl_arch_update_domains(struct rdt_resource *r,= u32 closid) /* Walking r->domains, ensure it can't race with cpuhp */ lockdep_assert_cpus_held(); =20 - list_for_each_entry(d, &r->domains, list) { + list_for_each_entry(d, &r->domains, hdr.list) { hw_dom =3D resctrl_to_arch_dom(d); msr_param.res =3D NULL; for (t =3D 0; t < CDP_NUM_TYPES; t++) { @@ -330,7 +330,7 @@ int resctrl_arch_update_domains(struct rdt_resource *r,= u32 closid) } } if (msr_param.res) - smp_call_function_any(&d->cpu_mask, rdt_ctrl_update, &msr_param, 1); + smp_call_function_any(&d->hdr.cpu_mask, rdt_ctrl_update, &msr_param, 1); } =20 return 0; @@ -450,7 +450,7 @@ static void show_doms(struct seq_file *s, struct resctr= l_schema *schema, int clo lockdep_assert_cpus_held(); =20 seq_printf(s, "%*s:", max_name_width, schema->name); - list_for_each_entry(dom, &r->domains, list) { + list_for_each_entry(dom, &r->domains, hdr.list) { if (sep) seq_puts(s, ";"); =20 @@ -460,7 +460,7 @@ static void show_doms(struct seq_file *s, struct resctr= l_schema *schema, int clo ctrl_val =3D resctrl_arch_get_config(r, dom, closid, schema->conf_type); =20 - seq_printf(s, r->format_str, dom->id, max_data_width, + seq_printf(s, r->format_str, dom->hdr.id, max_data_width, ctrl_val); sep =3D true; } @@ -489,7 +489,7 @@ int rdtgroup_schemata_show(struct kernfs_open_file *of, } else { seq_printf(s, "%s:%d=3D%x\n", rdtgrp->plr->s->res->name, - rdtgrp->plr->d->id, + rdtgrp->plr->d->hdr.id, rdtgrp->plr->cbm); } } else { @@ -537,7 +537,7 @@ void mon_event_read(struct rmid_read *rr, struct rdt_re= source *r, return; } =20 - cpu =3D cpumask_any_housekeeping(&d->cpu_mask, RESCTRL_PICK_ANY_CPU); + cpu =3D cpumask_any_housekeeping(&d->hdr.cpu_mask, RESCTRL_PICK_ANY_CPU); =20 /* * cpumask_any_housekeeping() prefers housekeeping CPUs, but @@ -546,7 +546,7 @@ void mon_event_read(struct rmid_read *rr, struct rdt_re= source *r, * counters on some platforms if its called in IRQ context. */ if (tick_nohz_full_cpu(cpu)) - smp_call_function_any(&d->cpu_mask, mon_event_count, rr, 1); + smp_call_function_any(&d->hdr.cpu_mask, mon_event_count, rr, 1); else smp_call_on_cpu(cpu, smp_mon_event_count, rr, false); =20 diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index 2345e6836593..ab8a198d88b3 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -281,7 +281,7 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, stru= ct rdt_domain *d, =20 resctrl_arch_rmid_read_context_check(); =20 - if (!cpumask_test_cpu(smp_processor_id(), &d->cpu_mask)) + if (!cpumask_test_cpu(smp_processor_id(), &d->hdr.cpu_mask)) return -EINVAL; =20 ret =3D __rmid_read(rmid, eventid, &msr_val); @@ -364,7 +364,7 @@ void __check_limbo(struct rdt_domain *d, bool force_fre= e) * CLOSID and RMID because there may be dependencies between them * on some architectures. */ - trace_mon_llc_occupancy_limbo(entry->closid, entry->rmid, d->id, val); + trace_mon_llc_occupancy_limbo(entry->closid, entry->rmid, d->hdr.id, va= l); } =20 if (force_free || !rmid_dirty) { @@ -490,7 +490,7 @@ static void add_rmid_to_limbo(struct rmid_entry *entry) idx =3D resctrl_arch_rmid_idx_encode(entry->closid, entry->rmid); =20 entry->busy =3D 0; - list_for_each_entry(d, &r->domains, list) { + list_for_each_entry(d, &r->domains, hdr.list) { /* * For the first limbo RMID in the domain, * setup up the limbo worker. @@ -801,7 +801,7 @@ void cqm_handle_limbo(struct work_struct *work) __check_limbo(d, false); =20 if (has_busy_rmid(d)) { - d->cqm_work_cpu =3D cpumask_any_housekeeping(&d->cpu_mask, + d->cqm_work_cpu =3D cpumask_any_housekeeping(&d->hdr.cpu_mask, RESCTRL_PICK_ANY_CPU); schedule_delayed_work_on(d->cqm_work_cpu, &d->cqm_limbo, delay); @@ -825,7 +825,7 @@ void cqm_setup_limbo_handler(struct rdt_domain *dom, un= signed long delay_ms, unsigned long delay =3D msecs_to_jiffies(delay_ms); int cpu; =20 - cpu =3D cpumask_any_housekeeping(&dom->cpu_mask, exclude_cpu); + cpu =3D cpumask_any_housekeeping(&dom->hdr.cpu_mask, exclude_cpu); dom->cqm_work_cpu =3D cpu; =20 if (cpu < nr_cpu_ids) @@ -868,7 +868,7 @@ void mbm_handle_overflow(struct work_struct *work) * Re-check for housekeeping CPUs. This allows the overflow handler to * move off a nohz_full CPU quickly. */ - d->mbm_work_cpu =3D cpumask_any_housekeeping(&d->cpu_mask, + d->mbm_work_cpu =3D cpumask_any_housekeeping(&d->hdr.cpu_mask, RESCTRL_PICK_ANY_CPU); schedule_delayed_work_on(d->mbm_work_cpu, &d->mbm_over, delay); =20 @@ -897,7 +897,7 @@ void mbm_setup_overflow_handler(struct rdt_domain *dom,= unsigned long delay_ms, */ if (!resctrl_mounted || !resctrl_arch_mon_capable()) return; - cpu =3D cpumask_any_housekeeping(&dom->cpu_mask, exclude_cpu); + cpu =3D cpumask_any_housekeeping(&dom->hdr.cpu_mask, exclude_cpu); dom->mbm_work_cpu =3D cpu; =20 if (cpu < nr_cpu_ids) diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index 7c4bf0a006ce..36d943cb847a 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -221,7 +221,7 @@ static int pseudo_lock_cstates_constrain(struct pseudo_= lock_region *plr) int cpu; int ret; =20 - for_each_cpu(cpu, &plr->d->cpu_mask) { + for_each_cpu(cpu, &plr->d->hdr.cpu_mask) { pm_req =3D kzalloc(sizeof(*pm_req), GFP_KERNEL); if (!pm_req) { rdt_last_cmd_puts("Failure to allocate memory for PM QoS\n"); @@ -301,7 +301,7 @@ static int pseudo_lock_region_init(struct pseudo_lock_r= egion *plr) return -ENODEV; =20 /* Pick the first cpu we find that is associated with the cache. */ - plr->cpu =3D cpumask_first(&plr->d->cpu_mask); + plr->cpu =3D cpumask_first(&plr->d->hdr.cpu_mask); =20 if (!cpu_online(plr->cpu)) { rdt_last_cmd_printf("CPU %u associated with cache not online\n", @@ -859,10 +859,10 @@ bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_d= omain *d) * associated with them. */ for_each_alloc_capable_rdt_resource(r) { - list_for_each_entry(d_i, &r->domains, list) { + list_for_each_entry(d_i, &r->domains, hdr.list) { if (d_i->plr) cpumask_or(cpu_with_psl, cpu_with_psl, - &d_i->cpu_mask); + &d_i->hdr.cpu_mask); } } =20 @@ -870,7 +870,7 @@ bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_dom= ain *d) * Next test if new pseudo-locked region would intersect with * existing region. */ - if (cpumask_intersects(&d->cpu_mask, cpu_with_psl)) + if (cpumask_intersects(&d->hdr.cpu_mask, cpu_with_psl)) ret =3D true; =20 free_cpumask_var(cpu_with_psl); @@ -1202,7 +1202,7 @@ static int pseudo_lock_measure_cycles(struct rdtgroup= *rdtgrp, int sel) } =20 plr->thread_done =3D 0; - cpu =3D cpumask_first(&plr->d->cpu_mask); + cpu =3D cpumask_first(&plr->d->hdr.cpu_mask); if (!cpu_online(cpu)) { ret =3D -ENODEV; goto out; @@ -1532,7 +1532,7 @@ static int pseudo_lock_dev_mmap(struct file *filp, st= ruct vm_area_struct *vma) * may be scheduled elsewhere and invalidate entries in the * pseudo-locked region. */ - if (!cpumask_subset(current->cpus_ptr, &plr->d->cpu_mask)) { + if (!cpumask_subset(current->cpus_ptr, &plr->d->hdr.cpu_mask)) { mutex_unlock(&rdtgroup_mutex); return -EINVAL; } diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index b8588ce88eef..e6e2753738c9 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -98,7 +98,7 @@ void rdt_staged_configs_clear(void) lockdep_assert_held(&rdtgroup_mutex); =20 for_each_alloc_capable_rdt_resource(r) { - list_for_each_entry(dom, &r->domains, list) + list_for_each_entry(dom, &r->domains, hdr.list) memset(dom->staged_config, 0, sizeof(dom->staged_config)); } } @@ -317,7 +317,7 @@ static int rdtgroup_cpus_show(struct kernfs_open_file *= of, rdt_last_cmd_puts("Cache domain offline\n"); ret =3D -ENODEV; } else { - mask =3D &rdtgrp->plr->d->cpu_mask; + mask =3D &rdtgrp->plr->d->hdr.cpu_mask; seq_printf(s, is_cpu_list(of) ? "%*pbl\n" : "%*pb\n", cpumask_pr_args(mask)); @@ -1021,12 +1021,12 @@ static int rdt_bit_usage_show(struct kernfs_open_fi= le *of, cpus_read_lock(); mutex_lock(&rdtgroup_mutex); hw_shareable =3D r->cache.shareable_bits; - list_for_each_entry(dom, &r->domains, list) { + list_for_each_entry(dom, &r->domains, hdr.list) { if (sep) seq_putc(seq, ';'); sw_shareable =3D 0; exclusive =3D 0; - seq_printf(seq, "%d=3D", dom->id); + seq_printf(seq, "%d=3D", dom->hdr.id); for (i =3D 0; i < closids_supported(); i++) { if (!closid_allocated(i)) continue; @@ -1343,7 +1343,7 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgr= oup *rdtgrp) if (r->rid =3D=3D RDT_RESOURCE_MBA || r->rid =3D=3D RDT_RESOURCE_SMBA) continue; has_cache =3D true; - list_for_each_entry(d, &r->domains, list) { + list_for_each_entry(d, &r->domains, hdr.list) { ctrl =3D resctrl_arch_get_config(r, d, closid, s->conf_type); if (rdtgroup_cbm_overlaps(s, d, ctrl, closid, false)) { @@ -1458,7 +1458,7 @@ unsigned int rdtgroup_cbm_to_size(struct rdt_resource= *r, return size; =20 num_b =3D bitmap_weight(&cbm, r->cache.cbm_len); - ci =3D get_cpu_cacheinfo(cpumask_any(&d->cpu_mask)); + ci =3D get_cpu_cacheinfo(cpumask_any(&d->hdr.cpu_mask)); for (i =3D 0; i < ci->num_leaves; i++) { if (ci->info_list[i].level =3D=3D r->scope) { size =3D ci->info_list[i].size / r->cache.cbm_len * num_b; @@ -1506,7 +1506,7 @@ static int rdtgroup_size_show(struct kernfs_open_file= *of, size =3D rdtgroup_cbm_to_size(rdtgrp->plr->s->res, rdtgrp->plr->d, rdtgrp->plr->cbm); - seq_printf(s, "%d=3D%u\n", rdtgrp->plr->d->id, size); + seq_printf(s, "%d=3D%u\n", rdtgrp->plr->d->hdr.id, size); } goto out; } @@ -1518,7 +1518,7 @@ static int rdtgroup_size_show(struct kernfs_open_file= *of, type =3D schema->conf_type; sep =3D false; seq_printf(s, "%*s:", max_name_width, schema->name); - list_for_each_entry(d, &r->domains, list) { + list_for_each_entry(d, &r->domains, hdr.list) { if (sep) seq_putc(s, ';'); if (rdtgrp->mode =3D=3D RDT_MODE_PSEUDO_LOCKSETUP) { @@ -1536,7 +1536,7 @@ static int rdtgroup_size_show(struct kernfs_open_file= *of, else size =3D rdtgroup_cbm_to_size(r, d, ctrl); } - seq_printf(s, "%d=3D%u", d->id, size); + seq_printf(s, "%d=3D%u", d->hdr.id, size); sep =3D true; } seq_putc(s, '\n'); @@ -1596,7 +1596,7 @@ static void mon_event_config_read(void *info) =20 static void mondata_config_read(struct rdt_domain *d, struct mon_config_in= fo *mon_info) { - smp_call_function_any(&d->cpu_mask, mon_event_config_read, mon_info, 1); + smp_call_function_any(&d->hdr.cpu_mask, mon_event_config_read, mon_info, = 1); } =20 static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32= evtid) @@ -1608,7 +1608,7 @@ static int mbm_config_show(struct seq_file *s, struct= rdt_resource *r, u32 evtid cpus_read_lock(); mutex_lock(&rdtgroup_mutex); =20 - list_for_each_entry(dom, &r->domains, list) { + list_for_each_entry(dom, &r->domains, hdr.list) { if (sep) seq_puts(s, ";"); =20 @@ -1616,7 +1616,7 @@ static int mbm_config_show(struct seq_file *s, struct= rdt_resource *r, u32 evtid mon_info.evtid =3D evtid; mondata_config_read(dom, &mon_info); =20 - seq_printf(s, "%d=3D0x%02x", dom->id, mon_info.mon_config); + seq_printf(s, "%d=3D0x%02x", dom->hdr.id, mon_info.mon_config); sep =3D true; } seq_puts(s, "\n"); @@ -1682,7 +1682,7 @@ static void mbm_config_write_domain(struct rdt_resour= ce *r, * are scoped at the domain level. Writing any of these MSRs * on one CPU is observed by all the CPUs in the domain. */ - smp_call_function_any(&d->cpu_mask, mon_event_config_write, + smp_call_function_any(&d->hdr.cpu_mask, mon_event_config_write, &mon_info, 1); =20 /* @@ -1732,8 +1732,8 @@ static int mon_config_write(struct rdt_resource *r, c= har *tok, u32 evtid) return -EINVAL; } =20 - list_for_each_entry(d, &r->domains, list) { - if (d->id =3D=3D dom_id) { + list_for_each_entry(d, &r->domains, hdr.list) { + if (d->hdr.id =3D=3D dom_id) { mbm_config_write_domain(r, d, evtid, val); goto next; } @@ -2280,14 +2280,14 @@ static int set_cache_qos_cfg(int level, bool enable) return -ENOMEM; =20 r_l =3D &rdt_resources_all[level].r_resctrl; - list_for_each_entry(d, &r_l->domains, list) { + list_for_each_entry(d, &r_l->domains, hdr.list) { if (r_l->cache.arch_has_per_cpu_cfg) /* Pick all the CPUs in the domain instance */ - for_each_cpu(cpu, &d->cpu_mask) + for_each_cpu(cpu, &d->hdr.cpu_mask) cpumask_set_cpu(cpu, cpu_mask); else /* Pick one CPU from each domain instance to update MSR */ - cpumask_set_cpu(cpumask_any(&d->cpu_mask), cpu_mask); + cpumask_set_cpu(cpumask_any(&d->hdr.cpu_mask), cpu_mask); } =20 /* Update QOS_CFG MSR on all the CPUs in cpu_mask */ @@ -2316,7 +2316,7 @@ void rdt_domain_reconfigure_cdp(struct rdt_resource *= r) static int mba_sc_domain_allocate(struct rdt_resource *r, struct rdt_domai= n *d) { u32 num_closid =3D resctrl_arch_get_num_closid(r); - int cpu =3D cpumask_any(&d->cpu_mask); + int cpu =3D cpumask_any(&d->hdr.cpu_mask); int i; =20 d->mbps_val =3D kcalloc_node(num_closid, sizeof(*d->mbps_val), @@ -2365,7 +2365,7 @@ static int set_mba_sc(bool mba_sc) =20 r->membw.mba_sc =3D mba_sc; =20 - list_for_each_entry(d, &r->domains, list) { + list_for_each_entry(d, &r->domains, hdr.list) { for (i =3D 0; i < num_closid; i++) d->mbps_val[i] =3D MBA_MAX_MBPS; } @@ -2704,7 +2704,7 @@ static int rdt_get_tree(struct fs_context *fc) =20 if (is_mbm_enabled()) { r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; - list_for_each_entry(dom, &r->domains, list) + list_for_each_entry(dom, &r->domains, hdr.list) mbm_setup_overflow_handler(dom, MBM_OVERFLOW_INTERVAL, RESCTRL_PICK_ANY_CPU); } @@ -2831,13 +2831,13 @@ static int reset_all_ctrls(struct rdt_resource *r) * CBMs in all domains to the maximum mask value. Pick one CPU * from each domain to update the MSRs below. */ - list_for_each_entry(d, &r->domains, list) { + list_for_each_entry(d, &r->domains, hdr.list) { hw_dom =3D resctrl_to_arch_dom(d); =20 for (i =3D 0; i < hw_res->num_closid; i++) hw_dom->ctrl_val[i] =3D r->default_ctrl; msr_param.dom =3D d; - smp_call_function_any(&d->cpu_mask, rdt_ctrl_update, &msr_param, 1); + smp_call_function_any(&d->hdr.cpu_mask, rdt_ctrl_update, &msr_param, 1); } =20 return 0; @@ -3035,7 +3035,7 @@ static int mkdir_mondata_subdir(struct kernfs_node *p= arent_kn, char name[32]; int ret; =20 - sprintf(name, "mon_%s_%02d", r->name, d->id); + sprintf(name, "mon_%s_%02d", r->name, d->hdr.id); /* create the directory */ kn =3D kernfs_create_dir(parent_kn, name, parent_kn->mode, prgrp); if (IS_ERR(kn)) @@ -3051,7 +3051,7 @@ static int mkdir_mondata_subdir(struct kernfs_node *p= arent_kn, } =20 priv.u.rid =3D r->rid; - priv.u.domid =3D d->id; + priv.u.domid =3D d->hdr.id; list_for_each_entry(mevt, &r->evt_list, list) { priv.u.evtid =3D mevt->evtid; ret =3D mon_addfile(kn, mevt->name, priv.priv); @@ -3102,7 +3102,7 @@ static int mkdir_mondata_subdir_alldom(struct kernfs_= node *parent_kn, /* Walking r->domains, ensure it can't race with cpuhp */ lockdep_assert_cpus_held(); =20 - list_for_each_entry(dom, &r->domains, list) { + list_for_each_entry(dom, &r->domains, hdr.list) { ret =3D mkdir_mondata_subdir(parent_kn, dom, r, prgrp); if (ret) return ret; @@ -3261,7 +3261,7 @@ static int __init_one_rdt_domain(struct rdt_domain *d= , struct resctrl_schema *s, */ tmp_cbm =3D cfg->new_ctrl; if (bitmap_weight(&tmp_cbm, r->cache.cbm_len) < r->cache.min_cbm_bits) { - rdt_last_cmd_printf("No space on %s:%d\n", s->name, d->id); + rdt_last_cmd_printf("No space on %s:%d\n", s->name, d->hdr.id); return -ENOSPC; } cfg->have_new_ctrl =3D true; @@ -3284,7 +3284,7 @@ static int rdtgroup_init_cat(struct resctrl_schema *s= , u32 closid) struct rdt_domain *d; int ret; =20 - list_for_each_entry(d, &s->res->domains, list) { + list_for_each_entry(d, &s->res->domains, hdr.list) { ret =3D __init_one_rdt_domain(d, s, closid); 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a="30812153" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812153" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:16 -0700 X-CSE-ConnectionGUID: D84n9/pVSPeLAmH2EZ1UJg== X-CSE-MsgGUID: DWdzZNufQM6sZ8e/d7oXAw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090719" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:15 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 03/20] x86/resctrl: Prepare for different scope for control/monitor operations Date: Tue, 28 May 2024 15:19:48 -0700 Message-ID: <20240528222006.58283-4-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Resctrl assumes that control and monitor operations on a resource are performed at the same scope. Prepare for systems that use different scope (specifically Intel needs to split the RDT_RESOURCE_L3 resource to use L3 scope for cache control and NODE scope for cache occupancy and memory bandwidth monitoring). Create separate domain lists for control and monitor operations. Note that errors during initialization of either control or monitor functions on a domain would previously result in that domain being excluded from both control and monitor operations. Now the domains are allocated independently it is no longer required to disable both control and monitor operations if either fail. Signed-off-by: Tony Luck --- include/linux/resctrl.h | 25 ++- arch/x86/kernel/cpu/resctrl/internal.h | 7 +- arch/x86/kernel/cpu/resctrl/core.c | 224 +++++++++++++++++----- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 12 +- arch/x86/kernel/cpu/resctrl/monitor.c | 4 +- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 4 +- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 60 +++--- 7 files changed, 240 insertions(+), 96 deletions(-) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index f63fcf17a3bc..96ddf9ff3183 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -58,15 +58,22 @@ struct resctrl_staged_config { bool have_new_ctrl; }; =20 +enum resctrl_domain_type { + RESCTRL_CTRL_DOMAIN, + RESCTRL_MON_DOMAIN, +}; + /** * struct rdt_domain_hdr - common header for different domain types * @list: all instances of this resource * @id: unique id for this instance + * @type: type of this instance * @cpu_mask: which CPUs share this resource */ struct rdt_domain_hdr { struct list_head list; int id; + enum resctrl_domain_type type; struct cpumask cpu_mask; }; =20 @@ -169,10 +176,12 @@ enum resctrl_scope { * @alloc_capable: Is allocation available on this machine * @mon_capable: Is monitor feature available on this machine * @num_rmid: Number of RMIDs available - * @scope: Scope of this resource + * @ctrl_scope: Scope of this resource for control functions + * @mon_scope: Scope of this resource for monitor functions * @cache: Cache allocation related data * @membw: If the component has bandwidth controls, their properties. - * @domains: RCU list of all domains for this resource + * @ctrl_domains: RCU list of all control domains for this resource + * @mon_domains: RCU list of all monitor domains for this resource * @name: Name to use in "schemata" file. * @data_width: Character width of data when displaying * @default_ctrl: Specifies default cache cbm or memory B/W percent. @@ -187,10 +196,12 @@ struct rdt_resource { bool alloc_capable; bool mon_capable; int num_rmid; - enum resctrl_scope scope; + enum resctrl_scope ctrl_scope; + enum resctrl_scope mon_scope; struct resctrl_cache cache; struct resctrl_membw membw; - struct list_head domains; + struct list_head ctrl_domains; + struct list_head mon_domains; char *name; int data_width; u32 default_ctrl; @@ -236,8 +247,10 @@ int resctrl_arch_update_one(struct rdt_resource *r, st= ruct rdt_domain *d, =20 u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d, u32 closid, enum resctrl_conf_type type); -int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d); -void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d); +int resctrl_online_ctrl_domain(struct rdt_resource *r, struct rdt_domain *= d); +int resctrl_online_mon_domain(struct rdt_resource *r, struct rdt_domain *d= ); +void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_domain= *d); +void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_domain = *d); void resctrl_online_cpu(unsigned int cpu); void resctrl_offline_cpu(unsigned int cpu); =20 diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index f1d926832ec8..377679b79919 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -558,8 +558,8 @@ void rdtgroup_kn_unlock(struct kernfs_node *kn); int rdtgroup_kn_mode_restrict(struct rdtgroup *r, const char *name); int rdtgroup_kn_mode_restore(struct rdtgroup *r, const char *name, umode_t mask); -struct rdt_domain *rdt_find_domain(struct rdt_resource *r, int id, - struct list_head **pos); +struct rdt_domain_hdr *rdt_find_domain(struct list_head *h, int id, + struct list_head **pos); ssize_t rdtgroup_schemata_write(struct kernfs_open_file *of, char *buf, size_t nbytes, loff_t off); int rdtgroup_schemata_show(struct kernfs_open_file *of, @@ -578,7 +578,8 @@ int rdt_pseudo_lock_init(void); void rdt_pseudo_lock_release(void); int rdtgroup_pseudo_lock_create(struct rdtgroup *rdtgrp); void rdtgroup_pseudo_lock_remove(struct rdtgroup *rdtgrp); -struct rdt_domain *get_domain_from_cpu(int cpu, struct rdt_resource *r); +struct rdt_domain *get_ctrl_domain_from_cpu(int cpu, struct rdt_resource *= r); +struct rdt_domain *get_mon_domain_from_cpu(int cpu, struct rdt_resource *r= ); int closids_supported(void); void closid_free(int closid); int alloc_rmid(u32 closid); diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 96fff44f9d03..edd9b2bfb53d 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -60,7 +60,8 @@ static void mba_wrmsr_intel(struct msr_param *m); static void cat_wrmsr(struct msr_param *m); static void mba_wrmsr_amd(struct msr_param *m); =20 -#define domain_init(id) LIST_HEAD_INIT(rdt_resources_all[id].r_resctrl.dom= ains) +#define ctrl_domain_init(id) LIST_HEAD_INIT(rdt_resources_all[id].r_resctr= l.ctrl_domains) +#define mon_domain_init(id) LIST_HEAD_INIT(rdt_resources_all[id].r_resctrl= .mon_domains) =20 struct rdt_hw_resource rdt_resources_all[] =3D { [RDT_RESOURCE_L3] =3D @@ -68,8 +69,10 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_L3, .name =3D "L3", - .scope =3D RESCTRL_L3_CACHE, - .domains =3D domain_init(RDT_RESOURCE_L3), + .ctrl_scope =3D RESCTRL_L3_CACHE, + .mon_scope =3D RESCTRL_L3_CACHE, + .ctrl_domains =3D ctrl_domain_init(RDT_RESOURCE_L3), + .mon_domains =3D mon_domain_init(RDT_RESOURCE_L3), .parse_ctrlval =3D parse_cbm, .format_str =3D "%d=3D%0*x", .fflags =3D RFTYPE_RES_CACHE, @@ -82,8 +85,8 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_L2, .name =3D "L2", - .scope =3D RESCTRL_L2_CACHE, - .domains =3D domain_init(RDT_RESOURCE_L2), + .ctrl_scope =3D RESCTRL_L2_CACHE, + .ctrl_domains =3D ctrl_domain_init(RDT_RESOURCE_L2), .parse_ctrlval =3D parse_cbm, .format_str =3D "%d=3D%0*x", .fflags =3D RFTYPE_RES_CACHE, @@ -96,8 +99,8 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_MBA, .name =3D "MB", - .scope =3D RESCTRL_L3_CACHE, - .domains =3D domain_init(RDT_RESOURCE_MBA), + .ctrl_scope =3D RESCTRL_L3_CACHE, + .ctrl_domains =3D ctrl_domain_init(RDT_RESOURCE_MBA), .parse_ctrlval =3D parse_bw, .format_str =3D "%d=3D%*u", .fflags =3D RFTYPE_RES_MB, @@ -108,8 +111,8 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_SMBA, .name =3D "SMBA", - .scope =3D RESCTRL_L3_CACHE, - .domains =3D domain_init(RDT_RESOURCE_SMBA), + .ctrl_scope =3D RESCTRL_L3_CACHE, + .ctrl_domains =3D ctrl_domain_init(RDT_RESOURCE_SMBA), .parse_ctrlval =3D parse_bw, .format_str =3D "%d=3D%*u", .fflags =3D RFTYPE_RES_MB, @@ -349,13 +352,28 @@ static void cat_wrmsr(struct msr_param *m) wrmsrl(hw_res->msr_base + i, hw_dom->ctrl_val[i]); } =20 -struct rdt_domain *get_domain_from_cpu(int cpu, struct rdt_resource *r) +struct rdt_domain *get_ctrl_domain_from_cpu(int cpu, struct rdt_resource *= r) { struct rdt_domain *d; =20 lockdep_assert_cpus_held(); =20 - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { + /* Find the domain that contains this CPU */ + if (cpumask_test_cpu(cpu, &d->hdr.cpu_mask)) + return d; + } + + return NULL; +} + +struct rdt_domain *get_mon_domain_from_cpu(int cpu, struct rdt_resource *r) +{ + struct rdt_domain *d; + + lockdep_assert_cpus_held(); + + list_for_each_entry(d, &r->mon_domains, hdr.list) { /* Find the domain that contains this CPU */ if (cpumask_test_cpu(cpu, &d->hdr.cpu_mask)) return d; @@ -379,26 +397,26 @@ void rdt_ctrl_update(void *arg) } =20 /* - * rdt_find_domain - Find a domain in a resource that matches input resour= ce id + * rdt_find_domain - Search for a domain id in a resource domain list. * - * Search resource r's domain list to find the resource id. If the resource - * id is found in a domain, return the domain. Otherwise, if requested by - * caller, return the first domain whose id is bigger than the input id. - * The domain list is sorted by id in ascending order. + * Search the domain list to find the domain id. If the domain id is + * found, return the domain. NULL otherwise. If the domain id is not + * found (and NULL returned) then the first domain with id bigger than + * the input id can be returned to the caller via @pos. */ -struct rdt_domain *rdt_find_domain(struct rdt_resource *r, int id, - struct list_head **pos) +struct rdt_domain_hdr *rdt_find_domain(struct list_head *h, int id, + struct list_head **pos) { - struct rdt_domain *d; + struct rdt_domain_hdr *d; struct list_head *l; =20 - list_for_each(l, &r->domains) { - d =3D list_entry(l, struct rdt_domain, hdr.list); + list_for_each(l, h) { + d =3D list_entry(l, struct rdt_domain_hdr, list); /* When id is found, return its domain. */ - if (id =3D=3D d->hdr.id) + if (id =3D=3D d->id) return d; /* Stop searching when finding id's position in sorted list. */ - if (id < d->hdr.id) + if (id < d->id) break; } =20 @@ -494,38 +512,29 @@ static int get_domain_id_from_scope(int cpu, enum res= ctrl_scope scope) return -EINVAL; } =20 -/* - * domain_add_cpu - Add a cpu to a resource's domain list. - * - * If an existing domain in the resource r's domain list matches the cpu's - * resource id, add the cpu in the domain. - * - * Otherwise, a new domain is allocated and inserted into the right positi= on - * in the domain list sorted by id in ascending order. - * - * The order in the domain list is visible to users when we print entries - * in the schemata file and schemata input is validated to have the same o= rder - * as this list. - */ -static void domain_add_cpu(int cpu, struct rdt_resource *r) +static void domain_add_cpu_ctrl(int cpu, struct rdt_resource *r) { - int id =3D get_domain_id_from_scope(cpu, r->scope); + int id =3D get_domain_id_from_scope(cpu, r->ctrl_scope); struct list_head *add_pos =3D NULL; struct rdt_hw_domain *hw_dom; + struct rdt_domain_hdr *hdr; struct rdt_domain *d; int err; =20 lockdep_assert_held(&domain_list_lock); =20 if (id < 0) { - pr_warn_once("Can't find domain id for CPU:%d scope:%d for resource %s\n= ", - cpu, r->scope, r->name); + pr_warn_once("Can't find control domain id for CPU:%d scope:%d for resou= rce %s\n", + cpu, r->ctrl_scope, r->name); return; } =20 - d =3D rdt_find_domain(r, id, &add_pos); + hdr =3D rdt_find_domain(&r->ctrl_domains, id, &add_pos); + if (hdr) { + if (WARN_ON_ONCE(hdr->type !=3D RESCTRL_CTRL_DOMAIN)) + return; + d =3D container_of(hdr, struct rdt_domain, hdr); =20 - if (d) { cpumask_set_cpu(cpu, &d->hdr.cpu_mask); if (r->cache.arch_has_per_cpu_cfg) rdt_domain_reconfigure_cdp(r); @@ -538,23 +547,70 @@ static void domain_add_cpu(int cpu, struct rdt_resour= ce *r) =20 d =3D &hw_dom->d_resctrl; d->hdr.id =3D id; + d->hdr.type =3D RESCTRL_CTRL_DOMAIN; cpumask_set_cpu(cpu, &d->hdr.cpu_mask); =20 rdt_domain_reconfigure_cdp(r); =20 - if (r->alloc_capable && domain_setup_ctrlval(r, d)) { + if (domain_setup_ctrlval(r, d)) { domain_free(hw_dom); return; } =20 - if (r->mon_capable && arch_domain_mbm_alloc(r->num_rmid, hw_dom)) { + list_add_tail_rcu(&d->hdr.list, add_pos); + + err =3D resctrl_online_ctrl_domain(r, d); + if (err) { + list_del_rcu(&d->hdr.list); + synchronize_rcu(); + domain_free(hw_dom); + } +} + +static void domain_add_cpu_mon(int cpu, struct rdt_resource *r) +{ + int id =3D get_domain_id_from_scope(cpu, r->mon_scope); + struct list_head *add_pos =3D NULL; + struct rdt_hw_domain *hw_dom; + struct rdt_domain_hdr *hdr; + struct rdt_domain *d; + int err; + + lockdep_assert_held(&domain_list_lock); + + if (id < 0) { + pr_warn_once("Can't find monitor domain id for CPU:%d scope:%d for resou= rce %s\n", + cpu, r->mon_scope, r->name); + return; + } + + hdr =3D rdt_find_domain(&r->mon_domains, id, &add_pos); + if (hdr) { + if (WARN_ON_ONCE(hdr->type !=3D RESCTRL_MON_DOMAIN)) + return; + d =3D container_of(hdr, struct rdt_domain, hdr); + + cpumask_set_cpu(cpu, &d->hdr.cpu_mask); + return; + } + + hw_dom =3D kzalloc_node(sizeof(*hw_dom), GFP_KERNEL, cpu_to_node(cpu)); + if (!hw_dom) + return; + + d =3D &hw_dom->d_resctrl; + d->hdr.id =3D id; + d->hdr.type =3D RESCTRL_MON_DOMAIN; + cpumask_set_cpu(cpu, &d->hdr.cpu_mask); + + if (arch_domain_mbm_alloc(r->num_rmid, hw_dom)) { domain_free(hw_dom); return; } =20 list_add_tail_rcu(&d->hdr.list, add_pos); =20 - err =3D resctrl_online_domain(r, d); + err =3D resctrl_online_mon_domain(r, d); if (err) { list_del_rcu(&d->hdr.list); synchronize_rcu(); @@ -562,30 +618,45 @@ static void domain_add_cpu(int cpu, struct rdt_resour= ce *r) } } =20 -static void domain_remove_cpu(int cpu, struct rdt_resource *r) +static void domain_add_cpu(int cpu, struct rdt_resource *r) +{ + if (r->alloc_capable) + domain_add_cpu_ctrl(cpu, r); + if (r->mon_capable) + domain_add_cpu_mon(cpu, r); +} + +static void domain_remove_cpu_ctrl(int cpu, struct rdt_resource *r) { - int id =3D get_domain_id_from_scope(cpu, r->scope); + int id =3D get_domain_id_from_scope(cpu, r->ctrl_scope); struct rdt_hw_domain *hw_dom; + struct rdt_domain_hdr *hdr; struct rdt_domain *d; =20 lockdep_assert_held(&domain_list_lock); =20 if (id < 0) { - pr_warn_once("Can't find domain id for CPU:%d scope:%d for resource %s\n= ", - cpu, r->scope, r->name); + pr_warn_once("Can't find control domain id for CPU:%d scope:%d for resou= rce %s\n", + cpu, r->ctrl_scope, r->name); return; } =20 - d =3D rdt_find_domain(r, id, NULL); - if (!d) { - pr_warn("Couldn't find domain with id=3D%d for CPU %d\n", id, cpu); + hdr =3D rdt_find_domain(&r->ctrl_domains, id, NULL); + if (!hdr) { + pr_warn("Can't find control domain for id=3D%d for CPU %d for resource %= s\n", + id, cpu, r->name); return; } + + if (WARN_ON_ONCE(hdr->type !=3D RESCTRL_CTRL_DOMAIN)) + return; + + d =3D container_of(hdr, struct rdt_domain, hdr); hw_dom =3D resctrl_to_arch_dom(d); =20 cpumask_clear_cpu(cpu, &d->hdr.cpu_mask); if (cpumask_empty(&d->hdr.cpu_mask)) { - resctrl_offline_domain(r, d); + resctrl_offline_ctrl_domain(r, d); list_del_rcu(&d->hdr.list); synchronize_rcu(); =20 @@ -601,6 +672,53 @@ static void domain_remove_cpu(int cpu, struct rdt_reso= urce *r) } } =20 +static void domain_remove_cpu_mon(int cpu, struct rdt_resource *r) +{ + int id =3D get_domain_id_from_scope(cpu, r->mon_scope); + struct rdt_hw_domain *hw_dom; + struct rdt_domain_hdr *hdr; + struct rdt_domain *d; + + lockdep_assert_held(&domain_list_lock); + + if (id < 0) { + pr_warn_once("Can't find monitor domain id for CPU:%d scope:%d for resou= rce %s\n", + cpu, r->mon_scope, r->name); + return; + } + + hdr =3D rdt_find_domain(&r->mon_domains, id, NULL); + if (!hdr) { + pr_warn("Can't find monitor domain for id=3D%d for CPU %d for resource %= s\n", + id, cpu, r->name); + return; + } + + if (WARN_ON_ONCE(hdr->type !=3D RESCTRL_MON_DOMAIN)) + return; + + d =3D container_of(hdr, struct rdt_domain, hdr); + hw_dom =3D resctrl_to_arch_dom(d); + + cpumask_clear_cpu(cpu, &d->hdr.cpu_mask); + if (cpumask_empty(&d->hdr.cpu_mask)) { + resctrl_offline_mon_domain(r, d); + list_del_rcu(&d->hdr.list); + synchronize_rcu(); + domain_free(hw_dom); + + return; + } +} + +static void domain_remove_cpu(int cpu, struct rdt_resource *r) +{ + if (r->alloc_capable) + domain_remove_cpu_ctrl(cpu, r); + if (r->mon_capable) + domain_remove_cpu_mon(cpu, r); +} + static void clear_closid_rmid(int cpu) { struct resctrl_pqr_state *state =3D this_cpu_ptr(&pqr_state); diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index 6246f48b0449..8cc36723f077 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -231,7 +231,7 @@ static int parse_line(char *line, struct resctrl_schema= *s, return -EINVAL; } dom =3D strim(dom); - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { if (d->hdr.id =3D=3D dom_id) { data.buf =3D dom; data.rdtgrp =3D rdtgrp; @@ -306,7 +306,7 @@ int resctrl_arch_update_domains(struct rdt_resource *r,= u32 closid) /* Walking r->domains, ensure it can't race with cpuhp */ lockdep_assert_cpus_held(); =20 - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { hw_dom =3D resctrl_to_arch_dom(d); msr_param.res =3D NULL; for (t =3D 0; t < CDP_NUM_TYPES; t++) { @@ -450,7 +450,7 @@ static void show_doms(struct seq_file *s, struct resctr= l_schema *schema, int clo lockdep_assert_cpus_held(); =20 seq_printf(s, "%*s:", max_name_width, schema->name); - list_for_each_entry(dom, &r->domains, hdr.list) { + list_for_each_entry(dom, &r->ctrl_domains, hdr.list) { if (sep) seq_puts(s, ";"); =20 @@ -556,6 +556,7 @@ void mon_event_read(struct rmid_read *rr, struct rdt_re= source *r, int rdtgroup_mondata_show(struct seq_file *m, void *arg) { struct kernfs_open_file *of =3D m->private; + struct rdt_domain_hdr *hdr; u32 resid, evtid, domid; struct rdtgroup *rdtgrp; struct rdt_resource *r; @@ -576,11 +577,12 @@ int rdtgroup_mondata_show(struct seq_file *m, void *a= rg) evtid =3D md.u.evtid; =20 r =3D &rdt_resources_all[resid].r_resctrl; - d =3D rdt_find_domain(r, domid, NULL); - if (!d) { + hdr =3D rdt_find_domain(&r->mon_domains, domid, NULL); + if (!hdr || WARN_ON_ONCE(hdr->type !=3D RESCTRL_MON_DOMAIN)) { ret =3D -ENOENT; goto out; } + d =3D container_of(hdr, struct rdt_domain, hdr); =20 mon_event_read(&rr, r, d, rdtgrp, evtid, false); =20 diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index ab8a198d88b3..82a44de8136f 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -490,7 +490,7 @@ static void add_rmid_to_limbo(struct rmid_entry *entry) idx =3D resctrl_arch_rmid_idx_encode(entry->closid, entry->rmid); =20 entry->busy =3D 0; - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->mon_domains, hdr.list) { /* * For the first limbo RMID in the domain, * setup up the limbo worker. @@ -687,7 +687,7 @@ static void update_mba_bw(struct rdtgroup *rgrp, struct= rdt_domain *dom_mbm) idx =3D resctrl_arch_rmid_idx_encode(closid, rmid); pmbm_data =3D &dom_mbm->mbm_local[idx]; =20 - dom_mba =3D get_domain_from_cpu(smp_processor_id(), r_mba); + dom_mba =3D get_ctrl_domain_from_cpu(smp_processor_id(), r_mba); if (!dom_mba) { pr_warn_once("Failure to get domain for MBA update\n"); return; diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index 36d943cb847a..58985ffcf74e 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -292,7 +292,7 @@ static void pseudo_lock_region_clear(struct pseudo_lock= _region *plr) */ static int pseudo_lock_region_init(struct pseudo_lock_region *plr) { - enum resctrl_scope scope =3D plr->s->res->scope; + enum resctrl_scope scope =3D plr->s->res->ctrl_scope; struct cpu_cacheinfo *ci; int ret; int i; @@ -859,7 +859,7 @@ bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_dom= ain *d) * associated with them. */ for_each_alloc_capable_rdt_resource(r) { - list_for_each_entry(d_i, &r->domains, hdr.list) { + list_for_each_entry(d_i, &r->ctrl_domains, hdr.list) { if (d_i->plr) cpumask_or(cpu_with_psl, cpu_with_psl, &d_i->hdr.cpu_mask); diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index e6e2753738c9..7c1475f393ff 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -98,7 +98,7 @@ void rdt_staged_configs_clear(void) lockdep_assert_held(&rdtgroup_mutex); =20 for_each_alloc_capable_rdt_resource(r) { - list_for_each_entry(dom, &r->domains, hdr.list) + list_for_each_entry(dom, &r->ctrl_domains, hdr.list) memset(dom->staged_config, 0, sizeof(dom->staged_config)); } } @@ -1021,7 +1021,7 @@ static int rdt_bit_usage_show(struct kernfs_open_file= *of, cpus_read_lock(); mutex_lock(&rdtgroup_mutex); hw_shareable =3D r->cache.shareable_bits; - list_for_each_entry(dom, &r->domains, hdr.list) { + list_for_each_entry(dom, &r->ctrl_domains, hdr.list) { if (sep) seq_putc(seq, ';'); sw_shareable =3D 0; @@ -1343,7 +1343,7 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgr= oup *rdtgrp) if (r->rid =3D=3D RDT_RESOURCE_MBA || r->rid =3D=3D RDT_RESOURCE_SMBA) continue; has_cache =3D true; - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { ctrl =3D resctrl_arch_get_config(r, d, closid, s->conf_type); if (rdtgroup_cbm_overlaps(s, d, ctrl, closid, false)) { @@ -1454,13 +1454,13 @@ unsigned int rdtgroup_cbm_to_size(struct rdt_resour= ce *r, unsigned int size =3D 0; int num_b, i; =20 - if (WARN_ON_ONCE(r->scope !=3D RESCTRL_L2_CACHE && r->scope !=3D RESCTRL_= L3_CACHE)) + if (WARN_ON_ONCE(r->ctrl_scope !=3D RESCTRL_L2_CACHE && r->ctrl_scope != =3D RESCTRL_L3_CACHE)) return size; =20 num_b =3D bitmap_weight(&cbm, r->cache.cbm_len); ci =3D get_cpu_cacheinfo(cpumask_any(&d->hdr.cpu_mask)); for (i =3D 0; i < ci->num_leaves; i++) { - if (ci->info_list[i].level =3D=3D r->scope) { + if (ci->info_list[i].level =3D=3D r->ctrl_scope) { size =3D ci->info_list[i].size / r->cache.cbm_len * num_b; break; } @@ -1518,7 +1518,7 @@ static int rdtgroup_size_show(struct kernfs_open_file= *of, type =3D schema->conf_type; sep =3D false; seq_printf(s, "%*s:", max_name_width, schema->name); - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { if (sep) seq_putc(s, ';'); if (rdtgrp->mode =3D=3D RDT_MODE_PSEUDO_LOCKSETUP) { @@ -1608,7 +1608,7 @@ static int mbm_config_show(struct seq_file *s, struct= rdt_resource *r, u32 evtid cpus_read_lock(); mutex_lock(&rdtgroup_mutex); =20 - list_for_each_entry(dom, &r->domains, hdr.list) { + list_for_each_entry(dom, &r->mon_domains, hdr.list) { if (sep) seq_puts(s, ";"); =20 @@ -1732,7 +1732,7 @@ static int mon_config_write(struct rdt_resource *r, c= har *tok, u32 evtid) return -EINVAL; } =20 - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->mon_domains, hdr.list) { if (d->hdr.id =3D=3D dom_id) { mbm_config_write_domain(r, d, evtid, val); goto next; @@ -2280,7 +2280,7 @@ static int set_cache_qos_cfg(int level, bool enable) return -ENOMEM; =20 r_l =3D &rdt_resources_all[level].r_resctrl; - list_for_each_entry(d, &r_l->domains, hdr.list) { + list_for_each_entry(d, &r_l->ctrl_domains, hdr.list) { if (r_l->cache.arch_has_per_cpu_cfg) /* Pick all the CPUs in the domain instance */ for_each_cpu(cpu, &d->hdr.cpu_mask) @@ -2365,7 +2365,7 @@ static int set_mba_sc(bool mba_sc) =20 r->membw.mba_sc =3D mba_sc; =20 - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { for (i =3D 0; i < num_closid; i++) d->mbps_val[i] =3D MBA_MAX_MBPS; } @@ -2704,7 +2704,7 @@ static int rdt_get_tree(struct fs_context *fc) =20 if (is_mbm_enabled()) { r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; - list_for_each_entry(dom, &r->domains, hdr.list) + list_for_each_entry(dom, &r->mon_domains, hdr.list) mbm_setup_overflow_handler(dom, MBM_OVERFLOW_INTERVAL, RESCTRL_PICK_ANY_CPU); } @@ -2828,10 +2828,10 @@ static int reset_all_ctrls(struct rdt_resource *r) =20 /* * Disable resource control for this resource by setting all - * CBMs in all domains to the maximum mask value. Pick one CPU + * CBMs in all ctrl_domains to the maximum mask value. Pick one CPU * from each domain to update the MSRs below. */ - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { hw_dom =3D resctrl_to_arch_dom(d); =20 for (i =3D 0; i < hw_res->num_closid; i++) @@ -3102,7 +3102,7 @@ static int mkdir_mondata_subdir_alldom(struct kernfs_= node *parent_kn, /* Walking r->domains, ensure it can't race with cpuhp */ lockdep_assert_cpus_held(); =20 - list_for_each_entry(dom, &r->domains, hdr.list) { + list_for_each_entry(dom, &r->mon_domains, hdr.list) { ret =3D mkdir_mondata_subdir(parent_kn, dom, r, prgrp); if (ret) return ret; @@ -3284,7 +3284,7 @@ static int rdtgroup_init_cat(struct resctrl_schema *s= , u32 closid) struct rdt_domain *d; int ret; =20 - list_for_each_entry(d, &s->res->domains, hdr.list) { + list_for_each_entry(d, &s->res->ctrl_domains, hdr.list) { ret =3D __init_one_rdt_domain(d, s, closid); if (ret < 0) return ret; @@ -3299,7 +3299,7 @@ static void rdtgroup_init_mba(struct rdt_resource *r,= u32 closid) struct resctrl_staged_config *cfg; struct rdt_domain *d; =20 - list_for_each_entry(d, &r->domains, hdr.list) { + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { if (is_mba_sc(r)) { d->mbps_val[closid] =3D MBA_MAX_MBPS; continue; @@ -3930,15 +3930,19 @@ static void domain_destroy_mon_state(struct rdt_dom= ain *d) kfree(d->mbm_local); } =20 -void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d) +void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_domain= *d) { mutex_lock(&rdtgroup_mutex); =20 if (supports_mba_mbps() && r->rid =3D=3D RDT_RESOURCE_MBA) mba_sc_domain_destroy(r, d); =20 - if (!r->mon_capable) - goto out_unlock; + mutex_unlock(&rdtgroup_mutex); +} + +void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_domain = *d) +{ + mutex_lock(&rdtgroup_mutex); =20 /* * If resctrl is mounted, remove all the @@ -3964,7 +3968,6 @@ void resctrl_offline_domain(struct rdt_resource *r, s= truct rdt_domain *d) =20 domain_destroy_mon_state(d); =20 -out_unlock: mutex_unlock(&rdtgroup_mutex); } =20 @@ -3999,7 +4002,7 @@ static int domain_setup_mon_state(struct rdt_resource= *r, struct rdt_domain *d) return 0; } =20 -int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d) +int resctrl_online_ctrl_domain(struct rdt_resource *r, struct rdt_domain *= d) { int err =3D 0; =20 @@ -4008,11 +4011,18 @@ int resctrl_online_domain(struct rdt_resource *r, s= truct rdt_domain *d) if (supports_mba_mbps() && r->rid =3D=3D RDT_RESOURCE_MBA) { /* RDT_RESOURCE_MBA is never mon_capable */ err =3D mba_sc_domain_allocate(r, d); - goto out_unlock; } =20 - if (!r->mon_capable) - goto out_unlock; + mutex_unlock(&rdtgroup_mutex); + + return err; +} + +int resctrl_online_mon_domain(struct rdt_resource *r, struct rdt_domain *d) +{ + int err; + + mutex_lock(&rdtgroup_mutex); =20 err =3D domain_setup_mon_state(r, d); if (err) @@ -4077,7 +4087,7 @@ void resctrl_offline_cpu(unsigned int cpu) if (!l3->mon_capable) goto out_unlock; =20 - d =3D get_domain_from_cpu(cpu, l3); + d =3D get_mon_domain_from_cpu(cpu, l3); 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28 May 2024 15:20:15 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 04/20] x86/resctrl: Split the rdt_domain and rdt_hw_domain structures Date: Tue, 28 May 2024 15:19:49 -0700 Message-ID: <20240528222006.58283-5-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The same rdt_domain structure is used for both control and monitor functions. But this results in wasted memory as some of the fields are only used by control functions, while most are only used for monitor functions. Split into separate rdt_ctrl_domain and rdt_mon_domain structures with just the fields required for control and monitoring respectively. Similar split of the rdt_hw_domain structure into rdt_hw_ctrl_domain and rdt_hw_mon_domain. Signed-off-by: Tony Luck --- include/linux/resctrl.h | 48 ++++++++------- arch/x86/kernel/cpu/resctrl/internal.h | 62 ++++++++++++-------- arch/x86/kernel/cpu/resctrl/core.c | 71 ++++++++++++----------- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 28 ++++----- arch/x86/kernel/cpu/resctrl/monitor.c | 40 ++++++------- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 6 +- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 64 ++++++++++---------- 7 files changed, 174 insertions(+), 145 deletions(-) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 96ddf9ff3183..aa2c22a8e37b 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -78,7 +78,23 @@ struct rdt_domain_hdr { }; =20 /** - * struct rdt_domain - group of CPUs sharing a resctrl resource + * struct rdt_ctrl_domain - group of CPUs sharing a resctrl control resour= ce + * @hdr: common header for different domain types + * @plr: pseudo-locked region (if any) associated with domain + * @staged_config: parsed configuration to be applied + * @mbps_val: When mba_sc is enabled, this holds the array of user + * specified control values for mba_sc in MBps, indexed + * by closid + */ +struct rdt_ctrl_domain { + struct rdt_domain_hdr hdr; + struct pseudo_lock_region *plr; + struct resctrl_staged_config staged_config[CDP_NUM_TYPES]; + u32 *mbps_val; +}; + +/** + * struct rdt_mon_domain - group of CPUs sharing a resctrl monitor resource * @hdr: common header for different domain types * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold * @mbm_total: saved state for MBM total bandwidth @@ -87,13 +103,8 @@ struct rdt_domain_hdr { * @cqm_limbo: worker to periodically read CQM h/w counters * @mbm_work_cpu: worker CPU for MBM h/w counters * @cqm_work_cpu: worker CPU for CQM h/w counters - * @plr: pseudo-locked region (if any) associated with domain - * @staged_config: parsed configuration to be applied - * @mbps_val: When mba_sc is enabled, this holds the array of user - * specified control values for mba_sc in MBps, indexed - * by closid */ -struct rdt_domain { +struct rdt_mon_domain { struct rdt_domain_hdr hdr; unsigned long *rmid_busy_llc; struct mbm_state *mbm_total; @@ -102,9 +113,6 @@ struct rdt_domain { struct delayed_work cqm_limbo; int mbm_work_cpu; int cqm_work_cpu; - struct pseudo_lock_region *plr; - struct resctrl_staged_config staged_config[CDP_NUM_TYPES]; - u32 *mbps_val; }; =20 /** @@ -208,7 +216,7 @@ struct rdt_resource { const char *format_str; int (*parse_ctrlval)(struct rdt_parse_data *data, struct resctrl_schema *s, - struct rdt_domain *d); + struct rdt_ctrl_domain *d); struct list_head evt_list; unsigned long fflags; bool cdp_capable; @@ -242,15 +250,15 @@ int resctrl_arch_update_domains(struct rdt_resource *= r, u32 closid); * Update the ctrl_val and apply this config right now. * Must be called on one of the domain's CPUs. */ -int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d, +int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain= *d, u32 closid, enum resctrl_conf_type t, u32 cfg_val); =20 -u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d, +u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain= *d, u32 closid, enum resctrl_conf_type type); -int resctrl_online_ctrl_domain(struct rdt_resource *r, struct rdt_domain *= d); -int resctrl_online_mon_domain(struct rdt_resource *r, struct rdt_domain *d= ); -void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_domain= *d); -void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_domain = *d); +int resctrl_online_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_dom= ain *d); +int resctrl_online_mon_domain(struct rdt_resource *r, struct rdt_mon_domai= n *d); +void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_d= omain *d); +void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_mon_dom= ain *d); void resctrl_online_cpu(unsigned int cpu); void resctrl_offline_cpu(unsigned int cpu); =20 @@ -279,7 +287,7 @@ void resctrl_offline_cpu(unsigned int cpu); * Return: * 0 on success, or -EIO, -EINVAL etc on error. */ -int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d, +int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *= d, u32 closid, u32 rmid, enum resctrl_event_id eventid, u64 *val, void *arch_mon_ctx); =20 @@ -312,7 +320,7 @@ static inline void resctrl_arch_rmid_read_context_check= (void) * * This can be called from any CPU. */ -void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d, +void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_mon_domain= *d, u32 closid, u32 rmid, enum resctrl_event_id eventid); =20 @@ -325,7 +333,7 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, st= ruct rdt_domain *d, * * This can be called from any CPU. */ -void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain= *d); +void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_mon_do= main *d); =20 extern unsigned int resctrl_rmid_realloc_threshold; extern unsigned int resctrl_rmid_realloc_limit; diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index 377679b79919..135190e0711c 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -147,7 +147,7 @@ union mon_data_bits { struct rmid_read { struct rdtgroup *rgrp; struct rdt_resource *r; - struct rdt_domain *d; + struct rdt_mon_domain *d; enum resctrl_event_id evtid; bool first; int err; @@ -232,7 +232,7 @@ struct mongroup { */ struct pseudo_lock_region { struct resctrl_schema *s; - struct rdt_domain *d; + struct rdt_ctrl_domain *d; u32 cbm; wait_queue_head_t lock_thread_wq; int thread_done; @@ -355,25 +355,41 @@ struct arch_mbm_state { }; =20 /** - * struct rdt_hw_domain - Arch private attributes of a set of CPUs that sh= are - * a resource + * struct rdt_hw_ctrl_domain - Arch private attributes of a set of CPUs th= at share + * a resource for a control function * @d_resctrl: Properties exposed to the resctrl file system * @ctrl_val: array of cache or mem ctrl values (indexed by CLOSID) + * + * Members of this structure are accessed via helpers that provide abstrac= tion. + */ +struct rdt_hw_ctrl_domain { + struct rdt_ctrl_domain d_resctrl; + u32 *ctrl_val; +}; + +/** + * struct rdt_hw_mon_domain - Arch private attributes of a set of CPUs tha= t share + * a resource for a monitor function + * @d_resctrl: Properties exposed to the resctrl file system * @arch_mbm_total: arch private state for MBM total bandwidth * @arch_mbm_local: arch private state for MBM local bandwidth * * Members of this structure are accessed via helpers that provide abstrac= tion. */ -struct rdt_hw_domain { - struct rdt_domain d_resctrl; - u32 *ctrl_val; +struct rdt_hw_mon_domain { + struct rdt_mon_domain d_resctrl; struct arch_mbm_state *arch_mbm_total; struct arch_mbm_state *arch_mbm_local; }; =20 -static inline struct rdt_hw_domain *resctrl_to_arch_dom(struct rdt_domain = *r) +static inline struct rdt_hw_ctrl_domain *resctrl_to_arch_ctrl_dom(struct r= dt_ctrl_domain *r) +{ + return container_of(r, struct rdt_hw_ctrl_domain, d_resctrl); +} + +static inline struct rdt_hw_mon_domain *resctrl_to_arch_mon_dom(struct rdt= _mon_domain *r) { - return container_of(r, struct rdt_hw_domain, d_resctrl); + return container_of(r, struct rdt_hw_mon_domain, d_resctrl); } =20 /** @@ -385,7 +401,7 @@ static inline struct rdt_hw_domain *resctrl_to_arch_dom= (struct rdt_domain *r) */ struct msr_param { struct rdt_resource *res; - struct rdt_domain *dom; + struct rdt_ctrl_domain *dom; u32 low; u32 high; }; @@ -458,9 +474,9 @@ static inline struct rdt_hw_resource *resctrl_to_arch_r= es(struct rdt_resource *r } =20 int parse_cbm(struct rdt_parse_data *data, struct resctrl_schema *s, - struct rdt_domain *d); + struct rdt_ctrl_domain *d); int parse_bw(struct rdt_parse_data *data, struct resctrl_schema *s, - struct rdt_domain *d); + struct rdt_ctrl_domain *d); =20 extern struct mutex rdtgroup_mutex; =20 @@ -564,22 +580,22 @@ ssize_t rdtgroup_schemata_write(struct kernfs_open_fi= le *of, char *buf, size_t nbytes, loff_t off); int rdtgroup_schemata_show(struct kernfs_open_file *of, struct seq_file *s, void *v); -bool rdtgroup_cbm_overlaps(struct resctrl_schema *s, struct rdt_domain *d, +bool rdtgroup_cbm_overlaps(struct resctrl_schema *s, struct rdt_ctrl_domai= n *d, unsigned long cbm, int closid, bool exclusive); -unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r, struct rdt_domai= n *d, +unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r, struct rdt_ctrl_= domain *d, unsigned long cbm); enum rdtgrp_mode rdtgroup_mode_by_closid(int closid); int rdtgroup_tasks_assigned(struct rdtgroup *r); int rdtgroup_locksetup_enter(struct rdtgroup *rdtgrp); int rdtgroup_locksetup_exit(struct rdtgroup *rdtgrp); -bool rdtgroup_cbm_overlaps_pseudo_locked(struct rdt_domain *d, unsigned lo= ng cbm); -bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_domain *d); +bool rdtgroup_cbm_overlaps_pseudo_locked(struct rdt_ctrl_domain *d, unsign= ed long cbm); +bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_ctrl_domain *d); int rdt_pseudo_lock_init(void); void rdt_pseudo_lock_release(void); int rdtgroup_pseudo_lock_create(struct rdtgroup *rdtgrp); void rdtgroup_pseudo_lock_remove(struct rdtgroup *rdtgrp); -struct rdt_domain *get_ctrl_domain_from_cpu(int cpu, struct rdt_resource *= r); -struct rdt_domain *get_mon_domain_from_cpu(int cpu, struct rdt_resource *r= ); +struct rdt_ctrl_domain *get_ctrl_domain_from_cpu(int cpu, struct rdt_resou= rce *r); +struct rdt_mon_domain *get_mon_domain_from_cpu(int cpu, struct rdt_resourc= e *r); int closids_supported(void); void closid_free(int closid); int alloc_rmid(u32 closid); @@ -590,19 +606,19 @@ bool __init rdt_cpu_has(int flag); void mon_event_count(void *info); int rdtgroup_mondata_show(struct seq_file *m, void *arg); void mon_event_read(struct rmid_read *rr, struct rdt_resource *r, - struct rdt_domain *d, struct rdtgroup *rdtgrp, + struct rdt_mon_domain *d, struct rdtgroup *rdtgrp, int evtid, int first); -void mbm_setup_overflow_handler(struct rdt_domain *dom, +void mbm_setup_overflow_handler(struct rdt_mon_domain *dom, unsigned long delay_ms, int exclude_cpu); void mbm_handle_overflow(struct work_struct *work); void __init intel_rdt_mbm_apply_quirk(void); bool is_mba_sc(struct rdt_resource *r); -void cqm_setup_limbo_handler(struct rdt_domain *dom, unsigned long delay_m= s, +void cqm_setup_limbo_handler(struct rdt_mon_domain *dom, unsigned long del= ay_ms, int exclude_cpu); void cqm_handle_limbo(struct work_struct *work); -bool has_busy_rmid(struct rdt_domain *d); -void __check_limbo(struct rdt_domain *d, bool force_free); +bool has_busy_rmid(struct rdt_mon_domain *d); +void __check_limbo(struct rdt_mon_domain *d, bool force_free); void rdt_domain_reconfigure_cdp(struct rdt_resource *r); void __init thread_throttle_mode_init(void); void __init mbm_config_rftype_init(const char *config); diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index edd9b2bfb53d..b4f2be776408 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -309,8 +309,8 @@ static void rdt_get_cdp_l2_config(void) =20 static void mba_wrmsr_amd(struct msr_param *m) { + struct rdt_hw_ctrl_domain *hw_dom =3D resctrl_to_arch_ctrl_dom(m->dom); struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(m->res); - struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(m->dom); unsigned int i; =20 for (i =3D m->low; i < m->high; i++) @@ -333,8 +333,8 @@ static u32 delay_bw_map(unsigned long bw, struct rdt_re= source *r) =20 static void mba_wrmsr_intel(struct msr_param *m) { + struct rdt_hw_ctrl_domain *hw_dom =3D resctrl_to_arch_ctrl_dom(m->dom); struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(m->res); - struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(m->dom); unsigned int i; =20 /* Write the delay values for mba. */ @@ -344,17 +344,17 @@ static void mba_wrmsr_intel(struct msr_param *m) =20 static void cat_wrmsr(struct msr_param *m) { + struct rdt_hw_ctrl_domain *hw_dom =3D resctrl_to_arch_ctrl_dom(m->dom); struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(m->res); - struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(m->dom); unsigned int i; =20 for (i =3D m->low; i < m->high; i++) wrmsrl(hw_res->msr_base + i, hw_dom->ctrl_val[i]); } =20 -struct rdt_domain *get_ctrl_domain_from_cpu(int cpu, struct rdt_resource *= r) +struct rdt_ctrl_domain *get_ctrl_domain_from_cpu(int cpu, struct rdt_resou= rce *r) { - struct rdt_domain *d; + struct rdt_ctrl_domain *d; =20 lockdep_assert_cpus_held(); =20 @@ -367,9 +367,9 @@ struct rdt_domain *get_ctrl_domain_from_cpu(int cpu, st= ruct rdt_resource *r) return NULL; } =20 -struct rdt_domain *get_mon_domain_from_cpu(int cpu, struct rdt_resource *r) +struct rdt_mon_domain *get_mon_domain_from_cpu(int cpu, struct rdt_resourc= e *r) { - struct rdt_domain *d; + struct rdt_mon_domain *d; =20 lockdep_assert_cpus_held(); =20 @@ -440,18 +440,23 @@ static void setup_default_ctrlval(struct rdt_resource= *r, u32 *dc) *dc =3D r->default_ctrl; } =20 -static void domain_free(struct rdt_hw_domain *hw_dom) +static void ctrl_domain_free(struct rdt_hw_ctrl_domain *hw_dom) +{ + kfree(hw_dom->ctrl_val); + kfree(hw_dom); +} + +static void mon_domain_free(struct rdt_hw_mon_domain *hw_dom) { kfree(hw_dom->arch_mbm_total); kfree(hw_dom->arch_mbm_local); - kfree(hw_dom->ctrl_val); kfree(hw_dom); } =20 -static int domain_setup_ctrlval(struct rdt_resource *r, struct rdt_domain = *d) +static int domain_setup_ctrlval(struct rdt_resource *r, struct rdt_ctrl_do= main *d) { + struct rdt_hw_ctrl_domain *hw_dom =3D resctrl_to_arch_ctrl_dom(d); struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); - struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); struct msr_param m; u32 *dc; =20 @@ -476,7 +481,7 @@ static int domain_setup_ctrlval(struct rdt_resource *r,= struct rdt_domain *d) * @num_rmid: The size of the MBM counter array * @hw_dom: The domain that owns the allocated arrays */ -static int arch_domain_mbm_alloc(u32 num_rmid, struct rdt_hw_domain *hw_do= m) +static int arch_domain_mbm_alloc(u32 num_rmid, struct rdt_hw_mon_domain *h= w_dom) { size_t tsize; =20 @@ -515,10 +520,10 @@ static int get_domain_id_from_scope(int cpu, enum res= ctrl_scope scope) static void domain_add_cpu_ctrl(int cpu, struct rdt_resource *r) { int id =3D get_domain_id_from_scope(cpu, r->ctrl_scope); + struct rdt_hw_ctrl_domain *hw_dom; struct list_head *add_pos =3D NULL; - struct rdt_hw_domain *hw_dom; struct rdt_domain_hdr *hdr; - struct rdt_domain *d; + struct rdt_ctrl_domain *d; int err; =20 lockdep_assert_held(&domain_list_lock); @@ -533,7 +538,7 @@ static void domain_add_cpu_ctrl(int cpu, struct rdt_res= ource *r) if (hdr) { if (WARN_ON_ONCE(hdr->type !=3D RESCTRL_CTRL_DOMAIN)) return; - d =3D container_of(hdr, struct rdt_domain, hdr); + d =3D container_of(hdr, struct rdt_ctrl_domain, hdr); =20 cpumask_set_cpu(cpu, &d->hdr.cpu_mask); if (r->cache.arch_has_per_cpu_cfg) @@ -553,7 +558,7 @@ static void domain_add_cpu_ctrl(int cpu, struct rdt_res= ource *r) rdt_domain_reconfigure_cdp(r); =20 if (domain_setup_ctrlval(r, d)) { - domain_free(hw_dom); + ctrl_domain_free(hw_dom); return; } =20 @@ -563,7 +568,7 @@ static void domain_add_cpu_ctrl(int cpu, struct rdt_res= ource *r) if (err) { list_del_rcu(&d->hdr.list); synchronize_rcu(); - domain_free(hw_dom); + ctrl_domain_free(hw_dom); } } =20 @@ -571,9 +576,9 @@ static void domain_add_cpu_mon(int cpu, struct rdt_reso= urce *r) { int id =3D get_domain_id_from_scope(cpu, r->mon_scope); struct list_head *add_pos =3D NULL; - struct rdt_hw_domain *hw_dom; + struct rdt_hw_mon_domain *hw_dom; struct rdt_domain_hdr *hdr; - struct rdt_domain *d; + struct rdt_mon_domain *d; int err; =20 lockdep_assert_held(&domain_list_lock); @@ -588,7 +593,7 @@ static void domain_add_cpu_mon(int cpu, struct rdt_reso= urce *r) if (hdr) { if (WARN_ON_ONCE(hdr->type !=3D RESCTRL_MON_DOMAIN)) return; - d =3D container_of(hdr, struct rdt_domain, hdr); + d =3D container_of(hdr, struct rdt_mon_domain, hdr); =20 cpumask_set_cpu(cpu, &d->hdr.cpu_mask); return; @@ -604,7 +609,7 @@ static void domain_add_cpu_mon(int cpu, struct rdt_reso= urce *r) cpumask_set_cpu(cpu, &d->hdr.cpu_mask); =20 if (arch_domain_mbm_alloc(r->num_rmid, hw_dom)) { - domain_free(hw_dom); + mon_domain_free(hw_dom); return; } =20 @@ -614,7 +619,7 @@ static void domain_add_cpu_mon(int cpu, struct rdt_reso= urce *r) if (err) { list_del_rcu(&d->hdr.list); synchronize_rcu(); - domain_free(hw_dom); + mon_domain_free(hw_dom); } } =20 @@ -629,9 +634,9 @@ static void domain_add_cpu(int cpu, struct rdt_resource= *r) static void domain_remove_cpu_ctrl(int cpu, struct rdt_resource *r) { int id =3D get_domain_id_from_scope(cpu, r->ctrl_scope); - struct rdt_hw_domain *hw_dom; + struct rdt_hw_ctrl_domain *hw_dom; struct rdt_domain_hdr *hdr; - struct rdt_domain *d; + struct rdt_ctrl_domain *d; =20 lockdep_assert_held(&domain_list_lock); =20 @@ -651,8 +656,8 @@ static void domain_remove_cpu_ctrl(int cpu, struct rdt_= resource *r) if (WARN_ON_ONCE(hdr->type !=3D RESCTRL_CTRL_DOMAIN)) return; =20 - d =3D container_of(hdr, struct rdt_domain, hdr); - hw_dom =3D resctrl_to_arch_dom(d); + d =3D container_of(hdr, struct rdt_ctrl_domain, hdr); + hw_dom =3D resctrl_to_arch_ctrl_dom(d); =20 cpumask_clear_cpu(cpu, &d->hdr.cpu_mask); if (cpumask_empty(&d->hdr.cpu_mask)) { @@ -661,12 +666,12 @@ static void domain_remove_cpu_ctrl(int cpu, struct rd= t_resource *r) synchronize_rcu(); =20 /* - * rdt_domain "d" is going to be freed below, so clear + * rdt_ctrl_domain "d" is going to be freed below, so clear * its pointer from pseudo_lock_region struct. */ if (d->plr) d->plr->d =3D NULL; - domain_free(hw_dom); + ctrl_domain_free(hw_dom); =20 return; } @@ -675,9 +680,9 @@ static void domain_remove_cpu_ctrl(int cpu, struct rdt_= resource *r) static void domain_remove_cpu_mon(int cpu, struct rdt_resource *r) { int id =3D get_domain_id_from_scope(cpu, r->mon_scope); - struct rdt_hw_domain *hw_dom; + struct rdt_hw_mon_domain *hw_dom; struct rdt_domain_hdr *hdr; - struct rdt_domain *d; + struct rdt_mon_domain *d; =20 lockdep_assert_held(&domain_list_lock); =20 @@ -697,15 +702,15 @@ static void domain_remove_cpu_mon(int cpu, struct rdt= _resource *r) if (WARN_ON_ONCE(hdr->type !=3D RESCTRL_MON_DOMAIN)) return; =20 - d =3D container_of(hdr, struct rdt_domain, hdr); - hw_dom =3D resctrl_to_arch_dom(d); + d =3D container_of(hdr, struct rdt_mon_domain, hdr); + hw_dom =3D resctrl_to_arch_mon_dom(d); =20 cpumask_clear_cpu(cpu, &d->hdr.cpu_mask); if (cpumask_empty(&d->hdr.cpu_mask)) { resctrl_offline_mon_domain(r, d); list_del_rcu(&d->hdr.list); synchronize_rcu(); - domain_free(hw_dom); + mon_domain_free(hw_dom); =20 return; } diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index 8cc36723f077..3b9383612c35 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -60,7 +60,7 @@ static bool bw_validate(char *buf, unsigned long *data, s= truct rdt_resource *r) } =20 int parse_bw(struct rdt_parse_data *data, struct resctrl_schema *s, - struct rdt_domain *d) + struct rdt_ctrl_domain *d) { struct resctrl_staged_config *cfg; u32 closid =3D data->rdtgrp->closid; @@ -139,7 +139,7 @@ static bool cbm_validate(char *buf, u32 *data, struct r= dt_resource *r) * resource type. */ int parse_cbm(struct rdt_parse_data *data, struct resctrl_schema *s, - struct rdt_domain *d) + struct rdt_ctrl_domain *d) { struct rdtgroup *rdtgrp =3D data->rdtgrp; struct resctrl_staged_config *cfg; @@ -208,8 +208,8 @@ static int parse_line(char *line, struct resctrl_schema= *s, struct resctrl_staged_config *cfg; struct rdt_resource *r =3D s->res; struct rdt_parse_data data; + struct rdt_ctrl_domain *d; char *dom =3D NULL, *id; - struct rdt_domain *d; unsigned long dom_id; =20 /* Walking r->domains, ensure it can't race with cpuhp */ @@ -272,11 +272,11 @@ static u32 get_config_index(u32 closid, enum resctrl_= conf_type type) } } =20 -int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d, +int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain= *d, u32 closid, enum resctrl_conf_type t, u32 cfg_val) { + struct rdt_hw_ctrl_domain *hw_dom =3D resctrl_to_arch_ctrl_dom(d); struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); - struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); u32 idx =3D get_config_index(closid, t); struct msr_param msr_param; =20 @@ -297,17 +297,17 @@ int resctrl_arch_update_one(struct rdt_resource *r, s= truct rdt_domain *d, int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid) { struct resctrl_staged_config *cfg; - struct rdt_hw_domain *hw_dom; + struct rdt_hw_ctrl_domain *hw_dom; struct msr_param msr_param; + struct rdt_ctrl_domain *d; enum resctrl_conf_type t; - struct rdt_domain *d; u32 idx; =20 /* Walking r->domains, ensure it can't race with cpuhp */ lockdep_assert_cpus_held(); =20 list_for_each_entry(d, &r->ctrl_domains, hdr.list) { - hw_dom =3D resctrl_to_arch_dom(d); + hw_dom =3D resctrl_to_arch_ctrl_dom(d); msr_param.res =3D NULL; for (t =3D 0; t < CDP_NUM_TYPES; t++) { cfg =3D &hw_dom->d_resctrl.staged_config[t]; @@ -430,10 +430,10 @@ ssize_t rdtgroup_schemata_write(struct kernfs_open_fi= le *of, return ret ?: nbytes; } =20 -u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d, +u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain= *d, u32 closid, enum resctrl_conf_type type) { - struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); + struct rdt_hw_ctrl_domain *hw_dom =3D resctrl_to_arch_ctrl_dom(d); u32 idx =3D get_config_index(closid, type); =20 return hw_dom->ctrl_val[idx]; @@ -442,7 +442,7 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, str= uct rdt_domain *d, static void show_doms(struct seq_file *s, struct resctrl_schema *schema, i= nt closid) { struct rdt_resource *r =3D schema->res; - struct rdt_domain *dom; + struct rdt_ctrl_domain *dom; bool sep =3D false; u32 ctrl_val; =20 @@ -514,7 +514,7 @@ static int smp_mon_event_count(void *arg) } =20 void mon_event_read(struct rmid_read *rr, struct rdt_resource *r, - struct rdt_domain *d, struct rdtgroup *rdtgrp, + struct rdt_mon_domain *d, struct rdtgroup *rdtgrp, int evtid, int first) { int cpu; @@ -557,11 +557,11 @@ int rdtgroup_mondata_show(struct seq_file *m, void *a= rg) { struct kernfs_open_file *of =3D m->private; struct rdt_domain_hdr *hdr; + struct rdt_mon_domain *d; u32 resid, evtid, domid; struct rdtgroup *rdtgrp; struct rdt_resource *r; union mon_data_bits md; - struct rdt_domain *d; struct rmid_read rr; int ret =3D 0; =20 @@ -582,7 +582,7 @@ int rdtgroup_mondata_show(struct seq_file *m, void *arg) ret =3D -ENOENT; goto out; } - d =3D container_of(hdr, struct rdt_domain, hdr); + d =3D container_of(hdr, struct rdt_mon_domain, hdr); =20 mon_event_read(&rr, r, d, rdtgrp, evtid, false); =20 diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index 82a44de8136f..89d7e6fcbaa1 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -209,7 +209,7 @@ static int __rmid_read(u32 rmid, enum resctrl_event_id = eventid, u64 *val) return 0; } =20 -static struct arch_mbm_state *get_arch_mbm_state(struct rdt_hw_domain *hw_= dom, +static struct arch_mbm_state *get_arch_mbm_state(struct rdt_hw_mon_domain = *hw_dom, u32 rmid, enum resctrl_event_id eventid) { @@ -228,11 +228,11 @@ static struct arch_mbm_state *get_arch_mbm_state(stru= ct rdt_hw_domain *hw_dom, return NULL; } =20 -void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d, +void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_mon_domain= *d, u32 unused, u32 rmid, enum resctrl_event_id eventid) { - struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); + struct rdt_hw_mon_domain *hw_dom =3D resctrl_to_arch_mon_dom(d); struct arch_mbm_state *am; =20 am =3D get_arch_mbm_state(hw_dom, rmid, eventid); @@ -248,9 +248,9 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, st= ruct rdt_domain *d, * Assumes that hardware counters are also reset and thus that there is * no need to record initial non-zero counts. */ -void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain= *d) +void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_mon_do= main *d) { - struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); + struct rdt_hw_mon_domain *hw_dom =3D resctrl_to_arch_mon_dom(d); =20 if (is_mbm_total_enabled()) memset(hw_dom->arch_mbm_total, 0, @@ -269,12 +269,12 @@ static u64 mbm_overflow_count(u64 prev_msr, u64 cur_m= sr, unsigned int width) return chunks >> shift; } =20 -int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d, +int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *= d, u32 unused, u32 rmid, enum resctrl_event_id eventid, u64 *val, void *ignored) { + struct rdt_hw_mon_domain *hw_dom =3D resctrl_to_arch_mon_dom(d); struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); - struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); struct arch_mbm_state *am; u64 msr_val, chunks; int ret; @@ -320,7 +320,7 @@ static void limbo_release_entry(struct rmid_entry *entr= y) * decrement the count. If the busy count gets to zero on an RMID, we * free the RMID */ -void __check_limbo(struct rdt_domain *d, bool force_free) +void __check_limbo(struct rdt_mon_domain *d, bool force_free) { struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; u32 idx_limit =3D resctrl_arch_system_num_rmid_idx(); @@ -378,7 +378,7 @@ void __check_limbo(struct rdt_domain *d, bool force_fre= e) resctrl_arch_mon_ctx_free(r, QOS_L3_OCCUP_EVENT_ID, arch_mon_ctx); } =20 -bool has_busy_rmid(struct rdt_domain *d) +bool has_busy_rmid(struct rdt_mon_domain *d) { u32 idx_limit =3D resctrl_arch_system_num_rmid_idx(); =20 @@ -479,7 +479,7 @@ int alloc_rmid(u32 closid) static void add_rmid_to_limbo(struct rmid_entry *entry) { struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; - struct rdt_domain *d; + struct rdt_mon_domain *d; u32 idx; =20 lockdep_assert_held(&rdtgroup_mutex); @@ -531,7 +531,7 @@ void free_rmid(u32 closid, u32 rmid) list_add_tail(&entry->list, &rmid_free_lru); } =20 -static struct mbm_state *get_mbm_state(struct rdt_domain *d, u32 closid, +static struct mbm_state *get_mbm_state(struct rdt_mon_domain *d, u32 closi= d, u32 rmid, enum resctrl_event_id evtid) { u32 idx =3D resctrl_arch_rmid_idx_encode(closid, rmid); @@ -667,12 +667,12 @@ void mon_event_count(void *info) * throttle MSRs already have low percentage values. To avoid * unnecessarily restricting such rdtgroups, we also increase the bandwidt= h. */ -static void update_mba_bw(struct rdtgroup *rgrp, struct rdt_domain *dom_mb= m) +static void update_mba_bw(struct rdtgroup *rgrp, struct rdt_mon_domain *do= m_mbm) { u32 closid, rmid, cur_msr_val, new_msr_val; struct mbm_state *pmbm_data, *cmbm_data; + struct rdt_ctrl_domain *dom_mba; struct rdt_resource *r_mba; - struct rdt_domain *dom_mba; u32 cur_bw, user_bw, idx; struct list_head *head; struct rdtgroup *entry; @@ -733,7 +733,7 @@ static void update_mba_bw(struct rdtgroup *rgrp, struct= rdt_domain *dom_mbm) resctrl_arch_update_one(r_mba, dom_mba, closid, CDP_NONE, new_msr_val); } =20 -static void mbm_update(struct rdt_resource *r, struct rdt_domain *d, +static void mbm_update(struct rdt_resource *r, struct rdt_mon_domain *d, u32 closid, u32 rmid) { struct rmid_read rr; @@ -791,12 +791,12 @@ static void mbm_update(struct rdt_resource *r, struct= rdt_domain *d, void cqm_handle_limbo(struct work_struct *work) { unsigned long delay =3D msecs_to_jiffies(CQM_LIMBOCHECK_INTERVAL); - struct rdt_domain *d; + struct rdt_mon_domain *d; =20 cpus_read_lock(); mutex_lock(&rdtgroup_mutex); =20 - d =3D container_of(work, struct rdt_domain, cqm_limbo.work); + d =3D container_of(work, struct rdt_mon_domain, cqm_limbo.work); =20 __check_limbo(d, false); =20 @@ -819,7 +819,7 @@ void cqm_handle_limbo(struct work_struct *work) * @exclude_cpu: Which CPU the handler should not run on, * RESCTRL_PICK_ANY_CPU to pick any CPU. */ -void cqm_setup_limbo_handler(struct rdt_domain *dom, unsigned long delay_m= s, +void cqm_setup_limbo_handler(struct rdt_mon_domain *dom, unsigned long del= ay_ms, int exclude_cpu) { unsigned long delay =3D msecs_to_jiffies(delay_ms); @@ -836,9 +836,9 @@ void mbm_handle_overflow(struct work_struct *work) { unsigned long delay =3D msecs_to_jiffies(MBM_OVERFLOW_INTERVAL); struct rdtgroup *prgrp, *crgrp; + struct rdt_mon_domain *d; struct list_head *head; struct rdt_resource *r; - struct rdt_domain *d; =20 cpus_read_lock(); mutex_lock(&rdtgroup_mutex); @@ -851,7 +851,7 @@ void mbm_handle_overflow(struct work_struct *work) goto out_unlock; =20 r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; - d =3D container_of(work, struct rdt_domain, mbm_over.work); + d =3D container_of(work, struct rdt_mon_domain, mbm_over.work); =20 list_for_each_entry(prgrp, &rdt_all_groups, rdtgroup_list) { mbm_update(r, d, prgrp->closid, prgrp->mon.rmid); @@ -885,7 +885,7 @@ void mbm_handle_overflow(struct work_struct *work) * @exclude_cpu: Which CPU the handler should not run on, * RESCTRL_PICK_ANY_CPU to pick any CPU. */ -void mbm_setup_overflow_handler(struct rdt_domain *dom, unsigned long dela= y_ms, +void mbm_setup_overflow_handler(struct rdt_mon_domain *dom, unsigned long = delay_ms, int exclude_cpu) { unsigned long delay =3D msecs_to_jiffies(delay_ms); diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index 58985ffcf74e..abec0d6d9476 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -814,7 +814,7 @@ int rdtgroup_locksetup_exit(struct rdtgroup *rdtgrp) * Return: true if @cbm overlaps with pseudo-locked region on @d, false * otherwise. */ -bool rdtgroup_cbm_overlaps_pseudo_locked(struct rdt_domain *d, unsigned lo= ng cbm) +bool rdtgroup_cbm_overlaps_pseudo_locked(struct rdt_ctrl_domain *d, unsign= ed long cbm) { unsigned int cbm_len; unsigned long cbm_b; @@ -841,11 +841,11 @@ bool rdtgroup_cbm_overlaps_pseudo_locked(struct rdt_d= omain *d, unsigned long cbm * if it is not possible to test due to memory allocation issue, * false otherwise. */ -bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_domain *d) +bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_ctrl_domain *d) { + struct rdt_ctrl_domain *d_i; cpumask_var_t cpu_with_psl; struct rdt_resource *r; - struct rdt_domain *d_i; bool ret =3D false; =20 /* Walking r->domains, ensure it can't race with cpuhp */ diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 7c1475f393ff..cc31ede1a1e7 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -92,8 +92,8 @@ void rdt_last_cmd_printf(const char *fmt, ...) =20 void rdt_staged_configs_clear(void) { + struct rdt_ctrl_domain *dom; struct rdt_resource *r; - struct rdt_domain *dom; =20 lockdep_assert_held(&rdtgroup_mutex); =20 @@ -1012,7 +1012,7 @@ static int rdt_bit_usage_show(struct kernfs_open_file= *of, unsigned long sw_shareable =3D 0, hw_shareable =3D 0; unsigned long exclusive =3D 0, pseudo_locked =3D 0; struct rdt_resource *r =3D s->res; - struct rdt_domain *dom; + struct rdt_ctrl_domain *dom; int i, hwb, swb, excl, psl; enum rdtgrp_mode mode; bool sep =3D false; @@ -1243,7 +1243,7 @@ static int rdt_has_sparse_bitmasks_show(struct kernfs= _open_file *of, * * Return: false if CBM does not overlap, true if it does. */ -static bool __rdtgroup_cbm_overlaps(struct rdt_resource *r, struct rdt_dom= ain *d, +static bool __rdtgroup_cbm_overlaps(struct rdt_resource *r, struct rdt_ctr= l_domain *d, unsigned long cbm, int closid, enum resctrl_conf_type type, bool exclusive) { @@ -1298,7 +1298,7 @@ static bool __rdtgroup_cbm_overlaps(struct rdt_resour= ce *r, struct rdt_domain *d * * Return: true if CBM overlap detected, false if there is no overlap */ -bool rdtgroup_cbm_overlaps(struct resctrl_schema *s, struct rdt_domain *d, +bool rdtgroup_cbm_overlaps(struct resctrl_schema *s, struct rdt_ctrl_domai= n *d, unsigned long cbm, int closid, bool exclusive) { enum resctrl_conf_type peer_type =3D resctrl_peer_type(s->conf_type); @@ -1329,10 +1329,10 @@ bool rdtgroup_cbm_overlaps(struct resctrl_schema *s= , struct rdt_domain *d, static bool rdtgroup_mode_test_exclusive(struct rdtgroup *rdtgrp) { int closid =3D rdtgrp->closid; + struct rdt_ctrl_domain *d; struct resctrl_schema *s; struct rdt_resource *r; bool has_cache =3D false; - struct rdt_domain *d; u32 ctrl; =20 /* Walking r->domains, ensure it can't race with cpuhp */ @@ -1448,7 +1448,7 @@ static ssize_t rdtgroup_mode_write(struct kernfs_open= _file *of, * bitmap functions work correctly. */ unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r, - struct rdt_domain *d, unsigned long cbm) + struct rdt_ctrl_domain *d, unsigned long cbm) { struct cpu_cacheinfo *ci; unsigned int size =3D 0; @@ -1480,9 +1480,9 @@ static int rdtgroup_size_show(struct kernfs_open_file= *of, { struct resctrl_schema *schema; enum resctrl_conf_type type; + struct rdt_ctrl_domain *d; struct rdtgroup *rdtgrp; struct rdt_resource *r; - struct rdt_domain *d; unsigned int size; int ret =3D 0; u32 closid; @@ -1594,7 +1594,7 @@ static void mon_event_config_read(void *info) mon_info->mon_config =3D msrval & MAX_EVT_CONFIG_BITS; } =20 -static void mondata_config_read(struct rdt_domain *d, struct mon_config_in= fo *mon_info) +static void mondata_config_read(struct rdt_mon_domain *d, struct mon_confi= g_info *mon_info) { smp_call_function_any(&d->hdr.cpu_mask, mon_event_config_read, mon_info, = 1); } @@ -1602,7 +1602,7 @@ static void mondata_config_read(struct rdt_domain *d,= struct mon_config_info *mo static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32= evtid) { struct mon_config_info mon_info =3D {0}; - struct rdt_domain *dom; + struct rdt_mon_domain *dom; bool sep =3D false; =20 cpus_read_lock(); @@ -1661,7 +1661,7 @@ static void mon_event_config_write(void *info) } =20 static void mbm_config_write_domain(struct rdt_resource *r, - struct rdt_domain *d, u32 evtid, u32 val) + struct rdt_mon_domain *d, u32 evtid, u32 val) { struct mon_config_info mon_info =3D {0}; =20 @@ -1702,7 +1702,7 @@ static int mon_config_write(struct rdt_resource *r, c= har *tok, u32 evtid) struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); char *dom_str =3D NULL, *id_str; unsigned long dom_id, val; - struct rdt_domain *d; + struct rdt_mon_domain *d; =20 /* Walking r->domains, ensure it can't race with cpuhp */ lockdep_assert_cpus_held(); @@ -2261,9 +2261,9 @@ static inline bool is_mba_linear(void) static int set_cache_qos_cfg(int level, bool enable) { void (*update)(void *arg); + struct rdt_ctrl_domain *d; struct rdt_resource *r_l; cpumask_var_t cpu_mask; - struct rdt_domain *d; int cpu; =20 /* Walking r->domains, ensure it can't race with cpuhp */ @@ -2313,7 +2313,7 @@ void rdt_domain_reconfigure_cdp(struct rdt_resource *= r) l3_qos_cfg_update(&hw_res->cdp_enabled); } =20 -static int mba_sc_domain_allocate(struct rdt_resource *r, struct rdt_domai= n *d) +static int mba_sc_domain_allocate(struct rdt_resource *r, struct rdt_ctrl_= domain *d) { u32 num_closid =3D resctrl_arch_get_num_closid(r); int cpu =3D cpumask_any(&d->hdr.cpu_mask); @@ -2331,7 +2331,7 @@ static int mba_sc_domain_allocate(struct rdt_resource= *r, struct rdt_domain *d) } =20 static void mba_sc_domain_destroy(struct rdt_resource *r, - struct rdt_domain *d) + struct rdt_ctrl_domain *d) { kfree(d->mbps_val); d->mbps_val =3D NULL; @@ -2357,7 +2357,7 @@ static int set_mba_sc(bool mba_sc) { struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_MBA].r_resctrl; u32 num_closid =3D resctrl_arch_get_num_closid(r); - struct rdt_domain *d; + struct rdt_ctrl_domain *d; int i; =20 if (!supports_mba_mbps() || mba_sc =3D=3D is_mba_sc(r)) @@ -2629,7 +2629,7 @@ static int rdt_get_tree(struct fs_context *fc) { struct rdt_fs_context *ctx =3D rdt_fc2context(fc); unsigned long flags =3D RFTYPE_CTRL_BASE; - struct rdt_domain *dom; + struct rdt_mon_domain *dom; struct rdt_resource *r; int ret; =20 @@ -2814,9 +2814,9 @@ static int rdt_init_fs_context(struct fs_context *fc) static int reset_all_ctrls(struct rdt_resource *r) { struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); - struct rdt_hw_domain *hw_dom; + struct rdt_hw_ctrl_domain *hw_dom; struct msr_param msr_param; - struct rdt_domain *d; + struct rdt_ctrl_domain *d; int i; =20 /* Walking r->domains, ensure it can't race with cpuhp */ @@ -2832,7 +2832,7 @@ static int reset_all_ctrls(struct rdt_resource *r) * from each domain to update the MSRs below. */ list_for_each_entry(d, &r->ctrl_domains, hdr.list) { - hw_dom =3D resctrl_to_arch_dom(d); + hw_dom =3D resctrl_to_arch_ctrl_dom(d); =20 for (i =3D 0; i < hw_res->num_closid; i++) hw_dom->ctrl_val[i] =3D r->default_ctrl; @@ -3025,7 +3025,7 @@ static void rmdir_mondata_subdir_allrdtgrp(struct rdt= _resource *r, } =20 static int mkdir_mondata_subdir(struct kernfs_node *parent_kn, - struct rdt_domain *d, + struct rdt_mon_domain *d, struct rdt_resource *r, struct rdtgroup *prgrp) { union mon_data_bits priv; @@ -3074,7 +3074,7 @@ static int mkdir_mondata_subdir(struct kernfs_node *p= arent_kn, * and "monitor" groups with given domain id. */ static void mkdir_mondata_subdir_allrdtgrp(struct rdt_resource *r, - struct rdt_domain *d) + struct rdt_mon_domain *d) { struct kernfs_node *parent_kn; struct rdtgroup *prgrp, *crgrp; @@ -3096,7 +3096,7 @@ static int mkdir_mondata_subdir_alldom(struct kernfs_= node *parent_kn, struct rdt_resource *r, struct rdtgroup *prgrp) { - struct rdt_domain *dom; + struct rdt_mon_domain *dom; int ret; =20 /* Walking r->domains, ensure it can't race with cpuhp */ @@ -3201,7 +3201,7 @@ static u32 cbm_ensure_valid(u32 _val, struct rdt_reso= urce *r) * Set the RDT domain up to start off with all usable allocations. That is, * all shareable and unused bits. All-zero CBM is invalid. */ -static int __init_one_rdt_domain(struct rdt_domain *d, struct resctrl_sche= ma *s, +static int __init_one_rdt_domain(struct rdt_ctrl_domain *d, struct resctrl= _schema *s, u32 closid) { enum resctrl_conf_type peer_type =3D resctrl_peer_type(s->conf_type); @@ -3281,7 +3281,7 @@ static int __init_one_rdt_domain(struct rdt_domain *d= , struct resctrl_schema *s, */ static int rdtgroup_init_cat(struct resctrl_schema *s, u32 closid) { - struct rdt_domain *d; + struct rdt_ctrl_domain *d; int ret; =20 list_for_each_entry(d, &s->res->ctrl_domains, hdr.list) { @@ -3297,7 +3297,7 @@ static int rdtgroup_init_cat(struct resctrl_schema *s= , u32 closid) static void rdtgroup_init_mba(struct rdt_resource *r, u32 closid) { struct resctrl_staged_config *cfg; - struct rdt_domain *d; + struct rdt_ctrl_domain *d; =20 list_for_each_entry(d, &r->ctrl_domains, hdr.list) { if (is_mba_sc(r)) { @@ -3923,14 +3923,14 @@ static void __init rdtgroup_setup_default(void) mutex_unlock(&rdtgroup_mutex); } =20 -static void domain_destroy_mon_state(struct rdt_domain *d) +static void domain_destroy_mon_state(struct rdt_mon_domain *d) { bitmap_free(d->rmid_busy_llc); kfree(d->mbm_total); kfree(d->mbm_local); } =20 -void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_domain= *d) +void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_d= omain *d) { mutex_lock(&rdtgroup_mutex); =20 @@ -3940,7 +3940,7 @@ void resctrl_offline_ctrl_domain(struct rdt_resource = *r, struct rdt_domain *d) mutex_unlock(&rdtgroup_mutex); } =20 -void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_domain = *d) +void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_mon_dom= ain *d) { mutex_lock(&rdtgroup_mutex); =20 @@ -3971,7 +3971,7 @@ void resctrl_offline_mon_domain(struct rdt_resource *= r, struct rdt_domain *d) mutex_unlock(&rdtgroup_mutex); } =20 -static int domain_setup_mon_state(struct rdt_resource *r, struct rdt_domai= n *d) +static int domain_setup_mon_state(struct rdt_resource *r, struct rdt_mon_d= omain *d) { u32 idx_limit =3D resctrl_arch_system_num_rmid_idx(); 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a="30812167" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812167" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:16 -0700 X-CSE-ConnectionGUID: M7/367ZzQhair+rR5lcFNg== X-CSE-MsgGUID: VYdtSlOZQm+m2JExil5zUg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090725" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:16 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 05/20] x86/resctrl: Add node-scope to the options for feature scope Date: Tue, 28 May 2024 15:19:50 -0700 Message-ID: <20240528222006.58283-6-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently supported resctrl features are all domain scoped the same as the scope of the L2 or L3 caches. Add RESCTRL_L3_NODE as a new option for features that are scoped at the same granularity as NUMA nodes. This is needed for Intel's Sub-NUMA Cluster (SNC) feature where monitoring features are divided between nodes that share an L3 cache. Signed-off-by: Tony Luck --- include/linux/resctrl.h | 1 + arch/x86/kernel/cpu/resctrl/core.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index aa2c22a8e37b..64b6ad1b22a1 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -176,6 +176,7 @@ struct resctrl_schema; enum resctrl_scope { RESCTRL_L2_CACHE =3D 2, RESCTRL_L3_CACHE =3D 3, + RESCTRL_L3_NODE, }; =20 /** diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index b4f2be776408..b86c525d0620 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -510,6 +510,8 @@ static int get_domain_id_from_scope(int cpu, enum resct= rl_scope scope) case RESCTRL_L2_CACHE: case RESCTRL_L3_CACHE: return get_cpu_cacheinfo_id(cpu, scope); + case RESCTRL_L3_NODE: + return cpu_to_node(cpu); default: break; } --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1F0513E889 for ; Tue, 28 May 2024 22:20:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934822; cv=none; b=g3RjjWsYnv8Ex+YxZM3eXWfx9CMXCHAe+W/y3imGByW2q9uCx9RKHmntYqQYu/bmBzqYqMzIpEZjdNkugfIbxNkLorh8sOqBbGPiQJlplt6Len/E2HEc0mLE0M6pjEb9VWKthlliWXyOpCWTchja6pfI/vbSG9dRKc8jrmClFhY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934822; c=relaxed/simple; bh=gG4r96r2lntBDsHt+9wxOd7VjzgcPxv496sdhJQghAY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Aj5Zyjd87OUNysIT/OHRpof47aa+8+bfwGf3KfPqCAT0r4x5A3hr2GUP3IPCeu/JKatY7R5USBEo+lCKregnQBSzUZz/VarpE/AtXMM2x1Xs1Vur8FLXIR+NCB8z6N6MDCrzSu0lGPtJm6gEr9KqSBeEEvhCV7+JWOoFz7EMDN4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OAni/gMc; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OAni/gMc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716934821; x=1748470821; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gG4r96r2lntBDsHt+9wxOd7VjzgcPxv496sdhJQghAY=; b=OAni/gMc/YbdKMpXvSgsjeC9Gie8/uFNcIjdqa/bmymUf/qJlr3Lc3Ug fU7TICgYh5AFYCeI6/4QMA+NHpA6Xb0Ve9ntS59yzMbE/At0gOP8Jc0M9 HS/rXWf5SFLap6hNm5WNR6q6hHooxDUghplTT3b0mji5IJlSfv+uNJ6VW 309ADSSt9JoGUszXrjPIlHEsZcYkwEft69ty/wiIyrlFTjee7B/TVIuln 99S0eMSIdcwo/9uUkSePqTGL6adEDBgpk7ZLSfgDMomlJ3r1xQRgJJlqo 994KKZYAMMl6gRYVYswFMKE5KtEQHMq7DhjPryDVarvrwk0xIHfQs0qTn Q==; X-CSE-ConnectionGUID: xRUxTQhxTU+nlkyjPezUVQ== X-CSE-MsgGUID: rT8l98LMQiCvQJU03922BA== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="30812174" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812174" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:17 -0700 X-CSE-ConnectionGUID: /SZ2HQi1T4O9BV/wX228hg== X-CSE-MsgGUID: X7OhId77RWeXx0xELZWnyA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090728" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:16 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 06/20] x86/resctrl: Introduce snc_nodes_per_l3_cache Date: Tue, 28 May 2024 15:19:51 -0700 Message-ID: <20240528222006.58283-7-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Intel Sub-NUMA Cluster (SNC) is a feature that subdivides the CPU cores and memory controllers on a socket into two or more groups. These are presented to the operating system as NUMA nodes. This may enable some workloads to have slightly lower latency to memory as the memory controller(s) in an SNC node are electrically closer to the CPU cores on that SNC node. This cost may be offset by lower bandwidth since the memory accesses for each core can only be interleaved between the memory controllers on the same SNC node. Resctrl monitoring on an Intel system depends upon attaching RMIDs to tasks to track L3 cache occupancy and memory bandwidth. There is an MSR that controls how the RMIDs are shared between SNC nodes. The default mode divides them numerically. E.g. when there are two SNC nodes on a socket the lower number half of the RMIDs are given to the first node, the remainder to the second node. This would be difficult to use with the Linux resctrl interface as specific RMID values assigned to resctrl groups are not visible to users. The other mode divides the RMIDs and renumbers the ones on the second SNC node to start from zero. Even with this renumbering SNC mode requires several changes in resctrl behavior for correct operation. Add a static global to arch/x86/kernel/cpu/resctrl/monitor.c to indicate how many SNC domains share an L3 cache instance. Initialize this to "1". Runtime detection of SNC mode will adjust this value. Update all places to take appropriate action when SNC mode is enabled: 1) The number of logical RMIDs per L3 cache available for use is the number of physical RMIDs divided by the number of SNC nodes. 2) Likewise the "mon_scale" value must be divided by the number of SNC nodes. 3) Add a function to convert from logical RMID values (assigned to tasks and loaded into the IA32_PQR_ASSOC MSR on context switch) to physical RMID values to load into IA32_QM_EVTSEL MSR when reading counters on each SNC node. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/monitor.c | 37 ++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index 89d7e6fcbaa1..b9b4d2b5ca82 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -97,6 +97,8 @@ unsigned int resctrl_rmid_realloc_limit; =20 #define CF(cf) ((unsigned long)(1048576 * (cf) + 0.5)) =20 +static int snc_nodes_per_l3_cache =3D 1; + /* * The correction factor table is documented in Documentation/arch/x86/res= ctrl.rst. * If rmid > rmid threshold, MBM total and local values should be multipli= ed @@ -185,10 +187,37 @@ static inline struct rmid_entry *__rmid_entry(u32 idx) return entry; } =20 -static int __rmid_read(u32 rmid, enum resctrl_event_id eventid, u64 *val) +/* + * When Sub-NUMA Cluster (SNC) mode is not enabled, the physical RMID + * is the same as the logical RMID. + * + * When SNC mode is enabled the physical RMIDs are distributed across + * the SNC nodes. E.g. with two SNC nodes per L3 cache and 200 physical + * RMIDs are divided with 0..99 on the first node and 100..199 on + * the second node. Compute the value of the physical RMID to pass to + * resctrl_arch_rmid_read(). + * + * Caller is responsible to make sure execution running on a CPU in + * the domain to be read. + */ +static int logical_rmid_to_physical_rmid(int lrmid) +{ + struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; + int cpu =3D smp_processor_id(); + + if (snc_nodes_per_l3_cache =3D=3D 1) + return lrmid; + + return lrmid + (cpu_to_node(cpu) % snc_nodes_per_l3_cache) * r->num_rmid; +} + +static int __rmid_read(u32 lrmid, + enum resctrl_event_id eventid, u64 *val) { u64 msr_val; + int prmid; =20 + prmid =3D logical_rmid_to_physical_rmid(lrmid); /* * As per the SDM, when IA32_QM_EVTSEL.EvtID (bits 7:0) is configured * with a valid event code for supported resource type and the bits @@ -197,7 +226,7 @@ static int __rmid_read(u32 rmid, enum resctrl_event_id = eventid, u64 *val) * IA32_QM_CTR.Error (bit 63) and IA32_QM_CTR.Unavailable (bit 62) * are error bits. */ - wrmsr(MSR_IA32_QM_EVTSEL, eventid, rmid); + wrmsr(MSR_IA32_QM_EVTSEL, eventid, prmid); rdmsrl(MSR_IA32_QM_CTR, msr_val); =20 if (msr_val & RMID_VAL_ERROR) @@ -1022,8 +1051,8 @@ int __init rdt_get_mon_l3_config(struct rdt_resource = *r) int ret; =20 resctrl_rmid_realloc_limit =3D boot_cpu_data.x86_cache_size * 1024; - hw_res->mon_scale =3D boot_cpu_data.x86_cache_occ_scale; - r->num_rmid =3D boot_cpu_data.x86_cache_max_rmid + 1; + hw_res->mon_scale =3D boot_cpu_data.x86_cache_occ_scale / snc_nodes_per_l= 3_cache; + r->num_rmid =3D (boot_cpu_data.x86_cache_max_rmid + 1) / snc_nodes_per_l3= _cache; hw_res->mbm_width =3D MBM_CNTR_WIDTH_BASE; =20 if (mbm_offset > 0 && mbm_offset <=3D MBM_CNTR_WIDTH_OFFSET_MAX) --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4406413E8B6 for ; Tue, 28 May 2024 22:20:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a="30812182" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812182" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:17 -0700 X-CSE-ConnectionGUID: ZDVryoqgQO27/6KJWYLq+w== X-CSE-MsgGUID: TSd0MCchTYKKPyPS5fNjlw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090731" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:16 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 07/20] x86/resctrl: Block use of mba_MBps mount option on Sub-NUMA Cluster (SNC) systems Date: Tue, 28 May 2024 15:19:52 -0700 Message-ID: <20240528222006.58283-8-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When SNC is enabled there is a mismatch between the MBA control function which operates at L3 cache scope and the MBM monitor functions which measure memory bandwidth on each SNC node. Block use of the mba_MBps when scopes for MBA/MBM do not match. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index cc31ede1a1e7..1cc4794d5a2e 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -2343,10 +2343,12 @@ static void mba_sc_domain_destroy(struct rdt_resour= ce *r, */ static bool supports_mba_mbps(void) { + struct rdt_resource *rmbm =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resct= rl; struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_MBA].r_resctrl; =20 return (is_mbm_local_enabled() && - r->alloc_capable && is_mba_linear()); + r->alloc_capable && is_mba_linear() && + r->ctrl_scope =3D=3D rmbm->mon_scope); } =20 /* --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5352813E8B8 for ; Tue, 28 May 2024 22:20:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934823; cv=none; b=WjwPjVSPOyeuR+1R12cpY5vW7OQFLvdZrdg5lKWxkVi/d5U8HckVVuY69qzmPPM6Uyya6kv9vFg+vDikDalUJ/oG3wPW0tKYhUhfrPf8yqKLFMyYZsDbrF6efV6nbmreOIkLPylgJcRlXxaSWfxv9ynj0zQ2hkqI5wYEHM7JO0s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934823; c=relaxed/simple; bh=+d/CfgoQlj3LxBdTbrw5ws4sh4DgcSjzzP45sdvMehw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=MKoVDAmDW76W+bhDnV3lZiZttJrkIYhW5LKxAlcXMA7+ONBw86N2KShysgLY/6+HJyN4FUH+rpBTsiW0vv/+2ei3fIH4JwUyiXbM6oTt/KPeO1IDtHXybngGbMw539IF814E4DsJJk31GThEqaNHcGwD6H8U6j5U2a4GSXtjdpY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cGYlVMxZ; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cGYlVMxZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716934822; x=1748470822; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+d/CfgoQlj3LxBdTbrw5ws4sh4DgcSjzzP45sdvMehw=; b=cGYlVMxZSWBNDqkWYq/qlYTYBePZ4XmmiFOABbjvf01k7jlNypJIjQrx d8TZZnEr9x/5az5ORbwLKQR4zi/T93PKei9wZENdY2BAsyqKxUFwa75yo UYSVDitrl1+bHUTBvrj+vm+ZXm7w1RL5lAdGzcvtdUtR4TPpwmLLV78rS BlNk0a64xlllivoGozZWSUCitipuEj01hmgm5hMFuMFs0iQYQHA8YJKrG wkpI6i3BhBNTa7+sQglayGdzApRJ7GkrJ/OO8soCI8I8oX31NGAQOMAQk gcfB/ekc6egvtk1P+jtEBau2R7dG77VyoQBPhLxq4PYL7NbFgNiSSc+UN Q==; X-CSE-ConnectionGUID: JH3GH2K+TQiRoqZVb9q88A== X-CSE-MsgGUID: Q2cst6ldS+W0ynGuVmPdkw== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="30812190" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812190" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:17 -0700 X-CSE-ConnectionGUID: bPdrcfAJReCWsRhQlsr54g== X-CSE-MsgGUID: 5jyXBg9KQYuzN2lhzM44Wg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090734" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:16 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 08/20] x86/resctrl: Prepare for new Sub-NUMA Cluster (SNC) monitor files Date: Tue, 28 May 2024 15:19:53 -0700 Message-ID: <20240528222006.58283-9-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable When SNC is enabled monitoring data is collected at the SNC node granularity, but must be reported at L3-cache granularity for backwards compatibility in addition to reporting at the node level. Add a "ci" field to the rdt_mon_domain structure to save the cache information about the enclosing L3 cache for the domain. This provides: 1) The cache id which is needed to compose the name of the legacy monitoring directory, and to determine which domains should be summed to provide L3-scoped data. 2) The shared_cpu_map which is needed to determine which CPUs can be used to read the RMID counters with the MSR interface. This is the first step to an eventual goal of monitor reporting files like this (for a system with two SNC nodes per L3): $ cd /sys/fs/resctrl/mon_data $ tree mon_L3_00 mon_L3_00 <- 00 here is L3 cache id =E2=94=9C=E2=94=80=E2=94=80 llc_occupancy \ These files provide legacy su= pport =E2=94=9C=E2=94=80=E2=94=80 mbm_local_bytes > for non-SNC aware monitor a= pps =E2=94=9C=E2=94=80=E2=94=80 mbm_total_bytes / that expect data at L3 cach= e level =E2=94=9C=E2=94=80=E2=94=80 mon_sub_L3_00 <- 00 here is SNC node id =E2=94=82=C2=A0=C2=A0 =E2=94=9C=E2=94=80=E2=94=80 llc_occupancy \ These f= iles are finer grained =E2=94=82=C2=A0=C2=A0 =E2=94=9C=E2=94=80=E2=94=80 mbm_local_bytes > data = from each SNC node =E2=94=82=C2=A0=C2=A0 =E2=94=94=E2=94=80=E2=94=80 mbm_total_bytes / =E2=94=94=E2=94=80=E2=94=80 mon_sub_L3_01 =E2=94=9C=E2=94=80=E2=94=80 llc_occupancy \ =E2=94=9C=E2=94=80=E2=94=80 mbm_local_bytes > As above, but for node = 1. =E2=94=94=E2=94=80=E2=94=80 mbm_total_bytes / Signed-off-by: Tony Luck --- include/linux/resctrl.h | 2 ++ arch/x86/kernel/cpu/resctrl/internal.h | 21 +++++++++++++++++++++ arch/x86/kernel/cpu/resctrl/core.c | 7 ++++++- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 1 - arch/x86/kernel/cpu/resctrl/rdtgroup.c | 1 - 5 files changed, 29 insertions(+), 3 deletions(-) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 64b6ad1b22a1..d733e1f6485d 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -96,6 +96,7 @@ struct rdt_ctrl_domain { /** * struct rdt_mon_domain - group of CPUs sharing a resctrl monitor resource * @hdr: common header for different domain types + * @ci: cache info for this domain * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold * @mbm_total: saved state for MBM total bandwidth * @mbm_local: saved state for MBM local bandwidth @@ -106,6 +107,7 @@ struct rdt_ctrl_domain { */ struct rdt_mon_domain { struct rdt_domain_hdr hdr; + struct cacheinfo *ci; unsigned long *rmid_busy_llc; struct mbm_state *mbm_total; struct mbm_state *mbm_local; diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index 135190e0711c..eb70d3136ced 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -2,6 +2,7 @@ #ifndef _ASM_X86_RESCTRL_INTERNAL_H #define _ASM_X86_RESCTRL_INTERNAL_H =20 +#include #include #include #include @@ -509,6 +510,26 @@ static inline bool resctrl_arch_get_cdp_enabled(enum r= esctrl_res_level l) =20 int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable); =20 +/* + * Get the cacheinfo structure of the cache associated with @cpu at level = @level. + * cpuhp lock must be held. + */ +static inline struct cacheinfo *get_cpu_cacheinfo_level(int cpu, int level) +{ + struct cpu_cacheinfo *ci =3D get_cpu_cacheinfo(cpu); + int i; + + for (i =3D 0; i < ci->num_leaves; i++) { + if (ci->info_list[i].level =3D=3D level) { + if (ci->info_list[i].attributes & CACHE_ID) + return &ci->info_list[i]; + break; + } + } + + return NULL; +} + /* * To return the common struct rdt_resource, which is contained in struct * rdt_hw_resource, walk the resctrl member of struct rdt_hw_resource. diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index b86c525d0620..95ef8fe3cb50 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -19,7 +19,6 @@ #include #include #include -#include #include =20 #include @@ -608,6 +607,12 @@ static void domain_add_cpu_mon(int cpu, struct rdt_res= ource *r) d =3D &hw_dom->d_resctrl; d->hdr.id =3D id; d->hdr.type =3D RESCTRL_MON_DOMAIN; + d->ci =3D get_cpu_cacheinfo_level(cpu, RESCTRL_L3_CACHE); + if (!d->ci) { + pr_warn_once("Can't find L3 cache for CPU:%d resource %s\n", cpu, r->nam= e); + mon_domain_free(hw_dom); + return; + } cpumask_set_cpu(cpu, &d->hdr.cpu_mask); =20 if (arch_domain_mbm_alloc(r->num_rmid, hw_dom)) { diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index abec0d6d9476..20dd9076f89f 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -11,7 +11,6 @@ =20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt =20 -#include #include #include #include diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 1cc4794d5a2e..13f93f2a55b3 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -12,7 +12,6 @@ =20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt =20 -#include #include #include #include --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6875413F01A for ; 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a="30812197" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812197" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:17 -0700 X-CSE-ConnectionGUID: FZvuxAP9StWnXt+DJU6LHg== X-CSE-MsgGUID: Fg6efc1BTnyPVBiKm1F4Uw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090737" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:17 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 09/20] x86/resctrl: Add new fields to struct rmid_read for summation of domains Date: Tue, 28 May 2024 15:19:54 -0700 Message-ID: <20240528222006.58283-10-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" rdtgroup_mondata_show() calls mon_event_read() which calls mon_event_count() which packages up all the required details into an rmid_read structure passed across the smp_call*() infrastructure. Legacy files reporting for a single domain pass that domain in the rmid_read structure. Files that need to sum multiple domains have meta data that provides the L3 cache ID for domains that must be summed. Add the sumdomains and cacheinfo fields to the rmid_read structure. Add kerneldoc comments for the rmid_read structure. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/internal.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index eb70d3136ced..d8156d22cbdc 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -145,12 +145,28 @@ union mon_data_bits { } u; }; =20 +/** + * struct rmid_read - Data passed across smp_call*() to read event count + * @rgrp: Resctrl group (provides RMID value) + * @r: Resource + * @d: Domain + * @evtid: Which monitor event to read + * @first: When true this just requests initialization of an MBM counter + * @sumdomains: When false just return monitor count from domain @d. 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Refactor mkdir_mondata_subdir() to move the creation of monitoring files into a helper function to avoid the need to duplicate code later. No functional change. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 45 ++++++++++++++++---------- 1 file changed, 28 insertions(+), 17 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 13f93f2a55b3..dd386ad9458a 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -3025,14 +3025,37 @@ static void rmdir_mondata_subdir_allrdtgrp(struct r= dt_resource *r, } } =20 +static int mon_add_all_files(struct kernfs_node *kn, struct rdt_mon_domain= *d, + struct rdt_resource *r, struct rdtgroup *prgrp) +{ + union mon_data_bits priv; + struct mon_evt *mevt; + struct rmid_read rr; + int ret; + + if (WARN_ON(list_empty(&r->evt_list))) + return -EPERM; + + priv.u.rid =3D r->rid; + priv.u.domid =3D d->hdr.id; + list_for_each_entry(mevt, &r->evt_list, list) { + priv.u.evtid =3D mevt->evtid; + ret =3D mon_addfile(kn, mevt->name, priv.priv); + if (ret) + return ret; + + if (is_mbm_event(mevt->evtid)) + mon_event_read(&rr, r, d, prgrp, mevt->evtid, true); + } + + return 0; +} + static int mkdir_mondata_subdir(struct kernfs_node *parent_kn, struct rdt_mon_domain *d, struct rdt_resource *r, struct rdtgroup *prgrp) { - union mon_data_bits priv; struct kernfs_node *kn; - struct mon_evt *mevt; - struct rmid_read rr; char name[32]; int ret; =20 @@ -3046,22 +3069,10 @@ static int mkdir_mondata_subdir(struct kernfs_node = *parent_kn, if (ret) goto out_destroy; =20 - if (WARN_ON(list_empty(&r->evt_list))) { - ret =3D -EPERM; + ret =3D mon_add_all_files(kn, d, r, prgrp); + if (ret) goto out_destroy; - } =20 - priv.u.rid =3D r->rid; - priv.u.domid =3D d->hdr.id; - list_for_each_entry(mevt, &r->evt_list, list) { - priv.u.evtid =3D mevt->evtid; - ret =3D mon_addfile(kn, mevt->name, priv.priv); - if (ret) - goto out_destroy; - - if (is_mbm_event(mevt->evtid)) - mon_event_read(&rr, r, d, prgrp, mevt->evtid, true); - } kernfs_activate(kn); return 0; =20 --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C434513F450 for ; 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charset="utf-8" When Sub-NUMA Cluster (SNC) mode is enabled the legacy monitor reporting files must report the sum of the data from all of the SNC nodes that share the L3 cache that is referenced by the monitor file. Resctrl squeezes all the attributes of these files into 32-bits so they can be stored in the "priv" field of struct kernfs_node. Arbitrarily choose the "evtid" field to sacrifice one bit to make space for a new bit. This structure is purely internal to resctrl, no ABI issues with modifying it. Subsequent changes may rearrange the allocation of bits between each of the fields as needed. The stolen bit is given to a new "sum" field that indicates that reading this file must sum across SNC nodes. This bit also indicates that the domid field is the l3_cache_id (instead of a domain id) to find which domains must be summed. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/internal.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index d8156d22cbdc..7957fc38b71c 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -133,14 +133,20 @@ struct mon_evt { * as kernfs private data * @rid: Resource id associated with the event file * @evtid: Event id associated with the event file - * @domid: The domain to which the event file belongs + * @sum: Set when event must be summed across multiple + * domains. + * @domid: When @sum is zero this is the domain to which + * the event file belongs. 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Monitor files at the L3 granularity are tagged with a "sum" attribute to indicate that all SNC nodes sharing an L3 cache should be read and summed to provide the result to the user. Note that the "domid" field for files that must sum across SNC domains has the L3 cache instance id, while non-summing files use the domain id. Also the "sum" files do not need to make a call to mon_event_read() to initialize the MBM counters. This will be handled by initializing the individual SNC nodes that share the L3. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 53 ++++++++++++++++++-------- 1 file changed, 38 insertions(+), 15 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index dd386ad9458a..6a5c35a176d5 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -3026,7 +3026,8 @@ static void rmdir_mondata_subdir_allrdtgrp(struct rdt= _resource *r, } =20 static int mon_add_all_files(struct kernfs_node *kn, struct rdt_mon_domain= *d, - struct rdt_resource *r, struct rdtgroup *prgrp) + struct rdt_resource *r, struct rdtgroup *prgrp, + bool do_sum) { union mon_data_bits priv; struct mon_evt *mevt; @@ -3037,15 +3038,18 @@ static int mon_add_all_files(struct kernfs_node *kn= , struct rdt_mon_domain *d, return -EPERM; =20 priv.u.rid =3D r->rid; - priv.u.domid =3D d->hdr.id; + priv.u.domid =3D do_sum ? d->ci->id : d->hdr.id; + priv.u.sum =3D do_sum; list_for_each_entry(mevt, &r->evt_list, list) { priv.u.evtid =3D mevt->evtid; ret =3D mon_addfile(kn, mevt->name, priv.priv); if (ret) return ret; =20 - if (is_mbm_event(mevt->evtid)) + if (!do_sum && is_mbm_event(mevt->evtid)) { + rr.sumdomains =3D 0; mon_event_read(&rr, r, d, prgrp, mevt->evtid, true); + } } =20 return 0; @@ -3055,23 +3059,42 @@ static int mkdir_mondata_subdir(struct kernfs_node = *parent_kn, struct rdt_mon_domain *d, struct rdt_resource *r, struct rdtgroup *prgrp) { - struct kernfs_node *kn; + struct kernfs_node *kn, *ckn; char name[32]; + bool snc_mode; int ret; =20 - sprintf(name, "mon_%s_%02d", r->name, d->hdr.id); - /* create the directory */ - kn =3D kernfs_create_dir(parent_kn, name, parent_kn->mode, prgrp); - if (IS_ERR(kn)) - return PTR_ERR(kn); + snc_mode =3D r->mon_scope !=3D RESCTRL_L3_CACHE; + sprintf(name, "mon_%s_%02d", r->name, d->ci->id); + kn =3D kernfs_find_and_get_ns(parent_kn, name, NULL); + if (!kn) { + /* create the directory */ + kn =3D kernfs_create_dir(parent_kn, name, parent_kn->mode, prgrp); + if (IS_ERR(kn)) + return PTR_ERR(kn); =20 - ret =3D rdtgroup_kn_set_ugid(kn); - if (ret) - goto out_destroy; + ret =3D rdtgroup_kn_set_ugid(kn); + if (ret) + goto out_destroy; + ret =3D mon_add_all_files(kn, d, r, prgrp, snc_mode); + if (ret) + goto out_destroy; + } =20 - ret =3D mon_add_all_files(kn, d, r, prgrp); - if (ret) - goto out_destroy; + if (snc_mode) { + sprintf(name, "mon_sub_%s_%02d", r->name, d->hdr.id); + ckn =3D kernfs_create_dir(kn, name, parent_kn->mode, prgrp); + if (IS_ERR(ckn)) + goto out_destroy; + + ret =3D rdtgroup_kn_set_ugid(ckn); + if (ret) + goto out_destroy; + + ret =3D mon_add_all_files(ckn, d, r, prgrp, false); + if (ret) + goto out_destroy; + } =20 kernfs_activate(kn); return 0; --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F41D613E042 for ; Tue, 28 May 2024 22:20:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a="30812226" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812226" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:19 -0700 X-CSE-ConnectionGUID: jkHzCNU4SBC1GnfbGCmfyw== X-CSE-MsgGUID: 3hkeNKh0RqWdZPyGmhO2kQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090750" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:18 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 13/20] x86/resctrl: Handle removing directories in Sub-NUMA Cluster (SNC) mode Date: Tue, 28 May 2024 15:19:58 -0700 Message-ID: <20240528222006.58283-14-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In SNC mode there are multiple subdirectories in each L3 level monitor directory (one for each SNC node). If all the CPUs in an SNC node are taken offline, just remove the SNC directory for that node. In non-SNC mode, or when the last SNC node directory is removed, also remove the L3 monitor directory. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 39 ++++++++++++++++++++++---- 1 file changed, 33 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 6a5c35a176d5..cdcae13d6c6d 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -3011,17 +3011,44 @@ static int mon_addfile(struct kernfs_node *parent_k= n, const char *name, * and monitor groups with given domain id. */ static void rmdir_mondata_subdir_allrdtgrp(struct rdt_resource *r, - unsigned int dom_id) + struct rdt_mon_domain *d) { struct rdtgroup *prgrp, *crgrp; + bool remove_all =3D true; + struct kernfs_node *kn; + char subname[32]; char name[32]; =20 + sprintf(name, "mon_%s_%02d", r->name, d->ci->id); + if (r->mon_scope !=3D RESCTRL_L3_CACHE) { + /* + * SNC mode: If the last domain is being removed, the count of + * CPUs sharing the L3 cache should be 1 (current CPU). + */ + if (cpumask_weight(&d->ci->shared_cpu_map) > 1) { + remove_all =3D false; + sprintf(subname, "mon_sub_%s_%02d", r->name, d->hdr.id); + } + } + list_for_each_entry(prgrp, &rdt_all_groups, rdtgroup_list) { - sprintf(name, "mon_%s_%02d", r->name, dom_id); - kernfs_remove_by_name(prgrp->mon.mon_data_kn, name); + if (remove_all) { + kernfs_remove_by_name(prgrp->mon.mon_data_kn, name); + } else { + kn =3D kernfs_find_and_get(prgrp->mon.mon_data_kn, name); + if (kn) + kernfs_remove_by_name(kn, subname); + } =20 - list_for_each_entry(crgrp, &prgrp->mon.crdtgrp_list, mon.crdtgrp_list) - kernfs_remove_by_name(crgrp->mon.mon_data_kn, name); + list_for_each_entry(crgrp, &prgrp->mon.crdtgrp_list, mon.crdtgrp_list) { + if (remove_all) { + kernfs_remove_by_name(crgrp->mon.mon_data_kn, name); + } else { + kn =3D kernfs_find_and_get(crgrp->mon.mon_data_kn, name); + if (kn) + kernfs_remove_by_name(kn, subname); + } + } } } =20 @@ -3984,7 +4011,7 @@ void resctrl_offline_mon_domain(struct rdt_resource *= r, struct rdt_mon_domain *d * per domain monitor data directories. */ if (resctrl_mounted && resctrl_arch_mon_capable()) - rmdir_mondata_subdir_allrdtgrp(r, d->hdr.id); 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28 May 2024 15:20:18 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 14/20] x86/resctrl: Fill out rmid_read structure for smp_call*() to read a counter Date: Tue, 28 May 2024 15:19:59 -0700 Message-ID: <20240528222006.58283-15-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mon_event_read() fills out most fields of the struct rmid_read that is passed via an smp_call*() function to a CPU that is part of the correct domain to read the monitor counters. The one exception is the sumdomains field that is set by the caller (either rdtgroup_mondata_show() or mon_add_all_files()). When rmid_read.sumdomains is false: The domain field "d" specifies the only domain to read CPU to execute is chosen from d->hdr.cpu_mask When rmid_read.sumdomains is true: The domain field is NULL. The cache_info field indicates that all domains that are part of that cache instance should be summed. CPU to execute is chosen from ci->shared_cpu_mask Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 28 ++++++++++++++++++----- 1 file changed, 22 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index 3b9383612c35..4e394400e575 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -517,6 +517,7 @@ void mon_event_read(struct rmid_read *rr, struct rdt_re= source *r, struct rdt_mon_domain *d, struct rdtgroup *rdtgrp, int evtid, int first) { + cpumask_t *cpumask; int cpu; =20 /* When picking a CPU from cpu_mask, ensure it can't race with cpuhp */ @@ -537,7 +538,8 @@ void mon_event_read(struct rmid_read *rr, struct rdt_re= source *r, return; } =20 - cpu =3D cpumask_any_housekeeping(&d->hdr.cpu_mask, RESCTRL_PICK_ANY_CPU); + cpumask =3D rr->sumdomains ? &rr->ci->shared_cpu_map : &d->hdr.cpu_mask; + cpu =3D cpumask_any_housekeeping(cpumask, RESCTRL_PICK_ANY_CPU); =20 /* * cpumask_any_housekeeping() prefers housekeeping CPUs, but @@ -546,7 +548,7 @@ void mon_event_read(struct rmid_read *rr, struct rdt_re= source *r, * counters on some platforms if its called in IRQ context. */ if (tick_nohz_full_cpu(cpu)) - smp_call_function_any(&d->hdr.cpu_mask, mon_event_count, rr, 1); + smp_call_function_any(cpumask, mon_event_count, rr, 1); else smp_call_on_cpu(cpu, smp_mon_event_count, rr, false); =20 @@ -575,15 +577,29 @@ int rdtgroup_mondata_show(struct seq_file *m, void *a= rg) resid =3D md.u.rid; domid =3D md.u.domid; evtid =3D md.u.evtid; - + rr.sumdomains =3D md.u.sum; r =3D &rdt_resources_all[resid].r_resctrl; - hdr =3D rdt_find_domain(&r->mon_domains, domid, NULL); - if (!hdr || WARN_ON_ONCE(hdr->type !=3D RESCTRL_MON_DOMAIN)) { + + if (rr.sumdomains) { + list_for_each_entry(d, &r->mon_domains, hdr.list) { + if (d->ci->id =3D=3D domid) { + rr.ci =3D d->ci; + d =3D NULL; + goto got_cacheinfo; + } + } ret =3D -ENOENT; goto out; + } else { + hdr =3D rdt_find_domain(&r->mon_domains, domid, NULL); + if (!hdr || WARN_ON_ONCE(hdr->type !=3D RESCTRL_MON_DOMAIN)) { + ret =3D -ENOENT; + goto out; + } + d =3D container_of(hdr, struct rdt_mon_domain, hdr); } - d =3D container_of(hdr, struct rdt_mon_domain, hdr); =20 +got_cacheinfo: mon_event_read(&rr, r, d, rdtgrp, evtid, false); =20 if (rr.err =3D=3D -EIO) --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 00691142E77 for ; Tue, 28 May 2024 22:20:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934828; cv=none; b=rA3OTOLlQ/p1VWvK5EZ825acyhTWZHZhHEKBZI9LIcYw0AWMKidd0vG2xB5dJbfrGRaZbQ046PT6faZKC2yyc6UjQ19C2/T7VTY78DI2cJaMNJldxf5WUszHFDR932xu9UB/XU9fX1AoIx3AJ9eyFvvTVLnATvJ7LccFjB1p9+8= ARC-Message-Signature: i=1; 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d="scan'208";a="40090761" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:18 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 15/20] x86/resctrl: Pass two extra arguments to resctrl_arch_rmid_read() Date: Tue, 28 May 2024 15:20:00 -0700 Message-ID: <20240528222006.58283-16-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For backwards compatibility on Sub-NUMA Cluster (SNC) systems the legacy files in the mon_L3_XX directories must report the sum of data from each SNC node sharing that L3 cache instance. To make this possible, pass the "sumdomains" and "ci" fields from rmid_read structure as extra arguments to resctrl_arch_rmid_read(). Note that the call from check_limbo() never operates on a "sum" basis, so pass sumdomains=3Dfalse, ci=3DNULL. Signed-off-by: Tony Luck --- include/linux/resctrl.h | 4 +++- arch/x86/kernel/cpu/resctrl/monitor.c | 5 +++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index d733e1f6485d..d0281c93229d 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -276,6 +276,8 @@ void resctrl_offline_cpu(unsigned int cpu); * @rmid: rmid of the counter to read. * @eventid: eventid to read, e.g. L3 occupancy. * @val: result of the counter read in bytes. + * @sum: sum across all domains sharing an L3 cache instance + * @ci: cacheinfo structure for the cache when @sum is true * @arch_mon_ctx: An architecture specific value from * resctrl_arch_mon_ctx_alloc(), for MPAM this identifies * the hardware monitor allocated for this read request. @@ -292,7 +294,7 @@ void resctrl_offline_cpu(unsigned int cpu); */ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *= d, u32 closid, u32 rmid, enum resctrl_event_id eventid, - u64 *val, void *arch_mon_ctx); + u64 *val, bool sum, struct cacheinfo *ci, void *arch_mon_ctx); =20 /** * resctrl_arch_rmid_read_context_check() - warn about invalid contexts diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index b9b4d2b5ca82..5f89ed4823ee 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -300,7 +300,7 @@ static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr= , unsigned int width) =20 int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *= d, u32 unused, u32 rmid, enum resctrl_event_id eventid, - u64 *val, void *ignored) + u64 *val, bool sum, struct cacheinfo *ci, void *ignored) { struct rdt_hw_mon_domain *hw_dom =3D resctrl_to_arch_mon_dom(d); struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); @@ -380,6 +380,7 @@ void __check_limbo(struct rdt_mon_domain *d, bool force= _free) entry =3D __rmid_entry(idx); if (resctrl_arch_rmid_read(r, d, entry->closid, entry->rmid, QOS_L3_OCCUP_EVENT_ID, &val, + false, NULL, arch_mon_ctx)) { rmid_dirty =3D true; } else { @@ -589,7 +590,7 @@ static int __mon_event_count(u32 closid, u32 rmid, stru= ct rmid_read *rr) } =20 rr->err =3D resctrl_arch_rmid_read(rr->r, rr->d, closid, rmid, rr->evtid, - &tval, rr->arch_mon_ctx); + &tval, rr->sumdomains, rr->ci, rr->arch_mon_ctx); if (rr->err) return rr->err; =20 --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1444D13E054 for ; Tue, 28 May 2024 22:20:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934829; cv=none; b=iKQzJ+FPnDeFGNZJvCXKWcdQaKQYd4Vsib+k2rPMBhbtFzI1mHTHmmczqCOUNFA2lCMs6Bs2DjsBRkTFpXFZxDJwHU//H41qZnCH3M1CVBBvGo7zNhvV7bXLqXhndl9TI7/x4HCWoj/OP2T39bYl8PIi4smx03U0yyBclY4CkPI= ARC-Message-Signature: i=1; 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d="scan'208";a="40090768" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:19 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 16/20] x86/resctrl: Make resctrl_arch_rmid_read() handle sum over domains Date: Tue, 28 May 2024 15:20:01 -0700 Message-ID: <20240528222006.58283-17-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Legacy resctrl monitor files must provide the sum of event values across all Sub-NUMA Cluster (SNC) domains that share an L3 cache instance. Rename the existing resctrl_arch_rmid_read() function as resctrl_arch_rmid_read_one() (with some small refactoring to drop arguments that are not needed. Create a new resctrl_arch_rmid_read() that iterates across domains when necessary. Pass a CPU number from the right domain to resctrl_arch_rmid_read_one(). Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/monitor.c | 41 ++++++++++++++++++++------- 1 file changed, 31 insertions(+), 10 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index 5f89ed4823ee..c9dd6ec68fcd 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -200,10 +200,9 @@ static inline struct rmid_entry *__rmid_entry(u32 idx) * Caller is responsible to make sure execution running on a CPU in * the domain to be read. */ -static int logical_rmid_to_physical_rmid(int lrmid) +static int logical_rmid_to_physical_rmid(int cpu, int lrmid) { struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; - int cpu =3D smp_processor_id(); =20 if (snc_nodes_per_l3_cache =3D=3D 1) return lrmid; @@ -211,13 +210,13 @@ static int logical_rmid_to_physical_rmid(int lrmid) return lrmid + (cpu_to_node(cpu) % snc_nodes_per_l3_cache) * r->num_rmid; } =20 -static int __rmid_read(u32 lrmid, +static int __rmid_read(int cpu, u32 lrmid, enum resctrl_event_id eventid, u64 *val) { u64 msr_val; int prmid; =20 - prmid =3D logical_rmid_to_physical_rmid(lrmid); + prmid =3D logical_rmid_to_physical_rmid(cpu, lrmid); /* * As per the SDM, when IA32_QM_EVTSEL.EvtID (bits 7:0) is configured * with a valid event code for supported resource type and the bits @@ -269,7 +268,7 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, st= ruct rdt_mon_domain *d, memset(am, 0, sizeof(*am)); =20 /* Record any initial, non-zero count value. */ - __rmid_read(rmid, eventid, &am->prev_msr); + __rmid_read(smp_processor_id(), rmid, eventid, &am->prev_msr); } } =20 @@ -298,9 +297,8 @@ static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr= , unsigned int width) return chunks >> shift; } =20 -int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *= d, - u32 unused, u32 rmid, enum resctrl_event_id eventid, - u64 *val, bool sum, struct cacheinfo *ci, void *ignored) +static int resctrl_arch_rmid_read_one(struct rdt_resource *r, struct rdt_m= on_domain *d, + int cpu, u32 rmid, enum resctrl_event_id eventid, u64 *val) { struct rdt_hw_mon_domain *hw_dom =3D resctrl_to_arch_mon_dom(d); struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); @@ -313,7 +311,7 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, stru= ct rdt_mon_domain *d, if (!cpumask_test_cpu(smp_processor_id(), &d->hdr.cpu_mask)) return -EINVAL; =20 - ret =3D __rmid_read(rmid, eventid, &msr_val); + ret =3D __rmid_read(cpu, rmid, eventid, &msr_val); if (ret) return ret; =20 @@ -327,7 +325,30 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, str= uct rdt_mon_domain *d, chunks =3D msr_val; } =20 - *val =3D chunks * hw_res->mon_scale; + *val +=3D chunks * hw_res->mon_scale; + + return 0; +} + +int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *= d, + u32 unused, u32 rmid, enum resctrl_event_id eventid, + u64 *val, bool sum, struct cacheinfo *ci, void *ignored) +{ + int cpu =3D smp_processor_id(); + int ret; + + *val =3D 0; + if (!sum) + return resctrl_arch_rmid_read_one(r, d, cpu, rmid, eventid, val); + + list_for_each_entry(d, &r->mon_domains, hdr.list) { + if (d->ci->id !=3D ci->id) + continue; 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28 May 2024 15:20:19 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 17/20] x86/resctrl: Update CPU sanity checks when reading RMID counters Date: Tue, 28 May 2024 15:20:02 -0700 Message-ID: <20240528222006.58283-18-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When reading from a single domain the existing check that current CPU is in the domain is accurate. But when summing across multiple domains that share an L3 cache instance it is sufficient to run on any CPU in the shared_map for that cache. Split the check into the two separate cases. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/monitor.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index c9dd6ec68fcd..e7a8e96821e5 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -308,9 +308,6 @@ static int resctrl_arch_rmid_read_one(struct rdt_resour= ce *r, struct rdt_mon_dom =20 resctrl_arch_rmid_read_context_check(); =20 - if (!cpumask_test_cpu(smp_processor_id(), &d->hdr.cpu_mask)) - return -EINVAL; - ret =3D __rmid_read(cpu, rmid, eventid, &msr_val); if (ret) return ret; @@ -338,8 +335,15 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, str= uct rdt_mon_domain *d, int ret; =20 *val =3D 0; - if (!sum) + if (!sum) { + if (!cpumask_test_cpu(cpu, &d->hdr.cpu_mask)) + return -EINVAL; + return resctrl_arch_rmid_read_one(r, d, cpu, rmid, eventid, val); + } + + if (!cpumask_test_cpu(cpu, &ci->shared_cpu_map)) + return -EINVAL; =20 list_for_each_entry(d, &r->mon_domains, hdr.list) { if (d->ci->id !=3D ci->id) --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0264914388F for ; Tue, 28 May 2024 22:20:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934830; cv=none; b=eeIQzYzbBeGVLQ2gOW2dD4D7TJTRlCahiofmPGq+oD2f7L4640aWpYBKyQy4QYxZsuKHXzjc7OmyIzZPzTPEPADa1L4wFrCzlUtiI8yqm0ivFaE3hKgUqMfuzuQNY65ihW1tmK+tMyXdxThc+Tr58LO6fs8tA2j0aUs+3O8t108= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934830; c=relaxed/simple; bh=5GfAF4d64QU3XOAsHg5jauTIBzHoAkFgwTZurK76Vu8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=d3jdzBD+B53ad2uFZLxtVd0p5YbpSHbCOTDUY3L6s9uB2mA7UAfKlKlk2cxEueblVyao72TTh9ycN38bsHwTUNv61qUXAHurSsgXvtftVP2f99+cFk7cdQRfEhsx33nzw0okUjIN6/q06YPAcPLA0jhlBghZY/j4uuFNpoZvc7I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=U7en//bj; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="U7en//bj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716934829; x=1748470829; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5GfAF4d64QU3XOAsHg5jauTIBzHoAkFgwTZurK76Vu8=; b=U7en//bjhoRqeqhePPfQMCNXrRzIXDqmY6uBKov26YsjiBfDAyeOHNgZ ncubh0bEXzjM15CJGApRnh1pamB9qOJmInhpbQ3b2QCXnwNZq2ralOCnf rP8J5ihjiTQmbwuoQG0yBYDJfPdbh53tvvKqkpydvOKEBnV3AAXt8wmFI xc3x7Nr8yeedWeIrBcK4YKWF1zy8UWV6jqT6d015WafL6Rym7EtgKb3yN cVlKMlgIhzbyczrK3c4KJcmm1DB4AM0keRX4PtLNKEU18V36euJx8151M b3lJTtjPiXL9obmObjmbqD0sgsoKh2v4XKPEc5D2FTkeJEAGfD1JVOHtg g==; X-CSE-ConnectionGUID: LiC+DGyiQh+cgvrw0YFYkg== X-CSE-MsgGUID: oChf0C6TRouw761fOuhL8g== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="30812261" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812261" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:20 -0700 X-CSE-ConnectionGUID: Gdv81BkWQd+PmSNCI+Vv2g== X-CSE-MsgGUID: LKu/UuMkQSaPr3K9+a86Wg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090780" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:19 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 18/20] x86/resctrl: Enable RMID shared RMID mode on Sub-NUMA Cluster (SNC) systems Date: Tue, 28 May 2024 15:20:03 -0700 Message-ID: <20240528222006.58283-19-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There is an MSR which configures how RMIDs are distributed across SNC nodes. When SNC is enabled bit 0 of this MSR must be cleared. Add an architecture specific hook into domain_add_cpu_mon() to call a function to set the MSR. Signed-off-by: Tony Luck --- arch/x86/include/asm/msr-index.h | 1 + arch/x86/kernel/cpu/resctrl/internal.h | 2 ++ arch/x86/kernel/cpu/resctrl/core.c | 2 ++ arch/x86/kernel/cpu/resctrl/monitor.c | 26 ++++++++++++++++++++++++++ 4 files changed, 31 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-in= dex.h index e022e6eb766c..3cb8dd6311c3 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1164,6 +1164,7 @@ #define MSR_IA32_QM_CTR 0xc8e #define MSR_IA32_PQR_ASSOC 0xc8f #define MSR_IA32_L3_CBM_BASE 0xc90 +#define MSR_RMID_SNC_CONFIG 0xca0 #define MSR_IA32_L2_CBM_BASE 0xd10 #define MSR_IA32_MBA_THRTL_BASE 0xd50 =20 diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index 7957fc38b71c..08520321f5d0 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -532,6 +532,8 @@ static inline bool resctrl_arch_get_cdp_enabled(enum re= sctrl_res_level l) =20 int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable); =20 +void arch_mon_domain_online(struct rdt_resource *r, struct rdt_mon_domain = *d); + /* * Get the cacheinfo structure of the cache associated with @cpu at level = @level. * cpuhp lock must be held. diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 95ef8fe3cb50..1930fce9dfe9 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -615,6 +615,8 @@ static void domain_add_cpu_mon(int cpu, struct rdt_reso= urce *r) } cpumask_set_cpu(cpu, &d->hdr.cpu_mask); =20 + arch_mon_domain_online(r, d); + if (arch_domain_mbm_alloc(r->num_rmid, hw_dom)) { mon_domain_free(hw_dom); return; diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index e7a8e96821e5..c7559735e33a 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -1069,6 +1069,32 @@ static void l3_mon_evt_init(struct rdt_resource *r) list_add_tail(&mbm_local_event.list, &r->evt_list); } =20 +/* + * The power-on reset value of MSR_RMID_SNC_CONFIG is 0x1 + * which indicates that RMIDs are configured in legacy mode. + * This mode is incompatible with Linux resctrl semantics + * as RMIDs are partitioned between SNC nodes, which requires + * a user to know which RMID is allocated to a task. + * Clearing bit 0 reconfigures the RMID counters for use + * in Sub-NUMA Cluster mode. This mode is better for Linux. + * The RMID space is divided between all SNC nodes with the + * RMIDs renumbered to start from zero in each node when + * counting operations from tasks. Code to read the counters + * must adjust RMID counter numbers based on SNC node. See + * logical_rmid_to_physical_rmid() for code that does this. + */ +void arch_mon_domain_online(struct rdt_resource *r, struct rdt_mon_domain = *d) +{ + u64 val; + + if (snc_nodes_per_l3_cache =3D=3D 1) + return; + + rdmsrl(MSR_RMID_SNC_CONFIG, val); + val &=3D ~BIT_ULL(0); + wrmsrl(MSR_RMID_SNC_CONFIG, val); +} + int __init rdt_get_mon_l3_config(struct rdt_resource *r) { unsigned int mbm_offset =3D boot_cpu_data.x86_cache_mbm_width_offset; --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 266F7143897 for ; Tue, 28 May 2024 22:20:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934831; cv=none; b=hKjFixotFCWiujUAhYxf3+3y0CUs4jLU/4ocLyi8KgYCjMb5Jr+dSp/W4nnBNvpITvbeMnnDcj0/9Q8gzdrmtLC2BKC5+02x7tmKkhk77H17Qkd5G7t3NLDHZovY9KTnqcmi+znpvVoHOg3FUq4l42crK+wRXgtJqNlXdRi+utg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716934831; c=relaxed/simple; bh=U/FAikBS3HIFP4hXSxgNs+s+WZEIA9TL/WVzdp6SVyw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YLvRtXXDepW1xj0ozHY4ezr+Wbho3LG7Qq55xKmPOOKfgdhTelHr1i+1HQctI9QdF9KqpetjKfdlwYLJ3ROy/pEVeAaJNp3MJZEoWWOdBMSgnnnz8xSvsMND2Cuvd4/sZW7Oby3TzbIJ3kzGM/f9c0fPnFbZWtl3qtZuROPUiuI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=g65LGB+X; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="g65LGB+X" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716934830; x=1748470830; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=U/FAikBS3HIFP4hXSxgNs+s+WZEIA9TL/WVzdp6SVyw=; b=g65LGB+XU5NUvFQtFJoq0qK0m6medeNL7DVeFCzu3nWDaGFUPHPlBpV3 oKcm/MPnrzOCFJnk3qKO5cntzvfOt4PgtttMEtdqWR9PCjzmLbcPFVBf1 KoewG1VppHhQyLLOOtsUOXGbp4mBCQufytsr9Qha9UZVVZ44ImoBf6OaV mzVU3/GJrCVOkVO0eya5Y7VQHIozZsZA/oeaV/GyTHTEB3+GBKCFFdgQK A6YAMLq/TArR6Avt4GeJrfemm6XhVzQUxw+XjdhEPHMu62uA8Zy9541uV MqrGFIaoRGkwWecuXl9iH+yLOtVzNGgGaicQNTGwkb9iRVpNzTbMWhPju g==; X-CSE-ConnectionGUID: IC6XnJ95SXaLht/aglWa3g== X-CSE-MsgGUID: Y1bK4j2URbmzEiySib8Y5A== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="30812268" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="30812268" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:20 -0700 X-CSE-ConnectionGUID: cy0GYZ9QRe61jPOC1hVxbg== X-CSE-MsgGUID: 3spDZ/YyScyOBcsfGegt8A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090788" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:20 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 19/20] x86/resctrl: Sub-NUMA Cluster (SNC) detection and enabling Date: Tue, 28 May 2024 15:20:04 -0700 Message-ID: <20240528222006.58283-20-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There isn't a simple hardware bit that indicates whether a CPU is running in Sub-NUMA Cluster (SNC) mode. Infer the state by comparing number CPUs sharing the L3 cache with CPU0 to the number of CPUs in the same NUMA node as CPU0. If SNC mode is detected, print a single informational message to the console. Add the missing definition of pr_fmt() to monitor.c. This wasn't noticed before as there are only "can't happen" console messages from this file. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/monitor.c | 59 +++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index c7559735e33a..1c5162a68461 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -15,6 +15,8 @@ * Software Developer Manual June 2016, volume 3, section 17.17. */ =20 +#define pr_fmt(fmt) "resctrl: " fmt + #include #include #include @@ -1095,6 +1097,61 @@ void arch_mon_domain_online(struct rdt_resource *r, = struct rdt_mon_domain *d) wrmsrl(MSR_RMID_SNC_CONFIG, val); } =20 +/* CPU models that support MSR_RMID_SNC_CONFIG */ +static const struct x86_cpu_id snc_cpu_ids[] __initconst =3D { + X86_MATCH_VFM(INTEL_ICELAKE_X, 0), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, 0), + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, 0), + X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, 0), + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, 0), + {} +}; + +/* + * There isn't a simple hardware bit that indicates whether a CPU is runni= ng + * in Sub-NUMA Cluster (SNC) mode. Infer the state by comparing the + * number CPUs sharing the L3 cache with CPU0 to the number of CPUs in + * the same NUMA node as CPU0. + * It is not possible to accurately determine SNC state if the system is + * booted with a maxcpus=3DN parameter. That distorts the ratio of SNC nod= es + * to L3 caches. It will be OK if system is booted with hyperthreading + * disabled (since this doesn't affect the ratio). + */ +static __init int snc_get_config(void) +{ + struct cacheinfo *ci =3D get_cpu_cacheinfo_level(0, RESCTRL_L3_CACHE); + const cpumask_t *node0_cpumask; + int ret; + + if (!x86_match_cpu(snc_cpu_ids) || !ci) + return 1; + + cpus_read_lock(); + if (num_online_cpus() !=3D num_present_cpus()) + pr_warn("Some CPUs offline, SNC detection may be incorrect\n"); + cpus_read_unlock(); + + node0_cpumask =3D cpumask_of_node(cpu_to_node(0)); + + ret =3D cpumask_weight(&ci->shared_cpu_map) / cpumask_weight(node0_cpumas= k); + + /* sanity check: Only valid results are 1, 2, 3, 4 */ + switch (ret) { + case 1: + break; + case 2 ... 4: + pr_info("Sub-NUMA Cluster mode detected with %d nodes per L3 cache\n", r= et); + rdt_resources_all[RDT_RESOURCE_L3].r_resctrl.mon_scope =3D RESCTRL_L3_NO= DE; + break; + default: + pr_warn("Ignore improbable SNC node count %d\n", ret); + ret =3D 1; + break; + } + + return ret; +} + int __init rdt_get_mon_l3_config(struct rdt_resource *r) { unsigned int mbm_offset =3D boot_cpu_data.x86_cache_mbm_width_offset; @@ -1102,6 +1159,8 @@ int __init rdt_get_mon_l3_config(struct rdt_resource = *r) unsigned int threshold; int ret; =20 + snc_nodes_per_l3_cache =3D snc_get_config(); + resctrl_rmid_realloc_limit =3D boot_cpu_data.x86_cache_size * 1024; hw_res->mon_scale =3D boot_cpu_data.x86_cache_occ_scale / snc_nodes_per_l= 3_cache; r->num_rmid =3D (boot_cpu_data.x86_cache_max_rmid + 1) / snc_nodes_per_l3= _cache; --=20 2.45.0 From nobody Fri Dec 19 19:32:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A00141442ED for ; Tue, 28 May 2024 22:20:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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28 May 2024 15:20:20 -0700 X-CSE-ConnectionGUID: RZgDn3zySHetheQ/gIfjEA== X-CSE-MsgGUID: +eS7IboOT5GvTqmldqgNyw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="40090800" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 15:20:20 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v19 20/20] x86/resctrl: Update documentation with Sub-NUMA cluster changes Date: Tue, 28 May 2024 15:20:05 -0700 Message-ID: <20240528222006.58283-21-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240528222006.58283-1-tony.luck@intel.com> References: <20240528222006.58283-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" With Sub-NUMA Cluster mode enabled the scope of monitoring resources is per-NODE instead of per-L3 cache. Suffixes of directories with "L3" in their name refer to Sub-NUMA nodes instead of L3 cache ids. Users should be aware that SNC mode also affects the amount of L3 cache available for allocation within each SNC node. Signed-off-by: Tony Luck --- Documentation/arch/x86/resctrl.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/re= sctrl.rst index 627e23869bca..401f6bfb4a3c 100644 --- a/Documentation/arch/x86/resctrl.rst +++ b/Documentation/arch/x86/resctrl.rst @@ -375,6 +375,10 @@ When monitoring is enabled all MON groups will also co= ntain: all tasks in the group. In CTRL_MON groups these files provide the sum for all tasks in the CTRL_MON group and all tasks in MON groups. Please see example section for more details on usage. + On systems with Sub-NUMA (SNC) cluster enabled there are extra + directories for each node (located within the "mon_L3_XX" directory + for the L3 cache they occupy). These are named "mon_sub_L3_YY" + where "YY" is the node number. =20 "mon_hw_id": Available only with debug option. The identifier used by hardware @@ -484,6 +488,19 @@ if non-contiguous 1s value is supported. On a system w= ith a 20-bit mask each bit represents 5% of the capacity of the cache. You could partition the cache into four equal parts with masks: 0x1f, 0x3e0, 0x7c00, 0xf8000. =20 +Notes on Sub-NUMA Cluster mode +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D +When SNC mode is enabled, Linux may load balance tasks between Sub-NUMA +nodes much more readily than between regular NUMA nodes since the CPUs +on Sub-NUMA nodes share the same L3 cache and the system may report +the NUMA distance between Sub-NUMA nodes with a lower value than used +for regular NUMA nodes. +The top-level monitoring files in each "mon_L3_XX" directory provide +the sum of data across all SNC nodes sharing an L3 cache instance. +Users who bind tasks to the CPUs of a specific Sub-NUMA node can read +the "llc_occupancy", "mbm_total_bytes", and "mbm_local_bytes" in the +"mon_sub_L3_YY" directories to get node local data. + Memory bandwidth Allocation and monitoring =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 --=20 2.45.0