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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3557a090c2bsm1719611f8f.59.2024.05.24.07.32.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 May 2024 07:32:03 -0700 (PDT) From: Alexandre Bailon To: rafael@kernel.org, daniel.lezcano@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: rui.zhang@intel.com, lukasz.luba@arm.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Bailon Subject: [PATCH v3 6/6] ARM64: mt8195: Use thermal aggregation for big and little cpu Date: Fri, 24 May 2024 16:31:50 +0200 Message-ID: <20240524143150.610949-7-abailon@baylibre.com> X-Mailer: git-send-email 2.44.1 In-Reply-To: <20240524143150.610949-1-abailon@baylibre.com> References: <20240524143150.610949-1-abailon@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This uses the thermal aggregation for the mt8195 to get the maximal temperature of big and little cpu clusters. Signed-off-by: Alexandre Bailon --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 212 +++-------------------- 1 file changed, 27 insertions(+), 185 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 5d8b68f86ce4..8aa2bf142622 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -3600,50 +3600,31 @@ dp_tx: dp-tx@1c600000 { }; =20 thermal_zones: thermal-zones { - cpu0-thermal { + cpu-little { polling-delay =3D <1000>; - polling-delay-passive =3D <250>; - thermal-sensors =3D <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; + polling-delay-passive =3D <100>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_LITTLE_CPU0>, + <&lvts_mcu MT8195_MCU_LITTLE_CPU1>, + <&lvts_mcu MT8195_MCU_LITTLE_CPU2>, + <&lvts_mcu MT8195_MCU_LITTLE_CPU3>; + sustainable-power =3D <1500>; + aggregation =3D "max"; =20 trips { - cpu0_alert: trip-alert { - temperature =3D <85000>; + cpu_little_threshold: trip-point { + temperature =3D <68000>; hysteresis =3D <2000>; type =3D "passive"; }; =20 - cpu0_crit: trip-crit { - temperature =3D <100000>; - hysteresis =3D <2000>; - type =3D "critical"; - }; - }; - - cooling-maps { - map0 { - trip =3D <&cpu0_alert>; - cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu1-thermal { - polling-delay =3D <1000>; - polling-delay-passive =3D <250>; - thermal-sensors =3D <&lvts_mcu MT8195_MCU_LITTLE_CPU1>; - - trips { - cpu1_alert: trip-alert { + cpu_little_target: target { temperature =3D <85000>; hysteresis =3D <2000>; type =3D "passive"; }; =20 - cpu1_crit: trip-crit { - temperature =3D <100000>; + cpu_little_soc_max_crit: soc-max-crit { + temperature =3D <115000>; hysteresis =3D <2000>; type =3D "critical"; }; @@ -3651,7 +3632,7 @@ cpu1_crit: trip-crit { =20 cooling-maps { map0 { - trip =3D <&cpu1_alert>; + trip =3D <&cpu_little_target>; cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, @@ -3660,170 +3641,31 @@ map0 { }; }; =20 - cpu2-thermal { + cpu-big { polling-delay =3D <1000>; polling-delay-passive =3D <250>; - thermal-sensors =3D <&lvts_mcu MT8195_MCU_LITTLE_CPU2>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_BIG_CPU0>, + <&lvts_mcu MT8195_MCU_BIG_CPU1>, + <&lvts_mcu MT8195_MCU_BIG_CPU2>, + <&lvts_mcu MT8195_MCU_BIG_CPU3>; + sustainable-power =3D <1500>; + aggregation =3D "max"; =20 trips { - cpu2_alert: trip-alert { - temperature =3D <85000>; + cpu_big_threshold: trip-point { + temperature =3D <68000>; hysteresis =3D <2000>; type =3D "passive"; }; =20 - cpu2_crit: trip-crit { - temperature =3D <100000>; - hysteresis =3D <2000>; - type =3D "critical"; - }; - }; - - cooling-maps { - map0 { - trip =3D <&cpu2_alert>; - cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu3-thermal { - polling-delay =3D <1000>; - polling-delay-passive =3D <250>; - thermal-sensors =3D <&lvts_mcu MT8195_MCU_LITTLE_CPU3>; - - trips { - cpu3_alert: trip-alert { - temperature =3D <85000>; - hysteresis =3D <2000>; - type =3D "passive"; - }; - - cpu3_crit: trip-crit { - temperature =3D <100000>; - hysteresis =3D <2000>; - type =3D "critical"; - }; - }; - - cooling-maps { - map0 { - trip =3D <&cpu3_alert>; - cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu4-thermal { - polling-delay =3D <1000>; - polling-delay-passive =3D <250>; - thermal-sensors =3D <&lvts_mcu MT8195_MCU_BIG_CPU0>; - - trips { - cpu4_alert: trip-alert { + cpu_big_target: target { temperature =3D <85000>; hysteresis =3D <2000>; type =3D "passive"; }; =20 - cpu4_crit: trip-crit { - temperature =3D <100000>; - hysteresis =3D <2000>; - type =3D "critical"; - }; - }; - - cooling-maps { - map0 { - trip =3D <&cpu4_alert>; - cooling-device =3D <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu5-thermal { - polling-delay =3D <1000>; - polling-delay-passive =3D <250>; - thermal-sensors =3D <&lvts_mcu MT8195_MCU_BIG_CPU1>; - - trips { - cpu5_alert: trip-alert { - temperature =3D <85000>; - hysteresis =3D <2000>; - type =3D "passive"; - }; - - cpu5_crit: trip-crit { - temperature =3D <100000>; - hysteresis =3D <2000>; - type =3D "critical"; - }; - }; - - cooling-maps { - map0 { - trip =3D <&cpu5_alert>; - cooling-device =3D <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu6-thermal { - polling-delay =3D <1000>; - polling-delay-passive =3D <250>; - thermal-sensors =3D <&lvts_mcu MT8195_MCU_BIG_CPU2>; - - trips { - cpu6_alert: trip-alert { - temperature =3D <85000>; - hysteresis =3D <2000>; - type =3D "passive"; - }; - - cpu6_crit: trip-crit { - temperature =3D <100000>; - hysteresis =3D <2000>; - type =3D "critical"; - }; - }; - - cooling-maps { - map0 { - trip =3D <&cpu6_alert>; - cooling-device =3D <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu7-thermal { - polling-delay =3D <1000>; - polling-delay-passive =3D <250>; - thermal-sensors =3D <&lvts_mcu MT8195_MCU_BIG_CPU3>; - - trips { - cpu7_alert: trip-alert { - temperature =3D <85000>; - hysteresis =3D <2000>; - type =3D "passive"; - }; - - cpu7_crit: trip-crit { - temperature =3D <100000>; + cpu_big_soc_max_crit: soc-max-crit { + temperature =3D <115000>; hysteresis =3D <2000>; type =3D "critical"; }; @@ -3831,7 +3673,7 @@ cpu7_crit: trip-crit { =20 cooling-maps { map0 { - trip =3D <&cpu7_alert>; + trip =3D <&cpu_big_target>; cooling-device =3D <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, --=20 2.44.1