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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240524-imx95-bbm-misc-v2-v4-4-dc456995d590@nxp.com> References: <20240524-imx95-bbm-misc-v2-v4-0-dc456995d590@nxp.com> In-Reply-To: <20240524-imx95-bbm-misc-v2-v4-0-dc456995d590@nxp.com> To: Jonathan Corbet , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Sudeep Holla , Cristian Marussi , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peng Fan Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1716541024; l=11208; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=mW0EcuWJNi1Ev4S8xK4NKzhmyrrY3JZf9et/+B66yzk=; b=wJI9m9wiFMtXnsAD5ZHpVEDhFarIMTV/mwG4r0/YkRUnJnitjRdohxbotxrLX9OYEfuYRI3gw gbRsWlNHZNdAFArv9KPS8M+mjCKgP231nmcwNN256wYKlMvv134L+Kk X-Developer-Key: i=peng.fan@nxp.com; a=ed25519; pk=I4sJg7atIT1g63H7bb5lDRGR2gJW14RKDD0wFL8TT1g= X-ClientProxiedBy: SI1PR02CA0023.apcprd02.prod.outlook.com (2603:1096:4:1f4::19) To DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR04MB9417:EE_|VI1PR04MB7149:EE_ X-MS-Office365-Filtering-Correlation-Id: 831be702-e657-496a-3cd7-08dc7bce4285 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|366007|376005|7416005|52116005|1800799015|921011|38350700005; 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They are device specific and are usually define to access bit fields in various mix block control modules, IOMUX_GPR, and other General Purpose registers, Control Status Registers owned by the SM. Signed-off-by: Peng Fan --- drivers/firmware/arm_scmi/imx/Kconfig | 9 + drivers/firmware/arm_scmi/imx/Makefile | 1 + drivers/firmware/arm_scmi/imx/imx-sm-misc.c | 303 ++++++++++++++++++++++++= ++++ include/linux/scmi_imx_protocol.h | 22 ++ 4 files changed, 335 insertions(+) diff --git a/drivers/firmware/arm_scmi/imx/Kconfig b/drivers/firmware/arm_s= cmi/imx/Kconfig index 4b6ac7febe8f..e9d015859eaa 100644 --- a/drivers/firmware/arm_scmi/imx/Kconfig +++ b/drivers/firmware/arm_scmi/imx/Kconfig @@ -11,4 +11,13 @@ config IMX_SCMI_BBM_EXT =20 This driver can also be built as a module. =20 +config IMX_SCMI_MISC_EXT + tristate "i.MX SCMI MISC EXTENSION" + depends on ARM_SCMI_PROTOCOL || (COMPILE_TEST && OF) + default y if ARCH_MXC + help + This enables i.MX System MISC control logic such as gpio expander + wakeup + + This driver can also be built as a module. endmenu diff --git a/drivers/firmware/arm_scmi/imx/Makefile b/drivers/firmware/arm_= scmi/imx/Makefile index a7dbdd20dbb9..d3ee6d544924 100644 --- a/drivers/firmware/arm_scmi/imx/Makefile +++ b/drivers/firmware/arm_scmi/imx/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_IMX_SCMI_BBM_EXT) +=3D imx-sm-bbm.o +obj-$(CONFIG_IMX_SCMI_MISC_EXT) +=3D imx-sm-misc.o diff --git a/drivers/firmware/arm_scmi/imx/imx-sm-misc.c b/drivers/firmware= /arm_scmi/imx/imx-sm-misc.c new file mode 100644 index 000000000000..9d0063299310 --- /dev/null +++ b/drivers/firmware/arm_scmi/imx/imx-sm-misc.c @@ -0,0 +1,303 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * System control and Management Interface (SCMI) NXP MISC Protocol + * + * Copyright 2024 NXP + */ + +#define pr_fmt(fmt) "SCMI Notifications MISC - " fmt + +#include +#include +#include +#include +#include +#include +#include + +#include "../protocols.h" +#include "../notify.h" + +#define SCMI_PROTOCOL_SUPPORTED_VERSION 0x10000 + +enum scmi_imx_misc_protocol_cmd { + SCMI_IMX_MISC_CTRL_SET =3D 0x3, + SCMI_IMX_MISC_CTRL_GET =3D 0x4, + SCMI_IMX_MISC_CTRL_NOTIFY =3D 0x8, +}; + +struct scmi_imx_misc_info { + u32 version; + u32 nr_dev_ctrl; + u32 nr_brd_ctrl; + u32 nr_reason; +}; + +struct scmi_msg_imx_misc_protocol_attributes { + __le32 attributes; +}; + +#define GET_BRD_CTRLS_NR(x) le32_get_bits((x), GENMASK(31, 24)) +#define GET_REASONS_NR(x) le32_get_bits((x), GENMASK(23, 16)) +#define GET_DEV_CTRLS_NR(x) le32_get_bits((x), GENMASK(15, 0)) +#define BRD_CTRL_START_ID BIT(15) + +struct scmi_imx_misc_ctrl_set_in { + __le32 id; + __le32 num; + __le32 value[MISC_MAX_VAL]; +}; + +struct scmi_imx_misc_ctrl_notify_in { + __le32 ctrl_id; + __le32 flags; +}; + +struct scmi_imx_misc_ctrl_notify_payld { + __le32 ctrl_id; + __le32 flags; +}; + +struct scmi_imx_misc_ctrl_get_out { + __le32 num; + __le32 val[MISC_MAX_VAL]; +}; + +static int scmi_imx_misc_attributes_get(const struct scmi_protocol_handle = *ph, + struct scmi_imx_misc_info *mi) +{ + int ret; + struct scmi_xfer *t; + struct scmi_msg_imx_misc_protocol_attributes *attr; + + ret =3D ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES, 0, + sizeof(*attr), &t); + if (ret) + return ret; + + attr =3D t->rx.buf; + + ret =3D ph->xops->do_xfer(ph, t); + if (!ret) { + mi->nr_dev_ctrl =3D GET_DEV_CTRLS_NR(attr->attributes); + mi->nr_brd_ctrl =3D GET_BRD_CTRLS_NR(attr->attributes); + mi->nr_reason =3D GET_REASONS_NR(attr->attributes); + dev_info(ph->dev, "i.MX MISC NUM DEV CTRL: %d, NUM BRD CTRL: %d,NUM Reas= on: %d\n", + mi->nr_dev_ctrl, mi->nr_brd_ctrl, mi->nr_reason); + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_misc_ctrl_validate_id(const struct scmi_protocol_handl= e *ph, + u32 ctrl_id) +{ + struct scmi_imx_misc_info *mi =3D ph->get_priv(ph); + + if ((ctrl_id < BRD_CTRL_START_ID) && (ctrl_id > mi->nr_dev_ctrl)) + return -EINVAL; + if (ctrl_id >=3D BRD_CTRL_START_ID + mi->nr_brd_ctrl) + return -EINVAL; + + return 0; +} + +static int scmi_imx_misc_ctrl_notify(const struct scmi_protocol_handle *ph, + u32 ctrl_id, u32 evt_id, u32 flags) +{ + struct scmi_imx_misc_ctrl_notify_in *in; + struct scmi_xfer *t; + int ret; + + ret =3D scmi_imx_misc_ctrl_validate_id(ph, ctrl_id); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_NOTIFY, + sizeof(*in), 0, &t); + if (ret) + return ret; + + in =3D t->tx.buf; + in->ctrl_id =3D cpu_to_le32(ctrl_id); + in->flags =3D cpu_to_le32(flags); + + ret =3D ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int +scmi_imx_misc_ctrl_set_notify_enabled(const struct scmi_protocol_handle *p= h, + u8 evt_id, u32 src_id, bool enable) +{ + int ret; + + /* misc_ctrl_req_notify is for enablement */ + if (enable) + return 0; + + ret =3D scmi_imx_misc_ctrl_notify(ph, src_id, evt_id, 0); + if (ret) + dev_err(ph->dev, "FAIL_ENABLED - evt[%X] src[%d] - ret:%d\n", + evt_id, src_id, ret); + + return ret; +} + +static int scmi_imx_misc_ctrl_get_num_sources(const struct scmi_protocol_h= andle *ph) +{ + return GENMASK(15, 0); +} + +static void * +scmi_imx_misc_ctrl_fill_custom_report(const struct scmi_protocol_handle *p= h, + u8 evt_id, ktime_t timestamp, + const void *payld, size_t payld_sz, + void *report, u32 *src_id) +{ + const struct scmi_imx_misc_ctrl_notify_payld *p =3D payld; + struct scmi_imx_misc_ctrl_notify_report *r =3D report; + + if (sizeof(*p) !=3D payld_sz) + return NULL; + + r->timestamp =3D timestamp; + r->ctrl_id =3D p->ctrl_id; + r->flags =3D p->flags; + if (src_id) + *src_id =3D r->ctrl_id; + dev_dbg(ph->dev, "%s: ctrl_id: %d flags: %d\n", __func__, + r->ctrl_id, r->flags); + + return r; +} + +static const struct scmi_event_ops scmi_imx_misc_event_ops =3D { + .get_num_sources =3D scmi_imx_misc_ctrl_get_num_sources, + .set_notify_enabled =3D scmi_imx_misc_ctrl_set_notify_enabled, + .fill_custom_report =3D scmi_imx_misc_ctrl_fill_custom_report, +}; + +static const struct scmi_event scmi_imx_misc_events[] =3D { + { + .id =3D SCMI_EVENT_IMX_MISC_CONTROL, + .max_payld_sz =3D sizeof(struct scmi_imx_misc_ctrl_notify_payld), + .max_report_sz =3D sizeof(struct scmi_imx_misc_ctrl_notify_report), + }, +}; + +static struct scmi_protocol_events scmi_imx_misc_protocol_events =3D { + .queue_sz =3D SCMI_PROTO_QUEUE_SZ, + .ops =3D &scmi_imx_misc_event_ops, + .evts =3D scmi_imx_misc_events, + .num_events =3D ARRAY_SIZE(scmi_imx_misc_events), +}; + +static int scmi_imx_misc_protocol_init(const struct scmi_protocol_handle *= ph) +{ + struct scmi_imx_misc_info *minfo; + u32 version; + int ret; + + ret =3D ph->xops->version_get(ph, &version); + if (ret) + return ret; + + dev_info(ph->dev, "NXP SM MISC Version %d.%d\n", + PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version)); + + minfo =3D devm_kzalloc(ph->dev, sizeof(*minfo), GFP_KERNEL); + if (!minfo) + return -ENOMEM; + + ret =3D scmi_imx_misc_attributes_get(ph, minfo); + if (ret) + return ret; + + return ph->set_priv(ph, minfo, version); +} + +static int scmi_imx_misc_ctrl_get(const struct scmi_protocol_handle *ph, + u32 ctrl_id, u32 *num, u32 *val) +{ + struct scmi_imx_misc_ctrl_get_out *out; + struct scmi_xfer *t; + int ret, i; + + ret =3D scmi_imx_misc_ctrl_validate_id(ph, ctrl_id); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_GET, sizeof(u32), + 0, &t); + if (ret) + return ret; + + put_unaligned_le32(ctrl_id, t->tx.buf); + ret =3D ph->xops->do_xfer(ph, t); + if (!ret) { + out =3D t->rx.buf; + *num =3D le32_to_cpu(out->num); + for (i =3D 0; i < *num && i < MISC_MAX_VAL; i++) + val[i] =3D le32_to_cpu(out->val[i]); + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_misc_ctrl_set(const struct scmi_protocol_handle *ph, + u32 ctrl_id, u32 num, u32 *val) +{ + struct scmi_imx_misc_ctrl_set_in *in; + struct scmi_xfer *t; + int ret, i; + + ret =3D scmi_imx_misc_ctrl_validate_id(ph, ctrl_id); + if (ret) + return ret; + + if (num > MISC_MAX_VAL) + return -EINVAL; + + ret =3D ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_SET, sizeof(*in), + 0, &t); + if (ret) + return ret; + + in =3D t->tx.buf; + in->id =3D cpu_to_le32(ctrl_id); + in->num =3D cpu_to_le32(num); + for (i =3D 0; i < num; i++) + in->value[i] =3D cpu_to_le32(val[i]); + + ret =3D ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static const struct scmi_imx_misc_proto_ops scmi_imx_misc_proto_ops =3D { + .misc_ctrl_set =3D scmi_imx_misc_ctrl_set, + .misc_ctrl_get =3D scmi_imx_misc_ctrl_get, + .misc_ctrl_req_notify =3D scmi_imx_misc_ctrl_notify, +}; + +static const struct scmi_protocol scmi_imx_misc =3D { + .id =3D SCMI_PROTOCOL_IMX_MISC, + .owner =3D THIS_MODULE, + .instance_init =3D &scmi_imx_misc_protocol_init, + .ops =3D &scmi_imx_misc_proto_ops, + .events =3D &scmi_imx_misc_protocol_events, + .supported_version =3D SCMI_PROTOCOL_SUPPORTED_VERSION, + .vendor_id =3D "NXP", + .sub_vendor_id =3D "i.MX95 EVK", +}; +module_scmi_protocol(scmi_imx_misc); diff --git a/include/linux/scmi_imx_protocol.h b/include/linux/scmi_imx_pro= tocol.h index e59aedaa4aec..e9285abfc191 100644 --- a/include/linux/scmi_imx_protocol.h +++ b/include/linux/scmi_imx_protocol.h @@ -13,8 +13,14 @@ #include #include =20 +#define SCMI_PAYLOAD_LEN 100 + +#define SCMI_ARRAY(X, Y) ((SCMI_PAYLOAD_LEN - (X)) / sizeof(Y)) +#define MISC_MAX_VAL SCMI_ARRAY(8, uint32_t) + enum scmi_nxp_protocol { SCMI_PROTOCOL_IMX_BBM =3D 0x81, + SCMI_PROTOCOL_IMX_MISC =3D 0x84, }; =20 struct scmi_imx_bbm_proto_ops { @@ -30,6 +36,7 @@ struct scmi_imx_bbm_proto_ops { enum scmi_nxp_notification_events { SCMI_EVENT_IMX_BBM_RTC =3D 0x0, SCMI_EVENT_IMX_BBM_BUTTON =3D 0x1, + SCMI_EVENT_IMX_MISC_CONTROL =3D 0x0, }; =20 struct scmi_imx_bbm_notif_report { @@ -39,4 +46,19 @@ struct scmi_imx_bbm_notif_report { unsigned int rtc_id; unsigned int rtc_evt; }; + +struct scmi_imx_misc_ctrl_notify_report { + ktime_t timestamp; + unsigned int ctrl_id; + unsigned int flags; +}; + +struct scmi_imx_misc_proto_ops { + int (*misc_ctrl_set)(const struct scmi_protocol_handle *ph, u32 id, + u32 num, u32 *val); + int (*misc_ctrl_get)(const struct scmi_protocol_handle *ph, u32 id, + u32 *num, u32 *val); + int (*misc_ctrl_req_notify)(const struct scmi_protocol_handle *ph, + u32 ctrl_id, u32 evt_id, u32 flags); +}; #endif --=20 2.37.1