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Wed, 22 May 2024 18:02:22 -0400 (EDT) From: Jiaxun Yang Date: Wed, 22 May 2024 23:02:17 +0100 Subject: [PATCH v3 1/4] LoongArch: Fix built-in DTB detection Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240522-loongarch-booting-fixes-v3-1-25e77a8fc86e@flygoat.com> References: <20240522-loongarch-booting-fixes-v3-0-25e77a8fc86e@flygoat.com> In-Reply-To: <20240522-loongarch-booting-fixes-v3-0-25e77a8fc86e@flygoat.com> To: Huacai Chen , Binbin Zhou Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, Jiaxun Yang , stable@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1478; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=+ZkFOOEzPJ9R8rASkmEVkeYaiXTIikAfh4ZoUZH4DP8=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhjS/7JxvDx3in+xkvqjqtLrTvtNUKkvQPSKHqc4uPmC13 YqaqfYdpSwMYlwMsmKKLCECSn0bGi8uuP4g6w/MHFYmkCEMXJwCMJHCewz/K5+5OX2c7qm9b0mv XOefqYoC85qSX7ruMjzhf1VOUTrXi+EPT4OmBO+6hqlXvfofnYy+Fx6a8yDWc3a5QXZ5z0QJX1Z uAA== X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 fdt_check_header(__dtb_start) will always success because kernel provided a dummy dtb, and by coincidence __dtb_start clashed with entry of this dummy dtb. The consequence is fdt passed from firmware will never be taken. Fix by trying to utilise __dtb_start only when CONFIG_BUILTIN_DTB is enabled. Cc: stable@vger.kernel.org Fixes: 7b937cc243e5 ("of: Create of_root if no dtb provided by firmware") Signed-off-by: Jiaxun Yang --- v3: Better reasoning in commit message, thanks Binbin and Huacai! --- arch/loongarch/kernel/setup.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/loongarch/kernel/setup.c b/arch/loongarch/kernel/setup.c index 60e0fe97f61a..ea6d5db6c878 100644 --- a/arch/loongarch/kernel/setup.c +++ b/arch/loongarch/kernel/setup.c @@ -275,16 +275,18 @@ static void __init arch_reserve_crashkernel(void) static void __init fdt_setup(void) { #ifdef CONFIG_OF_EARLY_FLATTREE - void *fdt_pointer; + void *fdt_pointer =3D NULL; =20 /* ACPI-based systems do not require parsing fdt */ if (acpi_os_get_root_pointer()) return; =20 +#ifdef CONFIG_BUILTIN_DTB /* Prefer to use built-in dtb, checking its legality first. */ if (!fdt_check_header(__dtb_start)) fdt_pointer =3D __dtb_start; - else +#endif + if (!fdt_pointer) fdt_pointer =3D efi_fdt_pointer(); /* Fallback to firmware dtb */ =20 if (!fdt_pointer || fdt_check_header(fdt_pointer)) --=20 2.43.0 From nobody Wed Feb 11 10:05:59 2026 Received: from wfout1-smtp.messagingengine.com (wfout1-smtp.messagingengine.com [64.147.123.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C51E0145FEA; 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Wed, 22 May 2024 18:02:24 -0400 (EDT) From: Jiaxun Yang Date: Wed, 22 May 2024 23:02:18 +0100 Subject: [PATCH v3 2/4] LoongArch: smp: Add all CPUs enabled by fdt to NUMA node 0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240522-loongarch-booting-fixes-v3-2-25e77a8fc86e@flygoat.com> References: <20240522-loongarch-booting-fixes-v3-0-25e77a8fc86e@flygoat.com> In-Reply-To: <20240522-loongarch-booting-fixes-v3-0-25e77a8fc86e@flygoat.com> To: Huacai Chen , Binbin Zhou Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, Jiaxun Yang , stable@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1531; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=bV5a8vIs5ZyqDK7Cv5/U4BfY0cbpI8aMAyoT7FuVxIU=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhjS/7Jylzhde9yt3RJXxCgo7TjN2sLr/ZI6r7OHIX5Fnr joolhR2lLIwiHExyIopsoQIKPVtaLy44PqDrD8wc1iZQIYwcHEKwE2exfDfV+QYU/OpOyW3uKrf nnpnNaEiemr2+7qtCn8/qtnNL9z0kpHhnNbPi//PcX/tWBIQXevZ0hKrdrvUVkB2/u1fasXqbeX cAA== X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 NUMA enabled kernel on FDT based machine fails to boot because CPUs are all in NUMA_NO_NODE and mm subsystem won't accept that. Fix by adding them to default NUMA node at FDT parsing phase and move numa_add_cpu(0) to a later point. Cc: stable@vger.kernel.org Fixes: 88d4d957edc7 ("LoongArch: Add FDT booting support from efi system ta= ble") Signed-off-by: Jiaxun Yang --- v3: Move numa_add_cpu(0) to a later point to ensure per_cpu is ready. --- arch/loongarch/kernel/smp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c index 0dfe2388ef41..1436d2465939 100644 --- a/arch/loongarch/kernel/smp.c +++ b/arch/loongarch/kernel/smp.c @@ -273,7 +273,6 @@ static void __init fdt_smp_setup(void) =20 if (cpuid =3D=3D loongson_sysconf.boot_cpu_id) { cpu =3D 0; - numa_add_cpu(cpu); } else { cpu =3D cpumask_next_zero(-1, cpu_present_mask); } @@ -283,6 +282,9 @@ static void __init fdt_smp_setup(void) set_cpu_present(cpu, true); __cpu_number_map[cpuid] =3D cpu; __cpu_logical_map[cpu] =3D cpuid; + + early_numa_add_cpu(cpu, 0); + set_cpuid_to_node(cpuid, 0); } =20 loongson_sysconf.nr_cpus =3D num_processors; @@ -468,6 +470,7 @@ void smp_prepare_boot_cpu(void) set_cpu_possible(0, true); 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Wed, 22 May 2024 18:02:26 -0400 (EDT) From: Jiaxun Yang Date: Wed, 22 May 2024 23:02:19 +0100 Subject: [PATCH v3 3/4] LoongArch: Fix entry point in image header Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240522-loongarch-booting-fixes-v3-3-25e77a8fc86e@flygoat.com> References: <20240522-loongarch-booting-fixes-v3-0-25e77a8fc86e@flygoat.com> In-Reply-To: <20240522-loongarch-booting-fixes-v3-0-25e77a8fc86e@flygoat.com> To: Huacai Chen , Binbin Zhou Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, Jiaxun Yang , stable@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2718; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=1Q2dN42Jc6XMY6IY/L+aUvZd2sXvflcnb4Ia2Z4YZuA=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhjS/7Jxq64gJLjukI86vDOl2slBnnsr0ONurWJ6vUy5KS 6+Fj6ejlIVBjItBVkyRJURAqW9D48UF1x9k/YGZw8oEMoSBi1MAJlIyheGfanbeOWkj11+9m86u aNxg0W9wUNiM4dkn++7khJrH58SMGRlWrZnXJfK2O1RxhVjF2ya5W/K+VRHSUpFLPCXzIk5lzmE CAA== X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Currently kernel entry in head.S is in DMW address range, firmware is instructed to jump to this address after loading the image. However kernel should not make any assumption on firmware's DMW setting, thus the entry point should be a physical address falls into direct translation region. Fix by converting entry address to physical and amend entry calculation logic in libstub accordingly. Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang --- v2: Fix efistub v3: Move calculation to linker script --- arch/loongarch/kernel/head.S | 2 +- arch/loongarch/kernel/vmlinux.lds.S | 2 ++ drivers/firmware/efi/libstub/loongarch.c | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S index c4f7de2e2805..2cdc1ea808d9 100644 --- a/arch/loongarch/kernel/head.S +++ b/arch/loongarch/kernel/head.S @@ -22,7 +22,7 @@ _head: .word MZ_MAGIC /* "MZ", MS-DOS header */ .org 0x8 - .dword kernel_entry /* Kernel entry point */ + .dword _kernel_entry_phys /* Kernel entry point (physical address) */ .dword _kernel_asize /* Kernel image effective size */ .quad PHYS_LINK_KADDR /* Kernel image load offset from start of RAM */ .org 0x38 /* 0x20 ~ 0x37 reserved */ diff --git a/arch/loongarch/kernel/vmlinux.lds.S b/arch/loongarch/kernel/vm= linux.lds.S index e8e97dbf9ca4..c6f89e51257a 100644 --- a/arch/loongarch/kernel/vmlinux.lds.S +++ b/arch/loongarch/kernel/vmlinux.lds.S @@ -6,6 +6,7 @@ =20 #define PAGE_SIZE _PAGE_SIZE #define RO_EXCEPTION_TABLE_ALIGN 4 +#define TO_PHYS_MASK 0x000fffffffffffff /* 48-bit */ =20 /* * Put .bss..swapper_pg_dir as the first thing in .bss. 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Wed, 22 May 2024 18:02:28 -0400 (EDT) From: Jiaxun Yang Date: Wed, 22 May 2024 23:02:20 +0100 Subject: [PATCH v3 4/4] LoongArch: Override higher address bits in JUMP_VIRT_ADDR Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240522-loongarch-booting-fixes-v3-4-25e77a8fc86e@flygoat.com> References: <20240522-loongarch-booting-fixes-v3-0-25e77a8fc86e@flygoat.com> In-Reply-To: <20240522-loongarch-booting-fixes-v3-0-25e77a8fc86e@flygoat.com> To: Huacai Chen , Binbin Zhou Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, Jiaxun Yang , stable@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1077; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=7fdJBdzIPfqGGEwtcL8/d/uM5agRxxUtdOfdCs2glQQ=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhjS/7JzH9+Mblh89VqzPGryVL6GvdHpx3L/l74O2WUpn8 l5e+Kuyo5SFQYyLQVZMkSVEQKlvQ+PFBdcfZP2BmcPKBDKEgYtTACZylZGRobckVX7HaWZ9/R1T xa+/aO3u2JHWv5pNKPa+5+nbVvF1/Az/HaqOcHWFnP5vk/umifX3Hsl0oaBvzOc90uc/zrlht3U BLwA= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 In JUMP_VIRT_ADDR we are performing an or calculation on address value directly from pcaddi. This will only work if we are currently running from direct 1:1 mapping addresses or firmware's DMW is configured exactly same as kernel. Still, we should not rely on such assumption. Fix by overriding higher bits in address comes from pcaddi, so we can get rid of or operator. Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang --- v2: Overriding address with bstrins --- arch/loongarch/include/asm/stackframe.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/loongarch/include/asm/stackframe.h b/arch/loongarch/inclu= de/asm/stackframe.h index 45b507a7b06f..51dec8b17d16 100644 --- a/arch/loongarch/include/asm/stackframe.h +++ b/arch/loongarch/include/asm/stackframe.h @@ -42,7 +42,7 @@ .macro JUMP_VIRT_ADDR temp1 temp2 li.d \temp1, CACHE_BASE pcaddi \temp2, 0 - or \temp1, \temp1, \temp2 + bstrins.d \temp1, \temp2, (DMW_PABITS - 1), 0 jirl zero, \temp1, 0xc .endm =20 --=20 2.43.0