From nobody Wed Dec 17 05:52:15 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [167.172.40.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B6F51494A8 for ; Tue, 21 May 2024 20:28:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=167.172.40.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716323337; cv=none; b=b5F+f7EEgZYGgWpDDMlh29RZnKdp+Fluf/e/g7QYk3aE8HE58mVU1v+mSTOJ6vS1dX8u0felG4WVqRivuklNJ/1OdK6/IVS3pQDi/w0pTuvKpgtovQ+/5yrGL1TUb1JFSwftVm9OtVi5ann/6ApRt4PUfYzuUUp4bdY/IRgyDIw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716323337; c=relaxed/simple; bh=i9RtT9crBjtAme5G9mmfSOcopOxJUXbwe5ZvznIypVM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qL2nfudXmqABJ8NjBwxoWC0RvIOniczaOgTtCxTuPT82PgbNHhPKe5Yey7LjVrZdycGQWY/0RrzFvC6KnUQ2Y0FDaaHoCOSRRE5RrvNk6fgVe13pdllELAw1ejzqD2X7gYspvjg6ovxNWB4GxJnYzK5PoJanEUUZUq+Hx/nRFAk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=b4laSxmh; arc=none smtp.client-ip=167.172.40.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="b4laSxmh" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1716323304; bh=fcefaUUjcIVFz8cXLo03BezrzCivGislzB62c0WvQU0=; b=b4laSxmhyQ/5aQXtN8M9kEY7oRw+GMri4Sw+4HGzpCj46o0z6I43AiHJ//Dsdshc4DKZoMFaR 8Zp77mZr/VTxdVVqz0r6f9DdOI4SFZ8prV6KN4d0hvfyVtoma9b8xyUzYv2XvO3ZkhAWSuTp7Ek ZivYfPO02ctu8AVE/W+kLOzLLc000IqcvHHp3cSHpLB1kWwdLBVA3hE/U8mj7QXt4cvGnEN9L1z ez32KWO9yAZr+v3YF6sCVD2nJ36KoEj+rDV6Sw3ZCNgN4PVNX3VYw/ACfDZmFYvz9S0qIKFE3M8 6jlw1yTyx+X/a3LbbaJYaKHw8Zzu6DlVqjAJMMMmTRSw== From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman , Krzysztof Kozlowski Subject: [PATCH v6 1/2] dt-bindings: arm: rockchip: Add Radxa ZERO 3W/3E Date: Tue, 21 May 2024 20:28:04 +0000 Message-ID: <20240521202810.1225636-2-jonas@kwiboo.se> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240521202810.1225636-1-jonas@kwiboo.se> References: <20240521202810.1225636-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 167.172.40.54 X-ForwardEmail-ID: 664d03e4f0b0d6a409517482 Content-Type: text/plain; charset="utf-8" Add devicetree binding documentation for Radxa ZERO 3W/3E boards. The Radxa ZERO 3W/3E is an ultra-small, high-performance single board computer based on the Rockchip RK3566, with a compact form factor and rich interfaces. Signed-off-by: Jonas Karlman Acked-by: Krzysztof Kozlowski --- v2: Collect acked-by tag v3: Fix devicetree spelling v4: No change v5: No change v6: No change --- Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index e04c213a0dee..51cdaabaf0d9 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -814,6 +814,13 @@ properties: - const: radxa,rock-5b - const: rockchip,rk3588 =20 + - description: Radxa ZERO 3W/3E + items: + - enum: + - radxa,zero-3e + - radxa,zero-3w + - const: rockchip,rk3566 + - description: Rikomagic MK808 v1 items: - const: rikomagic,mk808 --=20 2.43.2 From nobody Wed Dec 17 05:52:15 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [167.172.40.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE4C91494A3 for ; Tue, 21 May 2024 20:28:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=167.172.40.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716323337; cv=none; b=ljUjFcE46yZG8oP1JLO2UVHITRMUymT/oiVlSjMYBx523dWmz5ZHpObvqahShrH8DJvO1sd7WIjgHV6H1sUxOftJpiPHXd492nQzHtdSbfWxGho9z87erxdIOOtWel0wctrhQl32G7Vl8WGYou7DRwA1sJ4A47wGBo7Ew/Y65Bc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716323337; c=relaxed/simple; bh=+gcCqtFBHUjnkdfzzwy3REo0zP8BWWLFTjVxz2OgfrY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SFGcszYW6UE+3jOpbFyj6n1uh/41vU+lZjglJyewCFDr+ThIpT7miys1T2BAVDrjX/KnUo8dko1QBinrZk6Yg3xme4Fxc0NwxEeJ9LiXZm9HfuNxvjEtwwwU5il7XyvFQREskJxgQouv2Wc8tNXBQnfUTEOZEqGXuSAuMgvyOY0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=x1vyGnkk; arc=none smtp.client-ip=167.172.40.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="x1vyGnkk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1716323309; bh=bWB10obCZAx4jsv1A5oLpdfkNk51jOWJXKfQSuu8ZGA=; b=x1vyGnkkmUrllBFitq4jjmBICqpjMXsz5pzfJqMkqluAH77VXZIz+ePCVO/GPgmwmNKDlyb4s TGdap8RUIetzaGZtAVm60kQcM0K/sCVm6pHt8HBZXgws7NdXzf6zWswc9wp0GnQTp6vtZWNkdeG kCne8gUvfq78iTLLrNGUMw8J1XZUTeUT+AEBDQW1I2N/iIx6C5ihW06d7PdfYv/MxYTcmkSR1sR pAvc9XXAjXFlTgy+ADhli1gbkX6KlkpxKcPUe3JnD36kaogh/pHyjrxf3neWzO4KsEoMX8u9LVr LXrui/fUnFFE4l6KEzSKOQspgehhRtEb/gCAuUM3SVpQ== From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH v6 2/2] arm64: dts: rockchip: Add Radxa ZERO 3W/3E Date: Tue, 21 May 2024 20:28:05 +0000 Message-ID: <20240521202810.1225636-3-jonas@kwiboo.se> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240521202810.1225636-1-jonas@kwiboo.se> References: <20240521202810.1225636-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 167.172.40.54 X-ForwardEmail-ID: 664d03eaf0b0d6a409517494 Content-Type: text/plain; charset="utf-8" The Radxa ZERO 3W/3E is an ultra-small, high-performance single board computer based on the Rockchip RK3566, with a compact form factor and rich interfaces. The ZERO 3W and ZERO 3E are basically the same size and model, but differ only in storage and network interfaces. - eMMC (3W) - SD-card (both) - Ethernet (3E) - WiFi/BT (3W) Add initial support for eMMC, SD-card, Ethernet, HDMI and USB. Signed-off-by: Jonas Karlman --- v2: Add to Makefile v3: Sort hdmi-con and leds nodes alphabetically v3: Sort pmic@20 and regulator@40 nodes by reg v3: Change to regulator-off-in-suspend for vdd_logic v4: Change compatible of vdd_logic v4: Add vcc5v_midu and vbus regulator and related vcc8/vcc9-supply prop v4: Adjust clock_in_out prop for gmac1 v4: Add cap-mmc-highspeed prop to sdhci v4: Add sdmmc1 and uart1 nodes used for wifi/bt on 3W v4: Rename rk3566-radxa-zero3.dtsi to rk3566-radxa-zero-3.dtsi v4: Rebase on latest mmind/for-next tree v5: Rename regulator-fixed nodes v5: Add keep-power-in-suspend to sdmmc1 node v5: Add uart-has-rtscts to uart1 node v6: Use imperative wording in commit message=20 v6: Move led-green pinctrl props to gpio-leds node v6: Add pinctrl props to ethernet-phy node v6: Add no-mmc/no-sd/no-sdio props to sdhci/sdmmc0 nodes --- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-radxa-zero-3.dtsi | 463 ++++++++++++++++++ .../dts/rockchip/rk3566-radxa-zero-3e.dts | 51 ++ .../dts/rockchip/rk3566-radxa-zero-3w.dts | 91 ++++ 4 files changed, 607 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index c544ff507d20..1a4b154121fa 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -90,6 +90,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-powkiddy-x55.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-quartz64-b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-radxa-cm3-io.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-radxa-zero-3e.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-radxa-zero-3w.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-rock-3c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-soquartz-blade.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi b/arch/a= rm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi new file mode 100644 index 000000000000..623d5939d194 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi @@ -0,0 +1,463 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include +#include +#include +#include "rk3566.dtsi" + +/ { + aliases { + mmc0 =3D &sdmmc0; + }; + + chosen { + stdout-path =3D "serial2:1500000n8"; + }; + + hdmi-con { + compatible =3D "hdmi-connector"; + type =3D "d"; + + port { + hdmi_con_in: endpoint { + remote-endpoint =3D <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&user_led2>; + + led-green { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_HEARTBEAT; + gpios =3D <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + }; + + vcc_1v8: regulator-1v8-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_p>; + }; + + vcca_1v8: regulator-1v8-vcca { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_p>; + }; + + vcca1v8_image: regulator-1v8-vcca-image { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcca1v8_image"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_p>; + }; + + vcc_3v3: regulator-3v3-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc3v3_sys>; + }; + + vcc_sys: regulator-5v0-vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; +}; + +&combphy1 { + status =3D "okay"; +}; + +&cpu0 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_cpu>; +}; + +&gpu { + mali-supply =3D <&vdd_gpu_npu>; + status =3D "okay"; +}; + +&hdmi { + avdd-0v9-supply =3D <&vdda_0v9>; + avdd-1v8-supply =3D <&vcca1v8_image>; + status =3D "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint =3D <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status =3D "okay"; +}; + +&i2c0 { + status =3D "okay"; + + rk817: pmic@20 { + compatible =3D "rockchip,rk817"; + reg =3D <0x20>; + #clock-cells =3D <1>; + clock-output-names =3D "rk817-clkout1", "rk817-clkout2"; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int_l>; + system-power-controller; + wakeup-source; + + vcc1-supply =3D <&vcc_sys>; + vcc2-supply =3D <&vcc_sys>; + vcc3-supply =3D <&vcc_sys>; + vcc4-supply =3D <&vcc_sys>; + vcc5-supply =3D <&vcc_sys>; + vcc6-supply =3D <&vcc_sys>; + vcc7-supply =3D <&vcc_sys>; + vcc8-supply =3D <&vcc_sys>; + vcc9-supply =3D <&vcc5v_midu>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vdd_gpu_npu: DCDC_REG2 { + regulator-name =3D "vdd_gpu_npu"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v3_sys: DCDC_REG4 { + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-name =3D "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name =3D "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name =3D "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name =3D "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name =3D "vccio_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name =3D "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcc_1v8_p: LDO_REG7 { + regulator-name =3D "vcc_1v8_p"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-name =3D "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-name =3D "vcc2v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc5v_midu: BOOST { + regulator-name =3D "vcc5v_midu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vbus: OTG_SWITCH { + regulator-name =3D "vbus"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu: regulator@40 { + compatible =3D "rockchip,rk8600"; + reg =3D <0x40>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <712500>; + regulator-max-microvolt =3D <1390000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2s0_8ch { + status =3D "okay"; +}; + +&pinctrl { + leds { + user_led2: user-led2 { + rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins =3D <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply =3D <&vcc3v3_pmu>; + pmuio2-supply =3D <&vcca1v8_pmu>; + vccio1-supply =3D <&vccio_acodec>; + vccio2-supply =3D <&vcc_1v8>; + vccio3-supply =3D <&vccio_sd>; + vccio4-supply =3D <&vcc_1v8>; + vccio5-supply =3D <&vcc_3v3>; + vccio6-supply =3D <&vcc_3v3>; + vccio7-supply =3D <&vcc_3v3>; + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcca_1v8>; + status =3D "okay"; +}; + +&sdmmc0 { + bus-width =3D <4>; + cap-sd-highspeed; + disable-wp; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + vmmc-supply =3D <&vcc3v3_sys>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode =3D <1>; + rockchip,hw-tshut-polarity =3D <0>; + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&usb_host0_xhci { + dr_mode =3D "peripheral"; + status =3D "okay"; +}; + +&usb_host1_xhci { + status =3D "okay"; +}; + +&usb2phy0 { + status =3D "okay"; +}; + +&usb2phy0_host { + status =3D "okay"; +}; + +&usb2phy0_otg { + status =3D "okay"; +}; + +&vop { + assigned-clocks =3D <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents =3D <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi_in_vp0>; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts b/arch/a= rm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts new file mode 100644 index 000000000000..e166d66990b9 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3566-radxa-zero-3.dtsi" + +/ { + model =3D "Radxa ZERO 3E"; + compatible =3D "radxa,zero-3e", "rockchip,rk3566"; + + aliases { + ethernet0 =3D &gmac1; + }; +}; + +&gmac1 { + assigned-clocks =3D <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents =3D <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_= 2TOP>; + clock_in_out =3D "input"; + phy-handle =3D <&rgmii_phy1>; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&vcc_3v3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus + &gmac1m1_clkinout>; + status =3D "okay"; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_rstn>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <50000>; + reset-gpios =3D <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + gmac1 { + gmac1_rstn: gmac1-rstn { + rockchip,pins =3D <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts b/arch/a= rm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts new file mode 100644 index 000000000000..9bf4f464915f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3566-radxa-zero-3.dtsi" + +/ { + model =3D "Radxa ZERO 3W"; + compatible =3D "radxa,zero-3w", "rockchip,rk3566"; + + aliases { + mmc1 =3D &sdhci; + mmc2 =3D &sdmmc1; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + clocks =3D <&rk817 1>; + clock-names =3D "ext_clock"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_reg_on_h>; + post-power-on-delay-ms =3D <100>; + power-off-delay-us =3D <5000000>; + reset-gpios =3D <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + bluetooth { + bt_reg_on_h: bt-reg-on-h { + rockchip,pins =3D <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_host_h: bt-wake-host-h { + rockchip,pins =3D <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + host_wake_bt_h: host-wake-bt-h { + rockchip,pins =3D <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifi { + wifi_reg_on_h: wifi-reg-on-h { + rockchip,pins =3D <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wifi_wake_host_h: wifi-wake-host-h { + rockchip,pins =3D <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sdhci { + bus-width =3D <8>; + cap-mmc-highspeed; + max-frequency =3D <200000000>; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdmmc1 { + bus-width =3D <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq =3D <&sdio_pwrseq>; + no-mmc; + no-sd; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&uart1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; + uart-has-rtscts; + status =3D "okay"; +}; --=20 2.43.2