From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7BE389475 for ; Mon, 20 May 2024 22:46:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245197; cv=none; b=ny1nu1R4I5NSFiweE+JPqWOmW1qsv4jo/KuB749EflYUHeQqlaUQeQ4KkWtEPTYMUoGBZreoYKuREqu4EuWnnZZqw+ueYcN6F3RgIaJaRU0SGV9l/llp+VQute+f+VsVSwsbS7ZpCDxgO+twvlzmge7qG6UzHZV+jH48OJxqcq4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245197; c=relaxed/simple; bh=kIehCYoVRHdNFqIBmNYxgDHHhCKlxbzEjpk5eAB0vUE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aHnn0Yi8yxqu4HRkJQAIKWqfbh3QkhtYIfrgBw/GvdmUx/rO/cnlGH6SuXx4oh73UXOimK4hsf9oV6YKjso0kM5eay1Up6TcdbSIKvFDN+3ul/Hk2rS9M0Timi8qPGxWTpR3qn3rYeCfEorwc1VtKKNFDhY2YawmMGDiZWhiIeM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=bh+JK/xw; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="bh+JK/xw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245196; x=1747781196; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kIehCYoVRHdNFqIBmNYxgDHHhCKlxbzEjpk5eAB0vUE=; b=bh+JK/xw3fJLQlk7cDEmaXIxGOvk8VrLdE//aLRy4lszdqvfwRyIecKk jUnM4Xx/iKmOK1sk74QxOVAkMLOVPfbssqcFxtdjGZbm6pZZdAzzcUCpU BClpfCF2vq85aiICeyiXPDqn1kj9OMWNemp+9h4+ZxX+cK3HvZDYhBIIt cNtkaleQg2FCixRxnYbyzB/bguwoskYwdurp/wwK8yfyQJ17OQm/KeiFu WW2Iz2JHmFwerbWow/mmXEZ5IDWczvj1tn7Og3rDyuHoN9ND7Tzpx89Mo IQh+VphtNoUhc3uacMZtnw/6DfVX13jGfbzbNX/a/SaBkY0YHERP6Ofi8 g==; X-CSE-ConnectionGUID: STPuWpKxR2u18Q/UTy+Mjg== X-CSE-MsgGUID: x62QIYI8Q+uUlVhYPz1vrA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199506" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199506" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 X-CSE-ConnectionGUID: 7zCOw3olTjmXtHS6hd08jg== X-CSE-MsgGUID: Uc5pQ15xRMCSMMfd0vta5w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593382" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 01/49] crypto: x86/aes-xts - Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:32 -0700 Message-ID: <20240520224620.9480-2-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Herbert Xu Reviewed-by: Eric Biggers --- arch/x86/crypto/aesni-intel_glue.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-int= el_glue.c index 5b25d2a58aeb..ef031655b2d3 100644 --- a/arch/x86/crypto/aesni-intel_glue.c +++ b/arch/x86/crypto/aesni-intel_glue.c @@ -1223,14 +1223,14 @@ DEFINE_XTS_ALG(vaes_avx10_512, "xts-aes-vaes-avx10_= 512", 800); * implementation with ymm registers (256-bit vectors) will be used instea= d. */ static const struct x86_cpu_id zmm_exclusion_list[] =3D { - { .vendor =3D X86_VENDOR_INTEL, .family =3D 6, .model =3D INTEL_FAM6_SKYL= AKE_X }, - { .vendor =3D X86_VENDOR_INTEL, .family =3D 6, .model =3D INTEL_FAM6_ICEL= AKE_X }, - { .vendor =3D X86_VENDOR_INTEL, .family =3D 6, .model =3D INTEL_FAM6_ICEL= AKE_D }, - { .vendor =3D X86_VENDOR_INTEL, .family =3D 6, .model =3D INTEL_FAM6_ICEL= AKE }, - { .vendor =3D X86_VENDOR_INTEL, .family =3D 6, .model =3D INTEL_FAM6_ICEL= AKE_L }, - { .vendor =3D X86_VENDOR_INTEL, .family =3D 6, .model =3D INTEL_FAM6_ICEL= AKE_NNPI }, - { .vendor =3D X86_VENDOR_INTEL, .family =3D 6, .model =3D INTEL_FAM6_TIGE= RLAKE_L }, - { .vendor =3D X86_VENDOR_INTEL, .family =3D 6, .model =3D INTEL_FAM6_TIGE= RLAKE }, + X86_MATCH_VFM(INTEL_SKYLAKE_X, 0), + X86_MATCH_VFM(INTEL_ICELAKE_X, 0), + X86_MATCH_VFM(INTEL_ICELAKE_D, 0), + X86_MATCH_VFM(INTEL_ICELAKE, 0), + X86_MATCH_VFM(INTEL_ICELAKE_L, 0), + X86_MATCH_VFM(INTEL_ICELAKE_NNPI, 0), + X86_MATCH_VFM(INTEL_TIGERLAKE_L, 0), + X86_MATCH_VFM(INTEL_TIGERLAKE, 0), /* Allow Rocket Lake and later, and Sapphire Rapids and later. */ /* Also allow AMD CPUs (starting with Zen 4, the first with AVX-512). */ {}, --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91BE43CF4E for ; Mon, 20 May 2024 22:46:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245198; cv=none; b=ls5I7WUAtXEB+d4iZm9VYFeo3SCxH8s+Sp2wMTMifMN/dVzqO3hJ0zpvomM8/SGkpB/z2D/MLaUnstLmnL3vfzTKLpPlPrwM0TWRqsEyJi80qn+Y/5/D8uGCDE02K0jutiGJIWCMrHCn0COmbfzRnkeLv2szHaVvVydRTjm7q+c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245198; c=relaxed/simple; bh=vRJh5U/RrkSoxKq+4A8MOsjvcQxfmvO221sw5F6FSYo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bW2d4Q7QtsHp4/dX0XYZe1s55jOFplUyF7b3R4MlH2b1ZgeVdzV4Kbx5lC9HGpzByrFLtAfMIW0wktBl6L18oJJwgEPoYz9pGcWD53G7O+rqRNcsW/ho1zwSKcsndGWWLYfst5f9/5bJ/qBdvoIjkOXJvtsZea6WxMLPOmyrquQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hYmutMpv; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hYmutMpv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245197; x=1747781197; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vRJh5U/RrkSoxKq+4A8MOsjvcQxfmvO221sw5F6FSYo=; b=hYmutMpvU1F9XboGJKPJsQvGVpNHUW+FkFsZbIDDRBnJbHG4bfvNnL63 y4kLyu0OnbZ249/EjF0zdYi2A6lCGy1QZW43Iy4+L0dhJxlNwyuudYAYJ CQspIIQcVLJzN4QTJSwgv8jyhYgYLIglp37h5Bahmjx3YMDTrDv1K3oUK Fnj7iKy9+yYGtmzkFDhgKo+9W3akCVWZ+V8GB5192lx1A0B/aoW6JRIRY sZJZEoQtevOtHfWyQI/gIO9tEgHoHGuXm1hLf3e6mys+W8+5dTY9KKB1s PfzpKClNAI9KV4BbagXomewTOIDN/GvF5hHJoTLZriVK8cUtNOaqzExQ6 w==; X-CSE-ConnectionGUID: OHiXg6FNR3WBmZkcwWeMBQ== X-CSE-MsgGUID: 95BonpAGRG6DkQFVJaRcRQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199517" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199517" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 X-CSE-ConnectionGUID: nDQUglqpRWGxPfR1FM+c6g== X-CSE-MsgGUID: JPlKipRZQrSH5KHl65q4YQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593386" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 02/49] x86/cpu: Fix x86_match_cpu() to match just X86_VENDOR_INTEL Date: Mon, 20 May 2024 15:45:33 -0700 Message-ID: <20240520224620.9480-3-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Code in v6.9 arch/x86/kernel/smpboot.c was changed by commit 4db64279bc2b ("x86/cpu: Switch to new Intel CPU model defines") from old code: 440 static const struct x86_cpu_id intel_cod_cpu[] =3D { 441 X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, 0), /* COD */ 442 X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, 0), /* COD */ 443 X86_MATCH_INTEL_FAM6_MODEL(ANY, 1), /* SNC */ 444 {} 445 }; 446 447 static bool match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) 448 { 449 const struct x86_cpu_id *id =3D x86_match_cpu(intel_cod_cpu); new code: 440 static const struct x86_cpu_id intel_cod_cpu[] =3D { 441 X86_MATCH_VFM(INTEL_HASWELL_X, 0), /* COD */ 442 X86_MATCH_VFM(INTEL_BROADWELL_X, 0), /* COD */ 443 X86_MATCH_VFM(INTEL_ANY, 1), /* SNC */ 444 {} 445 }; 446 447 static bool match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) 448 { 449 const struct x86_cpu_id *id =3D x86_match_cpu(intel_cod_cpu); On an Intel CPU with SNC enabled this code previously matched the rule on line 443 to avoid printing messages about insane cache configuration. The new code did not match any rules. Expanding the macros for the intel_cod_cpu[] array shows that the old is equivalent to: static const struct x86_cpu_id intel_cod_cpu[] =3D { [0] =3D { .vendor =3D 0, .family =3D 6, .model =3D 0x3F, .steppings =3D 0, = .feature =3D 0, .driver_data =3D 0 }, [1] =3D { .vendor =3D 0, .family =3D 6, .model =3D 0x4F, .steppings =3D 0, = .feature =3D 0, .driver_data =3D 0 }, [2] =3D { .vendor =3D 0, .family =3D 6, .model =3D 0x00, .steppings =3D 0, = .feature =3D 0, .driver_data =3D 1 }, [3] =3D { .vendor =3D 0, .family =3D 0, .model =3D 0x00, .steppings =3D 0, = .feature =3D 0, .driver_data =3D 0 } } while the new code expands to: static const struct x86_cpu_id intel_cod_cpu[] =3D { [0] =3D { .vendor =3D 0, .family =3D 6, .model =3D 0x3F, .steppings =3D 0, = .feature =3D 0, .driver_data =3D 0 }, [1] =3D { .vendor =3D 0, .family =3D 6, .model =3D 0x4F, .steppings =3D 0, = .feature =3D 0, .driver_data =3D 0 }, [2] =3D { .vendor =3D 0, .family =3D 0, .model =3D 0x00, .steppings =3D 0, = .feature =3D 0, .driver_data =3D 1 }, [3] =3D { .vendor =3D 0, .family =3D 0, .model =3D 0x00, .steppings =3D 0, = .feature =3D 0, .driver_data =3D 0 } } Looking at the code for x86_match_cpu(): 36 const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id *match) 37 { 38 const struct x86_cpu_id *m; 39 struct cpuinfo_x86 *c =3D &boot_cpu_data; 40 41 for (m =3D match; 42 m->vendor | m->family | m->model | m->steppings | m->featu= re; 43 m++) { ... 56 } 57 return NULL; 58 } 59 EXPORT_SYMBOL(x86_match_cpu); it is clear that there was no match because the ANY entry in the table (array index 2) is now the loop termination condition (all of vendor, family, model, steppings, and feature are zero). So this code was working before because the "ANY" check was looking for any Intel CPU in family 6. But fails now because the family is a wild card. So the root cause is that x86_match_cpu() has never been able to match on a rule with just X86_VENDOR_INTEL and all other fields set to wildcards. Fix by adding a new flags field to struct x86_cpu_id that has a bit set to indicate that this entry in the array is valid. Update X86_MATCH*() macros to set that bit. Chenge the end-marker check in x86_match_cpu() to just check the flags field for this bit. Suggested-by: Thomas Gleixner Suggested-by: Borislav Petkov Fixes: 644e9cbbe3fc ("Add driver auto probing for x86 features v4") Signed-off-by: Tony Luck --- --- include/linux/mod_devicetable.h | 4 ++++ arch/x86/include/asm/cpu_device_id.h | 2 ++ arch/x86/kernel/cpu/match.c | 4 +--- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetabl= e.h index 7a9a07ea451b..ca3468ad06ff 100644 --- a/include/linux/mod_devicetable.h +++ b/include/linux/mod_devicetable.h @@ -690,6 +690,7 @@ struct x86_cpu_id { __u16 model; __u16 steppings; __u16 feature; /* bit index */ + __u16 flags; kernel_ulong_t driver_data; }; =20 @@ -700,6 +701,9 @@ struct x86_cpu_id { #define X86_STEPPING_ANY 0 #define X86_FEATURE_ANY 0 /* Same as FPU, you can't test for that */ =20 +/* x86_cpu_id::flags */ +#define X86_CPU_ID_FLAG_ENTRY_VALID BIT(0) + /* * Generic table type for matching CPU features. * @feature: the bit number of the feature (0 - 65535) diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cp= u_device_id.h index 970a232009c3..54a71c669ce9 100644 --- a/arch/x86/include/asm/cpu_device_id.h +++ b/arch/x86/include/asm/cpu_device_id.h @@ -79,6 +79,7 @@ .model =3D _model, \ .steppings =3D _steppings, \ .feature =3D _feature, \ + .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, \ .driver_data =3D (unsigned long) _data \ } =20 @@ -89,6 +90,7 @@ .model =3D _model, \ .steppings =3D _steppings, \ .feature =3D _feature, \ + .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, \ .driver_data =3D (unsigned long) _data \ } =20 diff --git a/arch/x86/kernel/cpu/match.c b/arch/x86/kernel/cpu/match.c index 8651643bddae..8e7de733320a 100644 --- a/arch/x86/kernel/cpu/match.c +++ b/arch/x86/kernel/cpu/match.c @@ -38,9 +38,7 @@ const struct x86_cpu_id *x86_match_cpu(const struct x86_c= pu_id *match) const struct x86_cpu_id *m; struct cpuinfo_x86 *c =3D &boot_cpu_data; =20 - for (m =3D match; - m->vendor | m->family | m->model | m->steppings | m->feature; - m++) { + for (m =3D match; m->flags & X86_CPU_ID_FLAG_ENTRY_VALID; m++) { if (m->vendor !=3D X86_VENDOR_ANY && c->x86_vendor !=3D m->vendor) continue; if (m->family !=3D X86_FAMILY_ANY && c->x86 !=3D m->family) --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA6901CD32 for ; Mon, 20 May 2024 22:46:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245199; cv=none; b=cGMR/srut/87DllwwSs0B+qoUYdBF57CaZuV0I3HhlPMcuSPYtiJZ98kDu0HpIJUZZZNb82pnCMeg6jh4F5+SCKYiuRJ0jHssrQNrwnlw/rIozOEb2oXUr6aG24eWy3Hmn/S22dtSWTET75y2Ng77MTwQBXP+VxWLdSDqVyXZBE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245199; c=relaxed/simple; bh=v93/ual/g32vB/MEMraEt8b9ts3LdceCjM3EwpB5y20=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kLP3sHlk1rpb7iD/iDLBzgN0AJzpYC5sHZN3jnpGfMIE0GthE0RIBu+6gqg9lPw16H/NWd+WImdnkPoLBhg9oyZZOabg3fHWJm3PKZrj91VH/z6oPhbZFJ/wi9rN182EssGw7O1Lt3e7C8NAXlgrLeM6+ME3RgJ5yMutnWkwRxQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=X5PLBLSt; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="X5PLBLSt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245198; x=1747781198; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=v93/ual/g32vB/MEMraEt8b9ts3LdceCjM3EwpB5y20=; b=X5PLBLSt6bj52vVFsHTH6qm5+95UU3cMqa2Imhbg6mdmNUyfEymoJ/mK NyYl0MsqTRsdWbJkae131ySB6Xmua0k/W43uF3J+Ew5mlOw/xDnsCsY0L thWyIwb/zDaRQkfvg9QtudnAv5h2azGmRzz8BDNB1eJwyEbz5TtwFSopo 1hQrnWP4ZL3J6b9LUvM1UbiomXPLExtk6lDAXwZeG8yIGd6khpshDCMlY NVyf1iEYwN5cZmAqXMlRTsDoDmUL5aUD+ZX/mlJbZxlq1Y54lWHXzv6bm WRi0MelsqRRHoaXggYzxuAtVFimTRRWBMgdSrc9t1Pe4sU0cmCa8q3/Db A==; X-CSE-ConnectionGUID: ejzUp/NKT42jj1ryMCs45Q== X-CSE-MsgGUID: U/9F5LWzQGiZQymKEEMeuw== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199529" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199529" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 X-CSE-ConnectionGUID: 8wuCngyrRqutNflgnQSAEA== X-CSE-MsgGUID: /viPDrVoQp+zeZMF0zFKDQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593389" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Jarkko Sakkinen Subject: [PATCH v6 03/49] tpm: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:34 -0700 Message-ID: <20240520224620.9480-4-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Reviewed-by: Jarkko Sakkinen --- drivers/char/tpm/tpm.h | 2 +- drivers/char/tpm/tpm_tis_core.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index 6b8b9956ba69..7bb87fa5f7a1 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h @@ -28,7 +28,7 @@ #include =20 #ifdef CONFIG_X86 -#include +#include #endif =20 #define TPM_MINOR 224 /* officially assigned */ diff --git a/drivers/char/tpm/tpm_tis_core.h b/drivers/char/tpm/tpm_tis_cor= e.h index 13e99cf65efe..690ad8e9b731 100644 --- a/drivers/char/tpm/tpm_tis_core.h +++ b/drivers/char/tpm/tpm_tis_core.h @@ -210,7 +210,7 @@ static inline int tpm_tis_verify_crc(struct tpm_tis_dat= a *data, size_t len, static inline bool is_bsw(void) { #ifdef CONFIG_X86 - return ((boot_cpu_data.x86_model =3D=3D INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0); + return (boot_cpu_data.x86_vfm =3D=3D INTEL_ATOM_AIRMONT) ? 1 : 0; #else return false; #endif --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5DBDF137C3C for ; Mon, 20 May 2024 22:46:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245201; cv=none; b=BGfQAAS06dLB4FkrEfTwz8tB7/ieGZAf1RLfJmPLlzfpBDW+MEzfybO5vQmvErfnRl0CFL1bN7YfZrmnqE+AhW9Z/kVs4Rehqhizet9/wptAMVswhimMBTa7Y4a2GM40V6w7lAW4DLD+crnsG549B+CK6IYfG7V2xlGx7VZ+Mr0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245201; c=relaxed/simple; bh=fAvicYEUo7N506OzcEwxkas4C1y1eHYtbiBB7lA+htE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=a7ft+AVVzS45+LD5f0y5pcEJDkeENBk5Twxxk3kOEeOEPewdbuyXQZcdTnxapivkjO511ED8dD3H2y4wBX91nA9t5vFWx6EaHD+qKr6SKhGqxMpoYTHhijeoSPIy2Xh9zvRqU62U7LpinlZgIPL0VhPEDOlfaLnUZ8RsWFMAfjY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=n6YBzOKt; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="n6YBzOKt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245199; x=1747781199; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fAvicYEUo7N506OzcEwxkas4C1y1eHYtbiBB7lA+htE=; b=n6YBzOKtxLScgCwFa++2zN1RekVqtCT1FX+2SfM9yef9a4xeNrKy8MZY 6ko6zOGsWD0jVzlek5svosf4OOaHAK1eJFhOz6VzV+2quensDWsCU0FwU UFgVfSRIVmyr3AVI6Eepe1a9SeJLnJ0qnsSEdyg5hBF8j8yeD141A7Y/2 yZkWyShDn5XeuIAy+qqD6wbRuWXUob1BWtLDg43cNjjHIWcuqHq6chvRT sO6qoVZq5AfpIXsC+KKsq+SuGjiBxCQL12cGCEndC5aq8uJAWApwoP4Vq oBLkbovwiB65pywVENcRBEWR+bS9SUOWFGZl02G1fDq+z7PGsm/tz8SFC w==; X-CSE-ConnectionGUID: r4Xuh2dpQMiHBAVOHvelSg== X-CSE-MsgGUID: FhwyzfWgQNupO2JevXvdpQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199540" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199540" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 X-CSE-ConnectionGUID: BvlCwA5NSc6OcdylUaJZ4Q== X-CSE-MsgGUID: MVc/I4PNQpijetxDdSbbUw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593392" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Jithu Joseph , Kuppuswamy Sathyanarayanan , Hans de Goede Subject: [PATCH v6 04/49] platform/x86/intel/ifs: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:35 -0700 Message-ID: <20240520224620.9480-5-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Reviewed-by: Jithu Joseph Reviewed-by: Kuppuswamy Sathyanarayanan Acked-by: Hans de Goede --- drivers/platform/x86/intel/ifs/core.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/platform/x86/intel/ifs/core.c b/drivers/platform/x86/i= ntel/ifs/core.c index 7b11198d85a1..33412a584836 100644 --- a/drivers/platform/x86/intel/ifs/core.c +++ b/drivers/platform/x86/intel/ifs/core.c @@ -11,16 +11,15 @@ =20 #include "ifs.h" =20 -#define X86_MATCH(model, array_gen) \ - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, \ - INTEL_FAM6_##model, X86_FEATURE_CORE_CAPABILITIES, array_gen) +#define X86_MATCH(vfm, array_gen) \ + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_CORE_CAPABILITIES, array_gen) =20 static const struct x86_cpu_id ifs_cpu_ids[] __initconst =3D { - X86_MATCH(SAPPHIRERAPIDS_X, ARRAY_GEN0), - X86_MATCH(EMERALDRAPIDS_X, ARRAY_GEN0), - X86_MATCH(GRANITERAPIDS_X, ARRAY_GEN0), - X86_MATCH(GRANITERAPIDS_D, ARRAY_GEN0), - X86_MATCH(ATOM_CRESTMONT_X, ARRAY_GEN1), + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, ARRAY_GEN0), + X86_MATCH(INTEL_EMERALDRAPIDS_X, ARRAY_GEN0), + X86_MATCH(INTEL_GRANITERAPIDS_X, ARRAY_GEN0), + X86_MATCH(INTEL_GRANITERAPIDS_D, ARRAY_GEN0), + X86_MATCH(INTEL_ATOM_CRESTMONT_X, ARRAY_GEN1), {} }; MODULE_DEVICE_TABLE(x86cpu, ifs_cpu_ids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 548405026E for ; Mon, 20 May 2024 22:46:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245200; cv=none; b=iEJcU4HvoH/I/+j0k4FothThbZVCWgJpcX0DKBvi92LVAbHT/4eDNbnaV1qplguv6AbMJGTUGUddHGhDjPA0lpcNFCgwuKtrAA3VNtEQEgzWJY4trr1SMlLQNKsJ5wGc4QGUIxo/tPC3gvmlTRue7Tdtfg75vFMnBaLuzRXMnG8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245200; c=relaxed/simple; bh=R7lJm8y1wTPr9sOO4og3VXb29EESiuJx3kDAU5wPuLo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Yv6zr5klD8s9w5aUhPtPiAZRNzBGwm/3FNzdMu95Zg2M7rNEnZlBv+PYodKnRHyMtya8221rj8QvVOjNKgxv75Ag5iz7zgRRcCYKuLIEuqqA0bQjm2tk03VRSAAdUWgpmJfp0pggLKNwu06jM3CGGfZl/C/AKvbFXNyLoUlunfE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=esvVkENu; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="esvVkENu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245198; x=1747781198; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=R7lJm8y1wTPr9sOO4og3VXb29EESiuJx3kDAU5wPuLo=; b=esvVkENuTE25h1bd6mfotyTf34BPPsdEryy214C3S58V+n8SH3qdnq7U kXgtG64jUvg3cAtLwxVY+auw3NyqC93FqSMsdlkxLwfp7iH0b2hv1oVaY 4xmVBGl+ELXgyXvNgX/ikJZI4Ij7EGWObGCJxpRQLDGdc0vUTm33Pg14O GmQTxQiNBFfFBBwXMmCPHu0XUkdlTyqywPvQBBPgLY1wvHJC5yoAFgGBb Ck0+XyQfQHhkt4pJGVPM1hGAIhXcH2NMfGoKu6A92UvGyZP3SoFj7miBE lxaG3QL8m+L6c+HgsYV98UbIzajo2eEFGisSFXo4T23BbRAiWhalVxjxG w==; X-CSE-ConnectionGUID: w3IDjXf+QQmeHTogPp8/6Q== X-CSE-MsgGUID: PBNf28dIRDKP3Yb30IWBTA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199551" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199551" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 X-CSE-ConnectionGUID: m5auZqylSLesyZVyyHIuXg== X-CSE-MsgGUID: Q5vCGZJGRheBZu3aCQ6ysQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593396" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Andy Shevchenko , Hans de Goede Subject: [PATCH v6 05/49] media: atomisp: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:36 -0700 Message-ID: <20240520224620.9480-6-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Reviewed-by: Andy Shevchenko Acked-by: Hans de Goede --- .../atomisp/include/linux/atomisp_platform.h | 27 ++++++++----------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/drivers/staging/media/atomisp/include/linux/atomisp_platform.h= b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h index 0e3f6fb78483..fdeb247036b0 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp_platform.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h @@ -18,7 +18,7 @@ #ifndef ATOMISP_PLATFORM_H_ #define ATOMISP_PLATFORM_H_ =20 -#include +#include #include =20 #include @@ -178,22 +178,17 @@ void atomisp_unregister_subdev(struct v4l2_subdev *su= bdev); int v4l2_get_acpi_sensor_info(struct device *dev, char **module_id_str); =20 /* API from old platform_camera.h, new CPUID implementation */ -#define __IS_SOC(x) (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_INTEL && \ - boot_cpu_data.x86 =3D=3D 6 && \ - boot_cpu_data.x86_model =3D=3D (x)) -#define __IS_SOCS(x,y) (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_INTEL &= & \ - boot_cpu_data.x86 =3D=3D 6 && \ - (boot_cpu_data.x86_model =3D=3D (x) || \ - boot_cpu_data.x86_model =3D=3D (y))) - -#define IS_MFLD __IS_SOC(INTEL_FAM6_ATOM_SALTWELL_MID) -#define IS_BYT __IS_SOC(INTEL_FAM6_ATOM_SILVERMONT) -#define IS_CHT __IS_SOC(INTEL_FAM6_ATOM_AIRMONT) -#define IS_MRFD __IS_SOC(INTEL_FAM6_ATOM_SILVERMONT_MID) -#define IS_MOFD __IS_SOC(INTEL_FAM6_ATOM_AIRMONT_MID) +#define __IS_SOC(x) (boot_cpu_data.x86_vfm =3D=3D x) +#define __IS_SOCS(x, y) (boot_cpu_data.x86_vfm =3D=3D x || boot_cpu_data.x= 86_vfm =3D=3D y) + +#define IS_MFLD __IS_SOC(INTEL_ATOM_SALTWELL_MID) +#define IS_BYT __IS_SOC(INTEL_ATOM_SILVERMONT) +#define IS_CHT __IS_SOC(INTEL_ATOM_AIRMONT) +#define IS_MRFD __IS_SOC(INTEL_ATOM_SILVERMONT_MID) +#define IS_MOFD __IS_SOC(INTEL_ATOM_AIRMONT_MID) =20 /* Both CHT and MOFD come with ISP2401 */ -#define IS_ISP2401 __IS_SOCS(INTEL_FAM6_ATOM_AIRMONT, \ - INTEL_FAM6_ATOM_AIRMONT_MID) +#define IS_ISP2401 __IS_SOCS(INTEL_ATOM_AIRMONT, \ + INTEL_ATOM_AIRMONT_MID) =20 #endif /* ATOMISP_PLATFORM_H_ */ --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B17CD1386D1 for ; Mon, 20 May 2024 22:46:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245201; cv=none; b=ZCXiz7rx616e4pKIANWBzlTDNrKl7OK8vLcrawaJEn/nPz7wEZL+nvYi60cCKtPi6/Wg59jz7iyHiFmO8guzV0tv0RjDEaV3lc7HipIvgEDtSFaSPQQpPgrZi/4HJ7FhK07B8/ep40xdMelKABL00vjymo8nqlqvYiSDq7/BejI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245201; c=relaxed/simple; bh=2WGXBVBs50TNH9MqDPwVlbQd0d4cA9xeNLapku5f+C0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=bvG4Z4x5tCwzGxeEjtcqFj8o8JjtCUSsV1oZkPxeFOuCZJ/K5X8uPskTtKLYzWTYzX800QlMkvprB7UHxq1x6PKsh88wuD5iD9aB6xOt2YhUaM8NwcmecV+Su5pCbPKhnKE25KtF2brYvvScMIqtGW1o/o6e/fROFjjXscCS9fg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OX1BLiem; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OX1BLiem" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245200; x=1747781200; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2WGXBVBs50TNH9MqDPwVlbQd0d4cA9xeNLapku5f+C0=; b=OX1BLiemrJfQGdde3/y+mdsJ/j8qjfplMV1nM8SjDIhz+tLTx311YJg6 RufSTHzCMTQ66wmcWL5mX6XNzaf4G0JhVN4vgbEz1fjkMtIVImBUj0YZn 9/yyN+JsGeudarSu+Q3HWMKQaBUR1NvkJfvr9fPzwE7TrIRsX0Teu5Ugz 6ze98Cien6W+l0zW9UgE6vK6634sA/hYOvVxwFGXTkNCUXuIN8NXQjXNb RPzNuvEw1q233Y8cRrQXC1zFtd5Qbevy5sOIPz0BL+VQireC+2B7avn/W wi28f3hHnx60+rkoGAT/rnUVgnwpzlfOlV1gT4OUnO0jp5Cl2+d3FENSu g==; X-CSE-ConnectionGUID: YRutO+4RTy2859xuV2PEWw== X-CSE-MsgGUID: i7778linS/Sr8TSrKzV+Xg== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199563" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199563" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 X-CSE-ConnectionGUID: ABs4mHaJTre9oLsrmJG6mA== X-CSE-MsgGUID: NqXET3QaRMmFL6XPYJa7/w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593399" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, =?UTF-8?q?Amadeusz=20S=C5=82awi=C5=84ski?= , Mark Brown Subject: [PATCH v6 06/49] ASoC: Intel: avs: es8336: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:37 -0700 Message-ID: <20240520224620.9480-7-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Reviewed-by: Amadeusz S=C5=82awi=C5=84ski Acked-by: Mark Brown --- sound/soc/intel/avs/boards/es8336.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/intel/avs/boards/es8336.c b/sound/soc/intel/avs/boar= ds/es8336.c index 3bf37a8fd6e6..c8522e2430f8 100644 --- a/sound/soc/intel/avs/boards/es8336.c +++ b/sound/soc/intel/avs/boards/es8336.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include "../utils.h" =20 #define ES8336_CODEC_DAI "ES8316 HiFi" @@ -153,9 +153,9 @@ static int avs_es8336_hw_params(struct snd_pcm_substrea= m *substream, int clk_freq; int ret; =20 - switch (boot_cpu_data.x86_model) { - case INTEL_FAM6_KABYLAKE_L: - case INTEL_FAM6_KABYLAKE: + switch (boot_cpu_data.x86_vfm) { + case INTEL_KABYLAKE_L: + case INTEL_KABYLAKE: clk_freq =3D 24000000; break; default: --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E734213956C for ; Mon, 20 May 2024 22:46:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245201; cv=none; b=idhATGpG9fJTrBdp/w4RuUFblyxHOc5fQyVTL5IIO1zFaZkVkIpjxOHNN2vGpbqQ+Ue+4DN0/DnbwAavuqg3Dl+rmNbTNvznpPvFfbYO54gEsrBOZoViwoGMJvTjr4wAJ/MygFKyWn7X0iVjT+MnHTS7qsLZ0HSfKtvkHasgM1s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245201; c=relaxed/simple; bh=uwrfu/RQXE+CPGny/VIfWFI+r++v83onQnRT6WNFLOM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Op7dnNSmfHN/jFyNsJbtc44cyZfHyYvJfKVHiliJPEEPo6q3vkvb+h6Oj8HHywyeQZO/5vzfXUF+k/EsyfxrH8IgEbtG69nzCJN6g6cy8qt9d8e9N+fQoPehDlbquArx0DT41iNUb0DCFN49KUMaWmCeyViRn5di74XwjDBT80E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CuHlyso7; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CuHlyso7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245200; x=1747781200; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uwrfu/RQXE+CPGny/VIfWFI+r++v83onQnRT6WNFLOM=; b=CuHlyso7t6bOM2ppRr9iWiuNZD695ScQ++i5O+dO18IaM94ygoFKLNs1 X1wBB2jKqllzCWUn4TLaaDKmbI+K22RWFjSYVAqOjj/ASAB8IRuBACvun Dj0ZRcenPkyH1rqKKDo7jdf7RjEow0EAOmbQLHASbHtq14AP0zL3goiRd WFjR8G3m8jFCg9dghm7TMX7I/eRPplowvxlBbtC+jA7cxK2auByDaqeE+ l/yXcAFXAWS7FP7/smBRpMIzRxo57pCTZAl/WGdKSWDoLIIoQXIGHtn55 1j7DVxGjDB0k8Dy/eU9CYJzqmcgCFkrw1XGgb9jCsVbBoiOxQGUw7EMii w==; X-CSE-ConnectionGUID: J2CvRVReQNG4LWnle8zqdQ== X-CSE-MsgGUID: 9RRd2de5RjmPCqlLppV9og== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199575" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199575" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 X-CSE-ConnectionGUID: ONS95sjIQoW2yWT/aoDaVQ== X-CSE-MsgGUID: EIlSKc9cRMeYwJ3xQJKG7w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593403" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:35 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Kuppuswamy Sathyanarayanan , Hans de Goede Subject: [PATCH v6 07/49] platform/x86: intel_scu_wdt: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:38 -0700 Message-ID: <20240520224620.9480-8-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Reviewed-by: Kuppuswamy Sathyanarayanan Acked-by: Hans de Goede --- drivers/platform/x86/intel_scu_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel_scu_wdt.c b/drivers/platform/x86/in= tel_scu_wdt.c index a5031a25632e..d0b6637861d3 100644 --- a/drivers/platform/x86/intel_scu_wdt.c +++ b/drivers/platform/x86/intel_scu_wdt.c @@ -50,7 +50,7 @@ static struct intel_mid_wdt_pdata tangier_pdata =3D { }; =20 static const struct x86_cpu_id intel_mid_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &tangier_pdata), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &tangier_pdata), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35C2613959D for ; Mon, 20 May 2024 22:46:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245201; cv=none; b=ZfgXRX1Q+N4Z1MooyWSLDtfXCzdpg6Y/jha1jWmZW844jdw6jpvqGROUk47nXsRcNUGimYDS3jy1f6t5PG4/nS42s9wYwkfxa6s6xG0T6OcqCYaxPt5Qw0O/u1t84+HmPFE5Wi7yiStnt8ZTFLJcOzDmf6fXrmuhk5ttb+LZBh8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245201; c=relaxed/simple; bh=XfoA0pauCDfOJgfi1sYfYTOnSD8UB46WDQ7JXbYpI7A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Le3ZAOUMZJKKFrIPuYOQflqSF0QbOEUsoCRfl5j/I+C0QAuYdklxYXzQ75NgovZRbJhsJVcY+hKPXAP8/ha9+/zOHlDhafhpF9ppRBJRpS334HUPWT1dopAT8dXRfYdnVmGsVvfHugrk15A40051SMEsXTxJWkQDFY6e5NAvzrI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Q4PTQcqH; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Q4PTQcqH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245200; x=1747781200; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XfoA0pauCDfOJgfi1sYfYTOnSD8UB46WDQ7JXbYpI7A=; b=Q4PTQcqHL13WpcFPFtADVerkpGhqE2lDLouEcH3oxjCRCcIT9wflp7ae QTuY0xzS9xl3WfCgeNxEt/sk83cnmp498udIS31Tajhry3izLfkkp2+Cs 7PvTkfyVbe6A+bgTNte5CuSX1Y5+FYmmVWq823sRxCML+Y8yT+DHOV/MI LTLDXFlRSPcXLHeIDhDgxsKXHSDpmdMhPc6q8TyiYk1KBlouUq1aGQvOt F2w1NT1aTz2NJrF8bsSlxXTm3i3LWDalvhKnL9IxhWVmlZ1hClC6ysHvf BdK7F2X6j5YaQMrQTVx8g8ilvzF0yVp2mzoqx66mH2FJKlEybnMlAzqWP Q==; X-CSE-ConnectionGUID: xrHK+r8fStOiQ1eCQCuwBg== X-CSE-MsgGUID: ErchC0pUSuaZPteKPQmcGQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199586" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199586" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 X-CSE-ConnectionGUID: khRuJN/sTaOQz/5AsH70ow== X-CSE-MsgGUID: jYiVDghcQ22y+MW9XAmbrg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593406" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Sean Christopherson Subject: [PATCH v6 08/49] KVM: x86/pmu: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:39 -0700 Message-ID: <20240520224620.9480-9-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Sean Christopherson --- arch/x86/kvm/pmu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index a593b03c9aed..938d01bede80 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -34,16 +34,16 @@ EXPORT_SYMBOL_GPL(kvm_pmu_eventsel); =20 /* Precise Distribution of Instructions Retired (PDIR) */ static const struct x86_cpu_id vmx_pebs_pdir_cpu[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, NULL), + X86_MATCH_VFM(INTEL_ICELAKE_D, NULL), + X86_MATCH_VFM(INTEL_ICELAKE_X, NULL), /* Instruction-Accurate PDIR (PDIR++) */ - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, NULL), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, NULL), {} }; =20 /* Precise Distribution (PDist) */ static const struct x86_cpu_id vmx_pebs_pdist_cpu[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, NULL), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, NULL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41BFB13A250 for ; Mon, 20 May 2024 22:46:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245202; cv=none; b=kxwsoUPzWu9zUf+LaiwHrKxe7fq8GHjArtQr56iT8BMfoyRMgqIs838XW6sATQuznUeotHQBr08WR9+lMoVMrF8aAofvytZtFLacXoJu3/ygCF14hvyJvsl69Q3DtIiAdrDEwWNG36EPvUDKBVf1jtCY34X8iLfl9fRaqZe6Cqw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245202; c=relaxed/simple; bh=SrCUXI/oM/RyfJid2zkIs4n9nvj5uW7YKEMoo1adejA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KNH7iD0MXJOLHMBVKKiaefSUyiOwkgSCfPMbmllTVaKXnebf4TznwvlAM4Xj/kLniZmJYRQ6LZ5fNuVJZDNkEawjapzRtpInc8yububfbRNRi8FSAg7IGNRwtM9jUfsI1+HPJG9Qvqurw003leK0dnhIIlfwdNmUuvvqtsguCXA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=B5qjDzrA; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="B5qjDzrA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245201; x=1747781201; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SrCUXI/oM/RyfJid2zkIs4n9nvj5uW7YKEMoo1adejA=; b=B5qjDzrAHfcgnWGUKHf3mFXs82WZ8/U3NhADcmEmWx46FBdncdvzmt2o y0KRknvMjNbYNlxCHLsCRbzBd1twLnJF7K/ISAIb5tjJ6RRX7OaPdp/mM UWjL5QQoQUo9JRxQ2KvFXrAzP3b8f1eRokJtJNNLTwqQGPcLL9ncpAJRr irpzil3d+uaCVm1Il3C3U9tuEjDklIBWdoAANytmhFnyEFOH6VUJrKVa3 0XCYs1cebFAgyyE/4SVTjvMb1MJ6o+YB76Ld5e/XlKwjeu5NU0Hyfqx8z xA4Go46oqV5A0eLLIrw91dVIf3YzrCgLiFk07v6nPgJh9S95nM63W4uCG w==; X-CSE-ConnectionGUID: v/OiVYVGTMWiUuP8J+F8EQ== X-CSE-MsgGUID: QfxRmTJAQkSnniAdy8DKdA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199599" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199599" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 X-CSE-ConnectionGUID: hUI/PFvgSy+kdlt5jv+Wtw== X-CSE-MsgGUID: rEtX2mjpRy677qKZA6Yolg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593409" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Sean Christopherson Subject: [PATCH v6 09/49] KVM: VMX: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:40 -0700 Message-ID: <20240520224620.9480-10-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Sean Christopherson --- arch/x86/kvm/vmx/vmx.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 6051fad5945f..ceb0c1e6275a 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -2525,17 +2525,15 @@ static bool cpu_has_sgx(void) */ static bool cpu_has_perf_global_ctrl_bug(void) { - if (boot_cpu_data.x86 =3D=3D 0x6) { - switch (boot_cpu_data.x86_model) { - case INTEL_FAM6_NEHALEM_EP: /* AAK155 */ - case INTEL_FAM6_NEHALEM: /* AAP115 */ - case INTEL_FAM6_WESTMERE: /* AAT100 */ - case INTEL_FAM6_WESTMERE_EP: /* BC86,AAY89,BD102 */ - case INTEL_FAM6_NEHALEM_EX: /* BA97 */ - return true; - default: - break; - } + switch (boot_cpu_data.x86_vfm) { + case INTEL_NEHALEM_EP: /* AAK155 */ + case INTEL_NEHALEM: /* AAP115 */ + case INTEL_WESTMERE: /* AAT100 */ + case INTEL_WESTMERE_EP: /* BC86,AAY89,BD102 */ + case INTEL_NEHALEM_EX: /* BA97 */ + return true; + default: + break; } =20 return false; --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F17F13A260 for ; Mon, 20 May 2024 22:46:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245203; cv=none; b=TJS0CvgdFufiyW5LpBlmYT3kEf/WAPsJijA7i5SNUyjSWyis0kns6QlR2oDBkPK9n8Md/oEY8CQVjK7Sj8+wgT4m0PAoiFbBNB93vfUYRSNtquTRmASEjPWl9W9oNP5JrY1HVngCQcjx+rWUuCkqq5P2445UPodXNVB1vvyj4L4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245203; c=relaxed/simple; bh=N7BO8ma+2BwG4UD9NIGMDLMhLyzkgYBOUd3reNFktso=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=svHwcpF9kt3KVSbpjt4Wqu27E8qbYgH4rD7ZYlwzPLuczF2qbFGJRmY3j/dyvBNncCw1ExVhJjFCctsK7watd9XvkhMz8Wbd4bDMq9tCueChR66D+44UZZf3lLPZlqHW6BnT7TyegI8geSjnXJioMPX1BoDr8b2InrkUoXOFtKs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=iPcvydDh; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="iPcvydDh" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245201; x=1747781201; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=N7BO8ma+2BwG4UD9NIGMDLMhLyzkgYBOUd3reNFktso=; b=iPcvydDh1V9AACKSsjyq7jhYxz2K7cSeMWb+fw+8vO0CBq+Z3UftnR6v fhgW7jRRV1hY0aXK9TfnJc0ExAsoM8QyQLnV70MbRHo5X7GwUDOLQdmCv lfkEprY90QhTqXvUWtBNsfgsn7T6CVBrf+og51D3qCfb67JrrvWexZoxY Pt2lMzE3r8mv+WBM5hPWEbK+PfkCGmmJRaozOMbPxdypwn3Rr1K7jRWMN 4zKGk7mBT3mZTju1tc5IvI4t8OZkk5gZjNkhSrWp0m6XPmaGQjeZU7Azo 7baE/A4/en4VgkSV8wEvuEwonDypj5sAJVocmflpzU54smjH9maDcmzka g==; X-CSE-ConnectionGUID: 18AAiIsNT6aBD9LMO7kopw== X-CSE-MsgGUID: rUa0+RpDSEeP4CqXstYtsQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199611" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199611" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 X-CSE-ConnectionGUID: rzvZAkC1Q+iwxdWL6KBEZw== X-CSE-MsgGUID: q8bHIfDuRHqtHwt74K1gEg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593412" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, "Rafael J . Wysocki" Subject: [PATCH v6 10/49] cpufreq: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:41 -0700 Message-ID: <20240520224620.9480-11-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Rafael J. Wysocki --- drivers/cpufreq/speedstep-centrino.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/cpufreq/speedstep-centrino.c b/drivers/cpufreq/speedst= ep-centrino.c index 75b10ecdb60f..ddd6f53bfd2a 100644 --- a/drivers/cpufreq/speedstep-centrino.c +++ b/drivers/cpufreq/speedstep-centrino.c @@ -520,10 +520,10 @@ static struct cpufreq_driver centrino_driver =3D { * or ASCII model IDs. */ static const struct x86_cpu_id centrino_ids[] =3D { - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, 9, X86_FEATURE_EST, NULL), - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, 13, X86_FEATURE_EST, NULL), - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15, 3, X86_FEATURE_EST, NULL), - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15, 4, X86_FEATURE_EST, NULL), + X86_MATCH_VFM_FEATURE(IFM( 6, 9), X86_FEATURE_EST, NULL), + X86_MATCH_VFM_FEATURE(IFM( 6, 13), X86_FEATURE_EST, NULL), + X86_MATCH_VFM_FEATURE(IFM(15, 3), X86_FEATURE_EST, NULL), + X86_MATCH_VFM_FEATURE(IFM(15, 4), X86_FEATURE_EST, NULL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9EAA213A3E0 for ; Mon, 20 May 2024 22:46:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245205; cv=none; b=pe5AtCzrn9sgSNEJTAJxSk+pHXsuXtwNrIgHVhaxNWi/sxRkI+mKcVpXk0+FaqUfTblH38JASyGjG6EI1LTIol6NZhXHxfcwxS8FPD+uRbK5f4wx8HHTSI3VX7bkUKArgCai4Qa0Rc18vuaOCfKF2PxPP0rkJRYZmt57ZHXgJLE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245205; c=relaxed/simple; bh=iJpPCVfJQWZpkgusbqGddZxLaOAz/oK4YqPeOc2AcG0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eoD3nqSrr8oLvnqcnpHC7XUEwfxcX83uPEo+sOmJ14g/RuwWF28KcWgcv8ovQn9cIpgOP8J+dZ2XOLNkzV8oJQlzKyO1g21K66U98G0MeFzCzHk3LaYPX//q3CPvz0LpVL/7j6hnI01HQtuWb4Wwzl6o9x5AbfT/gYABjokjE5o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=j6z/aSis; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="j6z/aSis" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245202; x=1747781202; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iJpPCVfJQWZpkgusbqGddZxLaOAz/oK4YqPeOc2AcG0=; b=j6z/aSisiJ5rg1DFyCcbr3ThetZgRCiPfMssSYbL0VaiHKxUsMneHXa8 4mpynJ40kqJoJW5Vt9NWolWokFUsGF4fn3k5EDGkgOq5jujhnAQtT7DcU Um3k3qhXXqECpxo8yI1uA8XnzDzzU6Q874/UQa0XmkrjlKccOvH3/n4Xw Dkqa21R9NnaZHZetmOu/cJnZW+SDoCbu1AMwP0s1vVFhrFBWpXTtrw/8D wAHsqMQEZ12mQALHj+BpX/bgtA0wdLKsiQscOqekC3FdcPlCGqtLoYoex zMH2OJHYJbuoggNSjyX/01SSUsuy7Xi9KpIp9j8G3lv9/HMuBA4QWfhot Q==; X-CSE-ConnectionGUID: 6GF2U3G+QNC2g2kr4D2BRA== X-CSE-MsgGUID: 4yhTLhchR5aDu6VTihAVrQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199622" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199622" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 X-CSE-ConnectionGUID: C/YLLunSSFqe6E9vnKiKDw== X-CSE-MsgGUID: YcF4UfWwQQKPkqBiNP4upw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593415" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, "Rafael J . Wysocki" Subject: [PATCH v6 11/49] intel_idle: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:42 -0700 Message-ID: <20240520224620.9480-12-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Rafael J. Wysocki --- drivers/idle/intel_idle.c | 116 +++++++++++++++++++------------------- 1 file changed, 58 insertions(+), 58 deletions(-) diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index e486027f8b07..9aab7abc2ae9 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -1494,53 +1494,53 @@ static const struct idle_cpu idle_cpu_srf __initcon= st =3D { }; =20 static const struct x86_cpu_id intel_idle_ids[] __initconst =3D { - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &idle_cpu_nhx), - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &idle_cpu_nehalem), - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_G, &idle_cpu_nehalem), - X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &idle_cpu_nehalem), - X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &idle_cpu_nhx), - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &idle_cpu_nhx), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL, &idle_cpu_atom), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL_MID, &idle_cpu_lincroft), - X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &idle_cpu_nhx), - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &idle_cpu_snb), - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &idle_cpu_snx), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL, &idle_cpu_atom), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &idle_cpu_byt), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &idle_cpu_tangier), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &idle_cpu_cht), - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &idle_cpu_ivb), - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &idle_cpu_ivt), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &idle_cpu_hsw), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &idle_cpu_hsx), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &idle_cpu_hsw), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &idle_cpu_hsw), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &idle_cpu_avn), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &idle_cpu_bdw), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &idle_cpu_bdw), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &idle_cpu_bdx), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &idle_cpu_bdx), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &idle_cpu_skl), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &idle_cpu_skl), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &idle_cpu_skl), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &idle_cpu_skl), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &idle_cpu_skx), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &idle_cpu_icx), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &idle_cpu_icx), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &idle_cpu_adl), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &idle_cpu_adl_l), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &idle_cpu_mtl_l), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &idle_cpu_gmt), - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &idle_cpu_spr), - X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &idle_cpu_spr), - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &idle_cpu_knl), - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &idle_cpu_knl), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &idle_cpu_bxt), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &idle_cpu_bxt), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &idle_cpu_dnv), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &idle_cpu_snr), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &idle_cpu_grr), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &idle_cpu_srf), + X86_MATCH_VFM(INTEL_NEHALEM_EP, &idle_cpu_nhx), + X86_MATCH_VFM(INTEL_NEHALEM, &idle_cpu_nehalem), + X86_MATCH_VFM(INTEL_NEHALEM_G, &idle_cpu_nehalem), + X86_MATCH_VFM(INTEL_WESTMERE, &idle_cpu_nehalem), + X86_MATCH_VFM(INTEL_WESTMERE_EP, &idle_cpu_nhx), + X86_MATCH_VFM(INTEL_NEHALEM_EX, &idle_cpu_nhx), + X86_MATCH_VFM(INTEL_ATOM_BONNELL, &idle_cpu_atom), + X86_MATCH_VFM(INTEL_ATOM_BONNELL_MID, &idle_cpu_lincroft), + X86_MATCH_VFM(INTEL_WESTMERE_EX, &idle_cpu_nhx), + X86_MATCH_VFM(INTEL_SANDYBRIDGE, &idle_cpu_snb), + X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &idle_cpu_snx), + X86_MATCH_VFM(INTEL_ATOM_SALTWELL, &idle_cpu_atom), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &idle_cpu_byt), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &idle_cpu_tangier), + X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &idle_cpu_cht), + X86_MATCH_VFM(INTEL_IVYBRIDGE, &idle_cpu_ivb), + X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &idle_cpu_ivt), + X86_MATCH_VFM(INTEL_HASWELL, &idle_cpu_hsw), + X86_MATCH_VFM(INTEL_HASWELL_X, &idle_cpu_hsx), + X86_MATCH_VFM(INTEL_HASWELL_L, &idle_cpu_hsw), + X86_MATCH_VFM(INTEL_HASWELL_G, &idle_cpu_hsw), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D, &idle_cpu_avn), + X86_MATCH_VFM(INTEL_BROADWELL, &idle_cpu_bdw), + X86_MATCH_VFM(INTEL_BROADWELL_G, &idle_cpu_bdw), + X86_MATCH_VFM(INTEL_BROADWELL_X, &idle_cpu_bdx), + X86_MATCH_VFM(INTEL_BROADWELL_D, &idle_cpu_bdx), + X86_MATCH_VFM(INTEL_SKYLAKE_L, &idle_cpu_skl), + X86_MATCH_VFM(INTEL_SKYLAKE, &idle_cpu_skl), + X86_MATCH_VFM(INTEL_KABYLAKE_L, &idle_cpu_skl), + X86_MATCH_VFM(INTEL_KABYLAKE, &idle_cpu_skl), + X86_MATCH_VFM(INTEL_SKYLAKE_X, &idle_cpu_skx), + X86_MATCH_VFM(INTEL_ICELAKE_X, &idle_cpu_icx), + X86_MATCH_VFM(INTEL_ICELAKE_D, &idle_cpu_icx), + X86_MATCH_VFM(INTEL_ALDERLAKE, &idle_cpu_adl), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, &idle_cpu_adl_l), + X86_MATCH_VFM(INTEL_METEORLAKE_L, &idle_cpu_mtl_l), + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &idle_cpu_gmt), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &idle_cpu_spr), + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &idle_cpu_spr), + X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &idle_cpu_knl), + X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &idle_cpu_knl), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &idle_cpu_bxt), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &idle_cpu_bxt), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &idle_cpu_dnv), + X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &idle_cpu_snr), + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &idle_cpu_grr), + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &idle_cpu_srf), {} }; =20 @@ -1990,27 +1990,27 @@ static void __init intel_idle_init_cstates_icpu(str= uct cpuidle_driver *drv) { int cstate; =20 - switch (boot_cpu_data.x86_model) { - case INTEL_FAM6_IVYBRIDGE_X: + switch (boot_cpu_data.x86_vfm) { + case INTEL_IVYBRIDGE_X: ivt_idle_state_table_update(); break; - case INTEL_FAM6_ATOM_GOLDMONT: - case INTEL_FAM6_ATOM_GOLDMONT_PLUS: + case INTEL_ATOM_GOLDMONT: + case INTEL_ATOM_GOLDMONT_PLUS: bxt_idle_state_table_update(); break; - case INTEL_FAM6_SKYLAKE: + case INTEL_SKYLAKE: sklh_idle_state_table_update(); break; - case INTEL_FAM6_SKYLAKE_X: + case INTEL_SKYLAKE_X: skx_idle_state_table_update(); break; - case INTEL_FAM6_SAPPHIRERAPIDS_X: - case INTEL_FAM6_EMERALDRAPIDS_X: + case INTEL_SAPPHIRERAPIDS_X: + case INTEL_EMERALDRAPIDS_X: spr_idle_state_table_update(); break; - case INTEL_FAM6_ALDERLAKE: - case INTEL_FAM6_ALDERLAKE_L: - case INTEL_FAM6_ATOM_GRACEMONT: + case INTEL_ALDERLAKE: + case INTEL_ALDERLAKE_L: + case INTEL_ATOM_GRACEMONT: adl_idle_state_table_update(); break; } --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ABA2E13A417 for ; Mon, 20 May 2024 22:46:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245204; cv=none; b=Vrru8VCLTQwMIsSNsI4ve8MvKixiZWo+BrMdaP+uIu1Pvm9C0HDI6Ip/OGkBT1j/91jysqyDXumXTqIWtv0zh+X7Y5ZxU9Rfmvcy0cAy9fAU8jrF0gzN2Iknpk0mCDzrtNyuJAsa/45leBnvEADDXpQMCTeXVvfn1VX6pnP5r7Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245204; c=relaxed/simple; bh=UCxMtBp8JAc8kiqTmHIGiN2JeFnF21tMXCqSLt0G2gM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=P+pcnnb2FKqSXqeuQO4Sq9/Jxn1E8bJjb+OjMWnKKrWrKrcnKWuuncFa/iZnfpxD/NZYJzDnDVTXcgqPkom2gdLxry7mmsbrYrdNQAPvFrf9f0HR/mwb/6CsIHqUSWdCj/aEvV20DhWbCs1nMoSPDGsH2TO8R2fOUBkjRalOgRg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jUVog0QY; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jUVog0QY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245203; x=1747781203; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UCxMtBp8JAc8kiqTmHIGiN2JeFnF21tMXCqSLt0G2gM=; b=jUVog0QYo77UVUsvRW/YR4xQZLTyes47+JCP9rIy4kOHj/DdRYy/kJLs peUWv0O6ptVlySUSCp480JoAwMF3HLI901PKEzyIk7yxOzzO29CptZFdf habf3MqfJZ4iTXYEj5ZXWZ6ReCCvpbLPmkhQHb9BuQvdPhTOdG8UhzN+d 4R7W4+qwyBbyj/g09SgKCqiR+DonlNFP+SdlKRwX+9cdfGg8Ky6U2OAkD VrvHZ7jP6gTFTXRROUuPZLtsa7J91ZDTOXR3u/Rx3BmtFDUztWNiHpUDN SvEv0Mjln49eZWIXAst357Xsy6xd0XEyduddqBDWqCmo1xKZ/deJbWe1M w==; X-CSE-ConnectionGUID: Yk85uoaaTH2IUUjCI+KNTA== X-CSE-MsgGUID: uYxZJoxFSRWqv/kZmhwAOA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199638" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199638" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 X-CSE-ConnectionGUID: rlYlv6GQSsq8AeKfMtVR6Q== X-CSE-MsgGUID: 8GvZ7HJCTVCdtTTPSvXKeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593418" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Bjorn Helgaas Subject: [PATCH v6 12/49] PCI: PM: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:43 -0700 Message-ID: <20240520224620.9480-13-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Bjorn Helgaas --- drivers/pci/pci-mid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci-mid.c b/drivers/pci/pci-mid.c index fbfd78127123..bed9f0755271 100644 --- a/drivers/pci/pci-mid.c +++ b/drivers/pci/pci-mid.c @@ -38,8 +38,8 @@ pci_power_t mid_pci_get_power_state(struct pci_dev *pdev) * arch/x86/platform/intel-mid/pwr.c. */ static const struct x86_cpu_id lpss_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL), + X86_MATCH_VFM(INTEL_ATOM_SALTWELL_MID, NULL), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, NULL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6CD413A3E9 for ; Mon, 20 May 2024 22:46:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245203; cv=none; b=Ig+W4EtKUg+GWZXMpCpvXg/0FoDgftgz3m0g7oty1otxfzK54y4MIZGnUhZFG+0vfNoyHhu6mC9t/FCYab4scZjW7JZaE1sWDDK2MLYQqBQPWhsTj8GiKYNClEpS93aB/frPjoZwwQmlW8zukjkHKvuZJvnH+70onAvycH2tM5c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245203; c=relaxed/simple; bh=gCPJaBoIddAMPrycAKcstPhp40qC+YN7SQoPWeSGRBc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XQHQ1IRWToe9BhCpf7IbOcUyvlqtCFGSDy8li9wt8tUhqYLYwSPTJgvX0F3TUXWXl+LYyVouDCWwR7zXXhMwILeS49Np79xqhOYDGirzWMNBPuhgNxDI1zbTPgurRScF/6NR9S0oRvwGfbXAtZ7sz1Wdq3J9xj2hldhAKiggd7o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=V6o/XHv6; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="V6o/XHv6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245202; x=1747781202; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gCPJaBoIddAMPrycAKcstPhp40qC+YN7SQoPWeSGRBc=; b=V6o/XHv6/8iGpFR0QXktZHu9c21PfnGOfI+smT3g1Q0AliAj7o4AYtfv Mhv9zFphp5oNfa9hUojyXqQE80ZsX+693Y1fAfelLQq61WQsdHlurLnDs m/OQdVtxED7ygOct0+Dhtq33ajXOLKpD+0d5xBgvMLuhKnq5dhoVwrFym olgqgg2DVvpiVStP9y28YpSGzoTB4C+UYxxb2vQhnyZ4I5GXmEn+9FbQb wCeO0X60XuplH8i4OrOj01Ra8EhvYSTxlvqwprK9mPDLdKaFQ/FMtDov0 tDAvOKs5S1gub+sMjk0DdX8m0rLE3IxQYj8jeT4DA0dUb1Psh0xxYskJY A==; X-CSE-ConnectionGUID: weFrZSItRfSX2wj1cgV4Bw== X-CSE-MsgGUID: VVU6+xGDRD61Hskis5qmWQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199645" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199645" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 X-CSE-ConnectionGUID: Y+S+tpEZRcaK5LA1dWLKEg== X-CSE-MsgGUID: h1PduYHHRTeAZ9n4hCwW6Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593421" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, "Rafael J . Wysocki" Subject: [PATCH v6 13/49] powercap: intel_rapl: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:44 -0700 Message-ID: <20240520224620.9480-14-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Rafael J. Wysocki --- drivers/powercap/intel_rapl_msr.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rap= l_msr.c index 35cb152fa9aa..733a36f67fbc 100644 --- a/drivers/powercap/intel_rapl_msr.c +++ b/drivers/powercap/intel_rapl_msr.c @@ -139,14 +139,14 @@ static int rapl_msr_write_raw(int cpu, struct reg_act= ion *ra) =20 /* List of verified CPUs. */ static const struct x86_cpu_id pl4_support_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, NULL), + X86_MATCH_VFM(INTEL_TIGERLAKE_L, NULL), + X86_MATCH_VFM(INTEL_ALDERLAKE, NULL), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL), + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL), + X86_MATCH_VFM(INTEL_METEORLAKE, NULL), + X86_MATCH_VFM(INTEL_METEORLAKE_L, NULL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21C0513A877 for ; Mon, 20 May 2024 22:46:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245204; cv=none; b=EihsAS8tstDHlIZ+bLhXleMRORktj5AGfV/LbPCzpNv+4ZKa9mVs16DabygmT5qPEe7rt4POcI9VfV5XyGTdDdoqqzQfwOMpA1uMTGHaKisuQfFiD98VtBeIBJu3bJfdTeA8NJGWpY+BLA7U/dQgF3sqWOegMmbDVxxqvN0Wz0I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245204; c=relaxed/simple; bh=Sbt9Xz2Ynh3GTpeHeMDFV/YANtnFR7us28NjBssk4I0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RwGsS7MXSOQzOqNFZ8EssVfzdDr1ci7p4nCO+6vCGGVoK21f39XBojOYxpRBL6Wf415QBFRrvNbOaivD9vSDapv5kMP3u/toial+yhz7+y3dq8bSDLMhbLPY6XhYMZmAMn/YnXPVD1JmF0acIwemyVYw7bpTAupf12yV5dEjo3s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=HlqWPu/f; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="HlqWPu/f" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245203; x=1747781203; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Sbt9Xz2Ynh3GTpeHeMDFV/YANtnFR7us28NjBssk4I0=; b=HlqWPu/f5Obu4XbrRboJm3rpvxGRcj8DjFVoEwRqD2u4dn/IyTDzAIbc 9nqIQhJf1Embgdfp3QUX61OXLQwSKsN0zHUCeOn8KHIB7Oyrefe1442Ln yjCH9+h2IPxWZKiKmrOxdnCq8LiLlynOOlTbZF8Eqb3P8084Vqml36pF/ /60FpLIytN6CMO/56C8CLzCPK4TuDsllt4mJZuxPsd8FSfIh7BYwx3X7X eMXzEmL5RShuMJiNweZA3roWja7O2KLQIPsvYbUL9+c8PdPM0AdPIQQdj tLl2sbqdSzcFvgnyAAB30WfXcWXa8YT+4h7QmA1JtsEYP/uWgMVZ3WOiL A==; X-CSE-ConnectionGUID: Tr6h2YsMTUWx1+VFgUkL2Q== X-CSE-MsgGUID: UcjgTQ6ERm+ONhwB8G0bHA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199656" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199656" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 X-CSE-ConnectionGUID: /RMzd/acQ9ebCVb/gmjdGw== X-CSE-MsgGUID: FryFEtdER5ub3QC3eqCGwg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593424" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:36 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, "Rafael J . Wysocki" Subject: [PATCH v6 14/49] ASoC: Intel: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:45 -0700 Message-ID: <20240520224620.9480-15-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Rafael J. Wysocki --- include/linux/platform_data/x86/soc.h | 12 ++++++------ drivers/thermal/intel/intel_soc_dts_thermal.c | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/include/linux/platform_data/x86/soc.h b/include/linux/platform= _data/x86/soc.h index a5705189e2ac..f981907a5cb0 100644 --- a/include/linux/platform_data/x86/soc.h +++ b/include/linux/platform_data/x86/soc.h @@ -20,7 +20,7 @@ static inline bool soc_intel_is_##soc(void) \ { \ static const struct x86_cpu_id soc##_cpu_ids[] =3D { \ - X86_MATCH_INTEL_FAM6_MODEL(type, NULL), \ + X86_MATCH_VFM(type, NULL), \ {} \ }; \ const struct x86_cpu_id *id; \ @@ -31,11 +31,11 @@ static inline bool soc_intel_is_##soc(void) \ return false; \ } =20 -SOC_INTEL_IS_CPU(byt, ATOM_SILVERMONT); -SOC_INTEL_IS_CPU(cht, ATOM_AIRMONT); -SOC_INTEL_IS_CPU(apl, ATOM_GOLDMONT); -SOC_INTEL_IS_CPU(glk, ATOM_GOLDMONT_PLUS); -SOC_INTEL_IS_CPU(cml, KABYLAKE_L); +SOC_INTEL_IS_CPU(byt, INTEL_ATOM_SILVERMONT); +SOC_INTEL_IS_CPU(cht, INTEL_ATOM_AIRMONT); +SOC_INTEL_IS_CPU(apl, INTEL_ATOM_GOLDMONT); +SOC_INTEL_IS_CPU(glk, INTEL_ATOM_GOLDMONT_PLUS); +SOC_INTEL_IS_CPU(cml, INTEL_KABYLAKE_L); =20 #undef SOC_INTEL_IS_CPU =20 diff --git a/drivers/thermal/intel/intel_soc_dts_thermal.c b/drivers/therma= l/intel/intel_soc_dts_thermal.c index 9c825c6e1f38..718c6326eaf4 100644 --- a/drivers/thermal/intel/intel_soc_dts_thermal.c +++ b/drivers/thermal/intel/intel_soc_dts_thermal.c @@ -36,7 +36,7 @@ static irqreturn_t soc_irq_thread_fn(int irq, void *dev_d= ata) } =20 static const struct x86_cpu_id soc_thermal_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, BYT_SOC_DTS_APIC_IRQ), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, BYT_SOC_DTS_APIC_IRQ), {} }; MODULE_DEVICE_TABLE(x86cpu, soc_thermal_ids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5544413A88F for ; Mon, 20 May 2024 22:46:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245205; cv=none; b=MZFaCrEYFqjVP6CRGaC0Cp/mBcRrkJi4Su8h9l2DFqzUKnkhMudNVtq9LLxNBR3czp8v17NYIfnx9uhikqIWcs008jeBmpDuS8t4WxMW4179T0xGCyS93gI5XslrDz4Fb5El+ohGuTa76jJ0QfyUBjzPBsYndRX22p2H7he7vUQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245205; c=relaxed/simple; bh=FIC0xFut5c+dBJm8+57uC03WUNJXEVf8utVvAkqVtLQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=AGOVsgLkPUNfzuDbCtjjAotjjg55fVn0urOkCOFt5VQXc56ydm8zaN6X74Hck2gwAr/A9QcPpYxEMOanxE7jpRj/3a9aqmjRPSOH+f2r8bKdlUWCDE5WD8mvRNQehT7J1gYtbTBMvLJ14MIMdxBuBrjRG/2oISVJw3fUizHmeC0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ZkqdPm0i; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZkqdPm0i" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245203; x=1747781203; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FIC0xFut5c+dBJm8+57uC03WUNJXEVf8utVvAkqVtLQ=; b=ZkqdPm0iMcTWZgVKSeS73s8Vu8kI9UDNifJwruyMiXnAJqXVrVSiGU/v A9CjvmrDa2GB0KJeXhuRLs355hgE0h8kS4G1vXbxwPePXSvbXhrR9ze9v KhDNevckf5/hCLJ9jX83w4MAF40+svmue+QlAGmGEpCt5rjy/ItwojbDx dnqKCwAr8QWcOMbnHfqNE2lU2P3YuU9P/WbzcCjuzhLhcs1H4iQRLmqI7 dmGA+y/euYyK4TNxQWBHYncX6TyWB5M2H59KgmJk5HkcUcBdujShf0ufz 9vhnhuRsio4h5RHD2aI0qFxkgeDE3ev5DLd8sghUckMo/AVAxs+Dp8XyR w==; X-CSE-ConnectionGUID: ++PNyATGQ2KLOAZb/Q6YrQ== X-CSE-MsgGUID: mbDMhmQsR/+woDAquWBD0A== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199667" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199667" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 X-CSE-ConnectionGUID: ZhCNIb8YTK+0/oIxg1IvcA== X-CSE-MsgGUID: lyNRLwAaS5CUUXjAkoDAaQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593427" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, "Rafael J . Wysocki" Subject: [PATCH v6 15/49] thermal: intel: intel_tcc_cooling: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:46 -0700 Message-ID: <20240520224620.9480-16-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Rafael J. Wysocki --- drivers/thermal/intel/intel_tcc_cooling.c | 30 +++++++++++------------ 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/in= tel/intel_tcc_cooling.c index 6c392147e6d1..63696e7d7b3c 100644 --- a/drivers/thermal/intel/intel_tcc_cooling.c +++ b/drivers/thermal/intel/intel_tcc_cooling.c @@ -49,21 +49,21 @@ static const struct thermal_cooling_device_ops tcc_cool= ing_ops =3D { }; =20 static const struct x86_cpu_id tcc_ids[] __initconst =3D { - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL), + X86_MATCH_VFM(INTEL_SKYLAKE, NULL), + X86_MATCH_VFM(INTEL_SKYLAKE_L, NULL), + X86_MATCH_VFM(INTEL_KABYLAKE, NULL), + X86_MATCH_VFM(INTEL_KABYLAKE_L, NULL), + X86_MATCH_VFM(INTEL_ICELAKE, NULL), + X86_MATCH_VFM(INTEL_ICELAKE_L, NULL), + X86_MATCH_VFM(INTEL_TIGERLAKE, NULL), + X86_MATCH_VFM(INTEL_TIGERLAKE_L, NULL), + X86_MATCH_VFM(INTEL_COMETLAKE, NULL), + X86_MATCH_VFM(INTEL_ALDERLAKE, NULL), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL), + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, NULL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0828A13AA43 for ; Mon, 20 May 2024 22:46:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245205; cv=none; b=dalsPhmtaUC/cwMXWINxx+y81s5FxVNqIHCLR89r6WXTbPqaVtxKAjw8OXIAIjk2wE2rHhh0rHaNZfIaCxNxXEjzATGAuvEBjGjviNZyGm8vNmIPgvpOJ/ciM9IVm8OqfqKO3/jz0wCCDWE1K1/+cnLBkfb4TBOYIdgxguHGATA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245205; c=relaxed/simple; bh=+UQNNygVvHL0lbB54Mr3z0CgDvDdGlE3GhIkG4XeQL0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=E5S3+SetxEJHYukHf5jF8Kl4ImOap3ivYQt8jAjqeRAFdxMrtyvhtYGTGaAvV+koWLGg3XNbTwpMYVQSQMdtrnCc9ftBf7aaB8zXi3GsXpOqh2wB6u893PQvE7Zo9SGTeQHTkZAZRee1l279zMPQhR7Vit6sYyF4Y9SIKQl/sZg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=PoXzJOBm; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="PoXzJOBm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245204; x=1747781204; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+UQNNygVvHL0lbB54Mr3z0CgDvDdGlE3GhIkG4XeQL0=; b=PoXzJOBmW8RJq2P6HyDVipxV1lMx1hPv6O9BrPmlW/vhNSapEXZ4rW8N kG5ueVE5R9GEtlm1mHhnQqVBvOLoQXCGlvrNCQbfkUZa2If4yk1eDGs8P eoXrEgYLAJ3ikxcSeK+PnamGI0Qd6ML4voDmVD9U2qDoeALJHaYp26/UT peMpOYf5an7GkB6TTfX2N2GLEnTh7kPBA0X/Qo7hNn5/ZzeR2NSOzkyGt dS0ZWtPnB1kfHTMyCdgB/r802396QMYoEnAsUch/sA2+bOLcn3EApYRtC jDc3f2a3ZurB2TOUkSNjWHP1eY45Y8u545iFP8xoJPZ4RmX8x+8OibMLc g==; X-CSE-ConnectionGUID: JSOWwr4NQYCbJfuiRWSg3w== X-CSE-MsgGUID: 22Ln9z02RXOEa4b8A7JDfQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199678" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199678" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 X-CSE-ConnectionGUID: taxNCoufTfmAQsh/88M6PA== X-CSE-MsgGUID: oeQaGbR7Qj2nAkjo+F4IZA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593430" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Andy Shevchenko Subject: [PATCH v6 16/49] x86/platform/intel-mid: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:47 -0700 Message-ID: <20240520224620.9480-17-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Andy Shevchenko --- arch/x86/platform/intel-mid/intel-mid.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/in= tel-mid/intel-mid.c index 7be71c2cdc83..8b8173fb0a43 100644 --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -55,9 +56,9 @@ static void __init intel_mid_time_init(void) =20 static void intel_mid_arch_setup(void) { - switch (boot_cpu_data.x86_model) { - case 0x3C: - case 0x4A: + switch (boot_cpu_data.x86_vfm) { + case INTEL_HASWELL: + case INTEL_ATOM_SILVERMONT_MID: x86_platform.legacy.rtc =3D 1; break; default: --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 81BDD13AA5D for ; Mon, 20 May 2024 22:46:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245207; cv=none; b=tQMIhnRJ4BBifwTm67kWINHV94B0UyoBuykmZJit9r0R3z8/6lpUoZoCgHbFWJvCwxApxK/Zvf9Fa2rTs8s0kBFlInNVv+LA22WlaqKyAdsoA26QgVt4GWKIgN61UZU4Kiei21kki7VKr+exy7V/wLUsRGzNH9TUbYQUnswg6NQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245207; c=relaxed/simple; bh=hG3FP4AcNKVMSK2tzoC+JG6H48CVh98nrbPvxUI40RA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ID6b+QWiqsxHAwsImMxLgBCRZejVKIgcre1Hhd4CdUuEGTUn642u3I6c69gRij5bqG+v3iiYMQqJpQroRNw0+tmAKaYy1Cqv4Pf0aE5gzGXYvmbkbwPxb/hjTtDpZOmCEGPRaXT/mYsyg4v8POOEVmX27cTLrqtoQ1Xpcu6DDBw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=iOHZxqna; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="iOHZxqna" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245205; x=1747781205; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hG3FP4AcNKVMSK2tzoC+JG6H48CVh98nrbPvxUI40RA=; b=iOHZxqnaFhW+Q24FeTYxM4YUg0kZLoXr0CEF5ZH7bKeUhCXYlXNCCSnG ZojM7b9swk4Jmr0fNMd+Kf/yNZVhKS3r0H3p2Bxan5x4TW8GQBO6fV7DK sQ7153NxgQvGI8RSiJCVBPnw18vIHUns6ml1m9dF3g3YFlA8Hn2ctGK++ ApOBzvDfxCbltK4dJ7+JgY+Vcq9T6xmBOr48+0qgeziFrmWzAjanjogQw UMGjH7kyTNzKKmognNIVEd6vFyT83c1IvSjN5DrDfqMBQjNK3wwUcfwCN PPeEsnO7o+urXGLgb1W1VZtkHZu/OpOBTUOusSiBMlgU1xORD8PbWYSgK g==; X-CSE-ConnectionGUID: 8Ohxs9gXTM+qGSohWSMvog== X-CSE-MsgGUID: R5SN4+gSQ42rVQVN1DxB6w== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199690" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199690" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 X-CSE-ConnectionGUID: jTD+lewsQrm7iSCS0pL6WQ== X-CSE-MsgGUID: V6PIu/WDRNSu54Do8AB0ZA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593433" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Srinivas Pandruvada , Hans de Goede Subject: [PATCH v6 17/49] platform/x86: intel_speed_select_if: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:48 -0700 Message-ID: <20240520224620.9480-18-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Srinivas Pandruvada Acked-by: Hans de Goede --- drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c = b/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c index 1b6eab071068..6c36f7704fe7 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c @@ -161,7 +161,7 @@ static struct notifier_block isst_pm_nb =3D { }; =20 static const struct x86_cpu_id isst_if_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL), + X86_MATCH_VFM(INTEL_SKYLAKE_X, NULL), {} }; MODULE_DEVICE_TABLE(x86cpu, isst_if_cpu_ids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 18D9C13AD22 for ; Mon, 20 May 2024 22:46:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245207; cv=none; b=pHttMBVkyS8Iauk2wohugJW1fhfj8wOCdaXZkKu8IV/nMtmsbwlaY8b1A0YMYeuvIgH12Q88+spAst8KDKLyuZF9YD4jKPMp+FhCa9oqu4+PZSH59RYXCayrYPzF49yU1O651+w0tJ0qf8oUkuh2EUQ9t0T5fWgXnmt8CHmGSzQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245207; c=relaxed/simple; bh=yaJboBMEPLKvR1jTeG+KSsAACemlTofNhMPhw7StcCg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Rgsa6ThjFuul/FFlCm3OOAfejLiejiKPic1RoyKEHpACM/regVBr+aVdcwRekrNrO2CI3otGeJWjZYVf7GPh6hV6TgS1LQbIh6KyqDZNVPhpKO3jPIDh/C/Wo3QBjZJ2RHQ8dh2YAbOSNmD5rrQzjcAmwwKX195+4x7q0AEgg+M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=KjEMpm5v; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="KjEMpm5v" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245205; x=1747781205; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yaJboBMEPLKvR1jTeG+KSsAACemlTofNhMPhw7StcCg=; b=KjEMpm5vFSr19NBf9TNaO6wJZtTAheACIbjCsITj9bcaGCL4J8cxgioy 9t98pbtoLioIRd27n48VYfA7R7PkL4HtbU4sNbkoQNrDtDBLBm/QTRmmJ 7+GjtBcMOdWnJtKNg3OsW38ZGaUFKVLGH59fiqTZ6yYrEeGfKQwLgKrdk 5h2/se1ql7jnJnuX4cVXe3dOwRDIYKpvF75gSDZGcKjMP4GAIwaFR9eQo GSBYYx6CTshJJHwGdva6iksOHlVALciP0NTBPiZsG+l2UaAhlVbb1lMtW kCXzoVaeNCjy6S7kgdllLBRwZ+cy3bEOWFKgfcPEkRFCtReIVf/eqjixF w==; X-CSE-ConnectionGUID: jaDTYVhfRNCGAXUVS7vPRQ== X-CSE-MsgGUID: E9wlgTPZSqms3zbLiw+e+Q== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199701" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199701" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 X-CSE-ConnectionGUID: oug6AUxBQKuX+951Q1CcwQ== X-CSE-MsgGUID: tzverJqoQd2OzgA4pIuA/Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593436" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Srinivas Pandruvada , Hans de Goede Subject: [PATCH v6 18/49] platform/x86: intel-uncore-freq: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:49 -0700 Message-ID: <20240520224620.9480-19-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Srinivas Pandruvada Acked-by: Hans de Goede --- .../intel/uncore-frequency/uncore-frequency.c | 56 +++++++++---------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c= b/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c index b89c0dda9e5d..b80feaf5828f 100644 --- a/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c +++ b/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c @@ -197,34 +197,34 @@ static struct notifier_block uncore_pm_nb =3D { }; =20 static const struct x86_cpu_id intel_uncore_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, NULL), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, NULL), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, NULL), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, NULL), - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, NULL), - X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, NULL), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE_H, NULL), - X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M, NULL), + X86_MATCH_VFM(INTEL_BROADWELL_G, NULL), + X86_MATCH_VFM(INTEL_BROADWELL_X, NULL), + X86_MATCH_VFM(INTEL_BROADWELL_D, NULL), + X86_MATCH_VFM(INTEL_SKYLAKE_X, NULL), + X86_MATCH_VFM(INTEL_ICELAKE_X, NULL), + X86_MATCH_VFM(INTEL_ICELAKE_D, NULL), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, NULL), + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, NULL), + X86_MATCH_VFM(INTEL_KABYLAKE, NULL), + X86_MATCH_VFM(INTEL_KABYLAKE_L, NULL), + X86_MATCH_VFM(INTEL_COMETLAKE, NULL), + X86_MATCH_VFM(INTEL_COMETLAKE_L, NULL), + X86_MATCH_VFM(INTEL_CANNONLAKE_L, NULL), + X86_MATCH_VFM(INTEL_ICELAKE, NULL), + X86_MATCH_VFM(INTEL_ICELAKE_L, NULL), + X86_MATCH_VFM(INTEL_ROCKETLAKE, NULL), + X86_MATCH_VFM(INTEL_TIGERLAKE, NULL), + X86_MATCH_VFM(INTEL_TIGERLAKE_L, NULL), + X86_MATCH_VFM(INTEL_ALDERLAKE, NULL), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, NULL), + X86_MATCH_VFM(INTEL_METEORLAKE, NULL), + X86_MATCH_VFM(INTEL_METEORLAKE_L, NULL), + X86_MATCH_VFM(INTEL_ARROWLAKE, NULL), + X86_MATCH_VFM(INTEL_ARROWLAKE_H, NULL), + X86_MATCH_VFM(INTEL_LUNARLAKE_M, NULL), {} }; MODULE_DEVICE_TABLE(x86cpu, intel_uncore_cpu_ids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1042D13B2A5 for ; Mon, 20 May 2024 22:46:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245208; cv=none; b=nTyVXNKeGfM678i7nbH4x8LeeLDPLDXOSbcO1V6J6ARGa15ATA+rUOSK0xLZy0SmMXUTmm8SeqgSdFfv4WItCfgt0OXjPSHHRO/Kqd6LjOE5jwKd9+wCLoSmj92Iq6MHWKw8HowGceW+TrmKA7IFkV1FTMtFL26Uul12y19rx+4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245208; c=relaxed/simple; bh=32OovBnI96Pt8u6y2/ExOjFMxT/hkeFmHDurbkDaicI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mIlovYJxvHOUSaJBSfls9dUKrW1J4JbzQy3GbrameGshjxEFNRaeoRjVutncG4Nky6Z9njP3f0Eb0DH2DHw8z0dxy2TTBWcmZUUekXWzx33U+t++CA65tcwEMzfVmklUUHBkU7g8QLyAVO/cOTb02s8Hn/7GKCuPgvlncAXbWrQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Un9Hr590; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Un9Hr590" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245206; x=1747781206; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=32OovBnI96Pt8u6y2/ExOjFMxT/hkeFmHDurbkDaicI=; b=Un9Hr590o3gGq1vVei35p7QT2Yam0/aNZjR6AFw7PlvrY/XGaC3fOCjF VlWsW4ofTIrSQDMhvFPtTQNH58C8JuJvnRGDgTSzIGFqVXJ4R5zOzpDzk 6rh5dkGpi/TFJcyyNFbQMEmA0my91eQVljFCfm4RH5p1kF69ojfHMHjqh BSKyk7fVkUSP771v9CULxf2xPKjxjigB7RnSb+3tE5RmUmWkBSyKxhphU 8oGw1S1jarQ8NZYEHQSxb+33jcR/Mty32Gsbmv9E5LdUn+O1U32QL+d/X aDcsIiGuByOeGDni7e9UKT3kWDXCahz/be5av9hfhAOvsamytXC052rOB w==; X-CSE-ConnectionGUID: j/KaexiDQ3yhxFJX/C2FWA== X-CSE-MsgGUID: 4qRttgz0TsyY37YCi54ygA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199712" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199712" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 X-CSE-ConnectionGUID: /gZXDJriTOiKIdQcRhTJyw== X-CSE-MsgGUID: 9XGSISLaS2Ku671oT+x9SA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593439" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Hans de Goede Subject: [PATCH v6 19/49] platform/x86: intel_ips: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:50 -0700 Message-ID: <20240520224620.9480-20-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Hans de Goede --- drivers/platform/x86/intel_ips.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel_ips.c b/drivers/platform/x86/intel_= ips.c index ba38649cc142..d95f686e0515 100644 --- a/drivers/platform/x86/intel_ips.c +++ b/drivers/platform/x86/intel_ips.c @@ -62,6 +62,7 @@ #include #include #include +#include #include "intel_ips.h" =20 #include @@ -1284,7 +1285,7 @@ static struct ips_mcp_limits *ips_detect_cpu(struct i= ps_driver *ips) struct ips_mcp_limits *limits =3D NULL; u16 tdp; =20 - if (!(boot_cpu_data.x86 =3D=3D 6 && boot_cpu_data.x86_model =3D=3D 37)) { + if (!(boot_cpu_data.x86_vfm =3D=3D INTEL_WESTMERE)) { dev_info(ips->dev, "Non-IPS CPU detected.\n"); return NULL; } --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52BBF4AEF0 for ; Mon, 20 May 2024 22:46:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245209; cv=none; b=V0eX57+WtyFXhJvas/qpJuyTjvIGztcEMboBNDd720H8ZSyzYfYFOm7hVu1hUXzo49zrdeZH3O7TOkPp6nVhAVGOTvKh3ZBmN5IzcDQQmkTgLlLUUYoUGzmyJlM9NV5g6zeqNKdLMx8dNaMjqrFInn7G/nt1YisBp1bDNeOMChY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245209; c=relaxed/simple; bh=hy9MtmDbv3l0daB2PANyWQHGl/YT+EbTWZX9BQjPOSw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WOBxhlB25xNfkrg59f9ZzqyzH6+yWlc9B2kzbH1+S47krLPJe82r3FHUDz0p+c8PS9nwj5vm3JXVpLaFZcaO4CbNDN8bu0sHqI2smUrcBGJyG74OfvCkqZYi5u/Nr8RgFHm5ubX6IYQRzmDJt40pEO3M7qngO15ZpjSmn6LLYLQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=fSiEvcL5; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="fSiEvcL5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245205; x=1747781205; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hy9MtmDbv3l0daB2PANyWQHGl/YT+EbTWZX9BQjPOSw=; b=fSiEvcL5FNvKeI65a6Z4z/qmryAosPGZcX0F6RsKyYvDdzhr+b2HyZ2Y h8FC7Oya2bEwoBF/4Uu2IfrX171XO0qP8kuUls9gPZTsp2QD9PnfQ0+Un zn1Caz7DM8C+tTbV1rcsvOBwRskQo6QgL/rFzH+fjDEqFylDZStbhBfjX RWJypXpkkaYsvaquY2Kk1M0LjbSPeElX0cW0x1SPBGMYImsTN7Hfg9/uo xoAX685otFjpb9BiNrPNs6TD94R7Q013c25IWHDBi3OyvVvKvqsoBD4Y8 8FidzH+YYMLG6NX8J9EW55ht6jXtWRNiBkHJ4LvTB3ty1cpU5C+o+LrFd g==; X-CSE-ConnectionGUID: dmDm1L/3RQGRX5n/XR6TmQ== X-CSE-MsgGUID: 6FGkLQnZS3SdSYf9Wlb2cg== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199723" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199723" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 X-CSE-ConnectionGUID: hO+AK607SROrhO7Ia68InQ== X-CSE-MsgGUID: ohFA/K4uTAWphuojlwHxcQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593442" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Hans de Goede Subject: [PATCH v6 20/49] platform/x86: intel_telemetry: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:51 -0700 Message-ID: <20240520224620.9480-21-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Hans de Goede --- drivers/platform/x86/intel/telemetry/debugfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/platform/x86/intel/telemetry/debugfs.c b/drivers/platf= orm/x86/intel/telemetry/debugfs.c index 1d4d0fbfd63c..70e5736c44c7 100644 --- a/drivers/platform/x86/intel/telemetry/debugfs.c +++ b/drivers/platform/x86/intel/telemetry/debugfs.c @@ -308,8 +308,8 @@ static struct telemetry_debugfs_conf telem_apl_debugfs_= conf =3D { }; =20 static const struct x86_cpu_id telemetry_debugfs_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &telem_apl_debugfs_conf), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &telem_apl_debugfs_conf), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &telem_apl_debugfs_conf), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &telem_apl_debugfs_conf), {} }; MODULE_DEVICE_TABLE(x86cpu, telemetry_debugfs_cpu_ids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1047413B2A8 for ; Mon, 20 May 2024 22:46:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245208; cv=none; b=efUS7TywZxgTHliI7uyJC/hHzDUaKmWBHYApJ7Gf/60/GqTpr7GTZXdwwgXB4NabfEy1/pf4+cKmXCt/+Rid3ZoU6lr9c2TFPKmYT0wRCYsuTBTKCnMy9rn2V1arZ1cZ31YLDQiDUi38ehC0ThlYlMU4hxiTVRC2O30bVtpPMo4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245208; c=relaxed/simple; bh=8rfbntKG1DMkpDVnqu9bd2NfEh681lNQrvAAuh2G8x0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RIeK0Ww68jOZFoN+7oN6I/50w4LfqKpFpENGgtoccS9IJxvrPCmrnkDsa1ZwJ6ocz1sKuPiJZNj9KEiky7eCK3MEobNyoF0OVjhsBDEQmLCmDcSn1SsgOjTcxMkSphJs17XGpknOB9bxYUD4vWZnze2G1w9vK5PicuusIAocb4w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CgyDtGjY; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CgyDtGjY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245206; x=1747781206; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8rfbntKG1DMkpDVnqu9bd2NfEh681lNQrvAAuh2G8x0=; b=CgyDtGjYiL8lhLMn+xkc9HUgTn66aNEPeYklja1xdmCWqEKI4wOohrIn 5jVqcYjOKoJfee/pz7ndybWtL3UEXtrxF/Wq/zx6wohPyzd+dk+0tvzya PErusWdgtA14W3NG3pVX3EtIn5b+0+f3x1WMicngRUf+yUN/Hf1Zk194u P/Skbea7jMa//1A10dgH8KrCYGkJroqwD9VsjkxwBpm0/RmOiHQDMJDmw /OdeJebncgxUge9JYAnGqahljhthGGjXEz5klG2pEuFYz7QVwvbkz5Jtr bQ95RLjtS0/lz92kKcFO9zsMljFuG829ujYASbbpB5HzT26zDqtmLqMri Q==; X-CSE-ConnectionGUID: 88zS+MWHRASpbDgfrTuvGg== X-CSE-MsgGUID: z5kmJIvBTtSGD0YFI/RLhA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199734" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199734" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 X-CSE-ConnectionGUID: p7sV0lcQR9KdqobAN6+SLg== X-CSE-MsgGUID: dWfWafuhR4+twVI5BMlcwA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593445" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Hans de Goede Subject: [PATCH v6 21/49] platform/x86: intel: telemetry: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:52 -0700 Message-ID: <20240520224620.9480-22-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Hans de Goede --- drivers/platform/x86/intel/telemetry/pltdrv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/platform/x86/intel/telemetry/pltdrv.c b/drivers/platfo= rm/x86/intel/telemetry/pltdrv.c index 06311d0e9451..767a0bc6c7ad 100644 --- a/drivers/platform/x86/intel/telemetry/pltdrv.c +++ b/drivers/platform/x86/intel/telemetry/pltdrv.c @@ -177,8 +177,8 @@ static struct telemetry_plt_config telem_glk_config =3D= { }; =20 static const struct x86_cpu_id telemetry_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &telem_apl_config), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &telem_glk_config), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &telem_apl_config), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &telem_glk_config), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5018B13B5B7 for ; Mon, 20 May 2024 22:46:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245209; cv=none; b=GeX8DodSF1VjyNHPE9rNJmRs6Oiw5KZXcb8boBqW1xgBtJJiu+P7MD3uNYD9oUlmcLV34LgfwkGH+L6yxEWp6WoBYwUuhqiIUWUEMQIoaC0UH3cz2s4D/qp0/QqDC6WWnhRjhLvShM+hh2cV4EKFJQ1tVtDwnzGD+RvN7uTSq8Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245209; c=relaxed/simple; bh=WB9IrZhQaBiWvCtxLVin3lFQLCeXldDe0NZh3MqrvXI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iqhknZNb5J1TUfzQdIPbOd4DpJ4KCvEu0nABPqDRfarifvpaOvyprLqmiwnb6vN4kmDpvRQt4i3bw16cq80PiR/29754cxZdjDAxmzu0h5FKlXHFu/Cd18rbpKNWwTNK5+ElbUoduQ4Vdjvy3xtwj+0bM2w16TUfEO4TCG9jujs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=FwGJWe3d; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="FwGJWe3d" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245207; x=1747781207; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WB9IrZhQaBiWvCtxLVin3lFQLCeXldDe0NZh3MqrvXI=; b=FwGJWe3dbNteHb/HRdDWvt+tjyNhkfVgbmEzyCXIrsjTFqpsLpNxNWZf Jlvr59bZyJeUozWf1B3PG4ZNE0zmnP3ASXWL2T540kuCuQ2XM49MEHPgM Q/QQAIirgxFLCFzGNxl6upovrAItpvLCE8DpL4d8L9HgIOo+TC8dew42d Qk4f5kLZMp8lPev7TJ1hErhMEbS2TldfJCeNKt5oGn3tgXSvrBPYD8VFA b6hW4cVUzLlu1JVIxd2GcApLYdXr1h2wqSbPqgKuxn98mEig6xItIRqBG s5AW+Y1DVtic+JSlzIup1Lm0AqZCJ8AkRQR625T/Cqs97wmNEVfjWG7qy w==; X-CSE-ConnectionGUID: lmMWICMxQDa9JtYnQl0Yyg== X-CSE-MsgGUID: TX9+bxpgT2eeZTb3Roc8IA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199745" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199745" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 X-CSE-ConnectionGUID: VURtXdSDSkeM+6BtBnTnLg== X-CSE-MsgGUID: OiObT9RmQ8Gac8FzHR0c4A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593448" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:37 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Hans de Goede Subject: [PATCH v6 22/49] platform/x86: intel_turbo_max_3: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:53 -0700 Message-ID: <20240520224620.9480-23-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Hans de Goede --- drivers/platform/x86/intel/turbo_max_3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/platform/x86/intel/turbo_max_3.c b/drivers/platform/x8= 6/intel/turbo_max_3.c index 892140b62898..79a0bcdeffb8 100644 --- a/drivers/platform/x86/intel/turbo_max_3.c +++ b/drivers/platform/x86/intel/turbo_max_3.c @@ -114,8 +114,8 @@ static int itmt_legacy_cpu_online(unsigned int cpu) } =20 static const struct x86_cpu_id itmt_legacy_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, NULL), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL), + X86_MATCH_VFM(INTEL_BROADWELL_X, NULL), + X86_MATCH_VFM(INTEL_SKYLAKE_X, NULL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8180413B5BE for ; Mon, 20 May 2024 22:46:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245209; cv=none; b=FIkPKHHZEm5sCddwKSQihFavSgxFclfGNtZWiO0qN+EasUvfN5Xbf9cH8Rk2wX3B1ZVNkds1DehHSZ7DM3vw/euMpQNg05JYrFbWVMiICUTMzE22S4aLCyYH13uKdkplPQ6AY9ivzGlA5+NftqJ1vx5goHADLibin51FkVFKUY8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245209; c=relaxed/simple; bh=PQHhBRWTyJ7lXAnwUF6T1t71Eh1K9Um/FsP12CRYfhs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Rlxub/v8X59EI9kKiCYLBlkk9Pib0qje7yE+XfwCDqISfWlNErIkTU9ZevaOmOWxVq30784HKWhi8AEo0+YfMrtshZSAvhg89KOny/HLOt4636iLt54WtUaGvrfNOYU0yI8hgPRjkYVd2VGdQ+Ov3um1cDHvEuP86p+M4aX0wIk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=e9HljlYP; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="e9HljlYP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245208; x=1747781208; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PQHhBRWTyJ7lXAnwUF6T1t71Eh1K9Um/FsP12CRYfhs=; b=e9HljlYPL40Eim/NR2njdP+k6nEh/uEop+6U/1fSI2A2OSkJA4W+rbRs RLPCLFP6AE23KwAdvDxyZsaOxwmuQqYgjVPVNFoJ/d9muqew3rX9POs2N Ma284qrI9WL+StPmoA7J7iYsalz88sV17RwKGys1f/k2ADBWdMWCocfux 7BmyNBNt0C+X2hU1jJeJ1wBqw7W8cli6ztGU5a8LoSulzVd95CKaibgCZ FLKQ3zKlVADGYYIcEnkmtcrpH8XTI4e6wrUhHSsuNAhtCfhKP3zezW504 B820Eso54jfsWdZdvCUhMm0tXdTqRkfLgnvo5/8HmaT2BqjodHe26LCHd g==; X-CSE-ConnectionGUID: JhN6bM61Qpihq5C1glumTQ== X-CSE-MsgGUID: NB0tLkvoREitYUFPamebpg== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199756" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199756" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 X-CSE-ConnectionGUID: hgJ5Tr7QR8W9CQr8QmhazQ== X-CSE-MsgGUID: MUEH5rC1RmW5u4N+LO9a7w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593451" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Hans de Goede Subject: [PATCH v6 23/49] platform/x86: p2sb: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:54 -0700 Message-ID: <20240520224620.9480-24-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Hans de Goede --- drivers/platform/x86/p2sb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/x86/p2sb.c b/drivers/platform/x86/p2sb.c index 3bf5d2243491..31f38309b389 100644 --- a/drivers/platform/x86/p2sb.c +++ b/drivers/platform/x86/p2sb.c @@ -24,7 +24,7 @@ #define SPI_DEVFN_GOLDMONT PCI_DEVFN(13, 2) =20 static const struct x86_cpu_id p2sb_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, P2SB_DEVFN_GOLDMONT), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, P2SB_DEVFN_GOLDMONT), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33CFF13BACC for ; Mon, 20 May 2024 22:46:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245210; cv=none; b=GDt0VrN1ktsz8HXJmLQ+X90OY3EeOiyjoa6ipRfYbblvXFnLONLXh1CygKXndcXUrBHDkpnyxwQvlt6CNGAw8elCYL9cOdbgzmr7k4+EQ8DEPVzIem5tVm0QZIT0EivNF0HtzcsUl9PCT5lVFwjXjGsTwsWQNUbxt8t9Y9dxJYM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245210; c=relaxed/simple; bh=rwri8jBEq7rYQ3kqqSBg1ylAIT9NhdjG7ASmrOmfXDA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OM6KYEAj2Zw2oZKOA7jbGtc3w3BKB277rUcWAlGDdRl1n9fUfJ32M5VbRMz2/8TVmgRpwwFgUMv6C8iKdBgX/Y6GeBAU/hpRIvqxHVOuO7dXtjooTTlvPzxguKvZ3CCOvirad8tv8j2/ebuuVD3yf1WpgVs7p7o/rbdywX4jCbk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LokOjLfj; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LokOjLfj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245208; x=1747781208; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rwri8jBEq7rYQ3kqqSBg1ylAIT9NhdjG7ASmrOmfXDA=; b=LokOjLfj8b8VbfB04oQof4anKZTjqeyFo7rIRFw6W0UafJj7VAkGZKdd zdttS02Z3rUww3hBUqWqzbnODx9sKPSVuvbLbkDVHbgwD5lZGy7y3VAYK djVAYcVouEOQkPJDFXZLzcIKjqayzQlRTtzr2uEBiJY1bchIyhYjplHG0 6DH/pmSVTnCAbKEQxAigMY3NkRUdvCjaVfEdNFdBgXt1DRdizH/y16ebq 12zKMth2slIWfZmGXvkFkeQFNYEBslvINjSCFAl/dUw7+0ku5V4R6I8tD VyAHTztgSbIjrAjpzD/caaPXSkan9D+xo2viO2ljpatzV+8jlpIE8YfhS A==; X-CSE-ConnectionGUID: 1RUGE7O3SW6kKeh5WwyUGg== X-CSE-MsgGUID: Ezro+SKgQtiNUBp+VYYjUg== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199767" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199767" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 X-CSE-ConnectionGUID: FztG9Ou+RESzMOqFyPwPAw== X-CSE-MsgGUID: Rnxll98ZSOSjAegawaf+GA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593454" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Hans de Goede Subject: [PATCH v6 24/49] platform/x86/intel: pmc: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:55 -0700 Message-ID: <20240520224620.9480-25-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Hans de Goede --- drivers/platform/x86/intel/pmc/pltdrv.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/pltdrv.c b/drivers/platform/x86= /intel/pmc/pltdrv.c index ddfba38c2104..22cfcd431987 100644 --- a/drivers/platform/x86/intel/pmc/pltdrv.c +++ b/drivers/platform/x86/intel/pmc/pltdrv.c @@ -35,14 +35,14 @@ static struct platform_device *pmc_core_device; * other list may grow, but this list should not. */ static const struct x86_cpu_id intel_pmc_core_platform_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &pmc_core_device), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &pmc_core_device), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &pmc_core_device), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &pmc_core_device), - X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &pmc_core_device), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &pmc_core_device), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &pmc_core_device), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &pmc_core_device), + X86_MATCH_VFM(INTEL_SKYLAKE_L, &pmc_core_device), + X86_MATCH_VFM(INTEL_SKYLAKE, &pmc_core_device), + X86_MATCH_VFM(INTEL_KABYLAKE_L, &pmc_core_device), + X86_MATCH_VFM(INTEL_KABYLAKE, &pmc_core_device), + X86_MATCH_VFM(INTEL_CANNONLAKE_L, &pmc_core_device), + X86_MATCH_VFM(INTEL_ICELAKE_L, &pmc_core_device), + X86_MATCH_VFM(INTEL_COMETLAKE, &pmc_core_device), + X86_MATCH_VFM(INTEL_COMETLAKE_L, &pmc_core_device), {} }; MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_platform_ids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 590C013BAD5 for ; Mon, 20 May 2024 22:46:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245210; cv=none; b=oACMQwThoGLJl6JwfWTkQ/VGuYVmkFA4HWU9EQpjjowBCBdzFYFGlpv/p38LcNsfhCCQ37skD7gWe6a6zbRHCxqd3eb5sEUugdlA/hVOIkcrsy6Mphj1d0pp4Yue3y2zkpSbfP+jgUJ4H2APEHC3jpC99DY57SYNnidXVz7Aqa8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245210; c=relaxed/simple; bh=OLHlnCNuMj+sFu5JTH/uGMhauld2ZygckWPVZ85rjKM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sgNlmBKK8nriLocSVZwgDVXTmF5g1cxhTTBueP6NbqiTQT7MwIS6FuhGR6E2feoRjtxqH1qeI+w4Od3Hafvhor7CorjHC5oCS3Z+ZFYteirDxSsiexZxdBvXlr+wrfkAX6QGGS2yPNrWvKDP/eXEvxEZyD0byXGFBJSAjOrtGH4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=j1Vu3iAQ; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="j1Vu3iAQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245208; x=1747781208; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OLHlnCNuMj+sFu5JTH/uGMhauld2ZygckWPVZ85rjKM=; b=j1Vu3iAQc8RWSm0TQyLtbcjnoIBIZShOD+9qPkKG3uU5NZv06DmgjS55 TtWfg6DfcMYJOR9QHEuwfz0q7EzF70bqlFklErCT7C8qZRoYgLQJE5Hk+ +yuEeaHKwr2iqJh6X9AlEEsqFPdcoDqY2H/a8y8w1Cw3Yo4gxUukY4cpN 3ENkYPo7CYTXuC6/vYlwk91S/YQhggBBEA/jewIDVKGSBlOKEebSgl+hV j2C2EKWUL4quT3nP+l8dDMhwScowVq73cuhHIzb9TJKmQmPgqHxpnaG+M 4ZW7scu6fSb5xWPInSuWvTQ8QkLPBfc6vKEZDrgYiuhUCfbHHEiriuga4 w==; X-CSE-ConnectionGUID: yI3nvE3IRWCNJfUTu3JCMg== X-CSE-MsgGUID: vLhvG3TFQGKlhMnS/zSqyA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199778" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199778" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 X-CSE-ConnectionGUID: TMjeR8kWS9uE0deKSyx3fQ== X-CSE-MsgGUID: iL7FbAFeQcqzh84XLr4/ng== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593457" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Hans de Goede Subject: [PATCH v6 25/49] platform/x86/intel/pmc: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:56 -0700 Message-ID: <20240520224620.9480-26-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Hans de Goede --- drivers/platform/x86/intel/pmc/core.c | 46 +++++++++++++-------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/i= ntel/pmc/core.c index 2ad2f8753e5d..65eb09c7af6a 100644 --- a/drivers/platform/x86/intel/pmc/core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -1293,29 +1293,29 @@ static void pmc_core_dbgfs_register(struct pmc_dev = *pmcdev) } =20 static const struct x86_cpu_id intel_pmc_core_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, spt_core_init), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, spt_core_init), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, spt_core_init), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, spt_core_init), - X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, cnp_core_init), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, icl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, icl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, cnp_core_init), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, cnp_core_init), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, tgl_l_core_init), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, tgl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, tgl_l_core_init), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, icl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, tgl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, tgl_l_core_init), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, tgl_l_core_init), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, adl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, tgl_l_core_init), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, adl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, adl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, mtl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, arl_core_init), - X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M, lnl_core_init), + X86_MATCH_VFM(INTEL_SKYLAKE_L, spt_core_init), + X86_MATCH_VFM(INTEL_SKYLAKE, spt_core_init), + X86_MATCH_VFM(INTEL_KABYLAKE_L, spt_core_init), + X86_MATCH_VFM(INTEL_KABYLAKE, spt_core_init), + X86_MATCH_VFM(INTEL_CANNONLAKE_L, cnp_core_init), + X86_MATCH_VFM(INTEL_ICELAKE_L, icl_core_init), + X86_MATCH_VFM(INTEL_ICELAKE_NNPI, icl_core_init), + X86_MATCH_VFM(INTEL_COMETLAKE, cnp_core_init), + X86_MATCH_VFM(INTEL_COMETLAKE_L, cnp_core_init), + X86_MATCH_VFM(INTEL_TIGERLAKE_L, tgl_l_core_init), + X86_MATCH_VFM(INTEL_TIGERLAKE, tgl_core_init), + X86_MATCH_VFM(INTEL_ATOM_TREMONT, tgl_l_core_init), + X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, icl_core_init), + X86_MATCH_VFM(INTEL_ROCKETLAKE, tgl_core_init), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, tgl_l_core_init), + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, tgl_l_core_init), + X86_MATCH_VFM(INTEL_ALDERLAKE, adl_core_init), + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, tgl_l_core_init), + X86_MATCH_VFM(INTEL_RAPTORLAKE, adl_core_init), + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, adl_core_init), + X86_MATCH_VFM(INTEL_METEORLAKE_L, mtl_core_init), + X86_MATCH_VFM(INTEL_ARROWLAKE, arl_core_init), + X86_MATCH_VFM(INTEL_LUNARLAKE_M, lnl_core_init), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 550F413BC2F for ; Mon, 20 May 2024 22:46:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245211; cv=none; b=aPplTXm57pGtg/vtdkr7plHhEK3B4qsM9EW5C6Bngc0V2jrndEZDIZaSXGkyDp419DvLvt6vByY/zkLmi5bmv4GElvrMRriF5Upns4sak5aZzKO75xnfeGFZKWL88vxsATEXHyOeddYJp+yEXr5xe8FsuYR5T2fnFOinhYPRaKE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245211; c=relaxed/simple; bh=3xWAckKLedIRwhhdnl1v4yxZLvPVQHJ+27f28hvh3oU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pmcsDCcqmb17Q9r+gn0LfbSJrq+ddLcJ1TSjyZusxKdWMrxaQK0yMS+al9qWUndGEXCpXULiRx7Luz2FGh+Pdu7QTHq4EWwjuXpk/X7prBNeh6Ndx2gLxfuaZLcVpyeiUUD6g2upNemUws7BtP06fWxFenGLuWgLua5QbEAU9Nc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=NDIPZWCc; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="NDIPZWCc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245209; x=1747781209; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3xWAckKLedIRwhhdnl1v4yxZLvPVQHJ+27f28hvh3oU=; b=NDIPZWCcq2FfOTuFzkRC/7emjTspGRQl6EQuD6zNJVdKD4gcRn3eJEvJ +QUWa40yAH5phNbLo2AeXtjXRJfuK4sKSf6i9j34m+8KkZh2moG7W1yw0 CiaGIQ2EQxRXwrQShig2Ela4IRpJr5m1wuumY9kMQ+GifAGTLhojf1axF n5q+uj6GGeMXJ21h8aFCKR/uyFBsYRfzIx25huSVNgXnTVfYeanCAsynt mX0Ifhw8rbDxLg4bmGODBqOFA+JEN2DMtq2tK6y01yrJFocKwCyLiOJPq uYGbxHeTfVVxT16GW57ugHDOSQycMT/Ud+HQrLwmG7dFqX09hlJvu5Yn1 w==; X-CSE-ConnectionGUID: gacjDGHCRRqwYhdSOiP2Cg== X-CSE-MsgGUID: BInRG8LdRCKH1jwwfahLRw== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199789" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199789" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 X-CSE-ConnectionGUID: E2xYQU4GSbqWd4uI7Ldm0w== X-CSE-MsgGUID: CP8JBdBpRDyt4+UbVW5oMQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593460" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 26/49] crypto: x86/poly1305 - Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:57 -0700 Message-ID: <20240520224620.9480-27-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- arch/x86/crypto/poly1305_glue.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/crypto/poly1305_glue.c b/arch/x86/crypto/poly1305_glu= e.c index 1dfb8af48a3c..08ff4b489f7e 100644 --- a/arch/x86/crypto/poly1305_glue.c +++ b/arch/x86/crypto/poly1305_glue.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include =20 asmlinkage void poly1305_init_x86_64(void *ctx, @@ -269,7 +269,7 @@ static int __init poly1305_simd_mod_init(void) boot_cpu_has(X86_FEATURE_AVX2) && boot_cpu_has(X86_FEATURE_AVX512F) && cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM | XFEATURE_MA= SK_AVX512, NULL) && /* Skylake downclocks unacceptably much when using zmm, but later gen= erations are fast. */ - boot_cpu_data.x86_model !=3D INTEL_FAM6_SKYLAKE_X) + boot_cpu_data.x86_vfm !=3D INTEL_SKYLAKE_X) static_branch_enable(&poly1305_use_avx512); return IS_REACHABLE(CONFIG_CRYPTO_HASH) ? crypto_register_shash(&alg) : 0; } --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8873B13A250 for ; Mon, 20 May 2024 22:46:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245212; cv=none; b=npyGuWqanVzC6UsOi2NesRc1VH1ry0lGiSH0I98S786T2dE/sEiLe92O2151LYa1FWtuuMncR0skMqey6N1QJ8xqVl8wAcnwsOcm2mYswpQhbp5tNI2rRJx2qTGLvc9MMvqutzHyQMDgtnXr9489PUkodUhKnk2J6vKDU/MCs4o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245212; c=relaxed/simple; bh=3WkOU6MGepSbNzlZYklRMkoGMRR4hELasBxQk7ecM/M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OpDel/6lZC//cztkKhZgP4C8zsKGQeM7W+UI+oOmbZM0Rsza7qcJOO3/PiuEcw7q8XN/JJeIrfWqJ8CNcMISU8fnhLy6hDNts8It46ST69QKzWA0j0Szm/0zNem1rqbf7XcuUgBnr73aP6vol6zDieFPwmZTmRqi3DrBry06h2M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=E3ciYy8L; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="E3ciYy8L" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245210; x=1747781210; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3WkOU6MGepSbNzlZYklRMkoGMRR4hELasBxQk7ecM/M=; b=E3ciYy8LjO434GafJB1+ZDV/eSDqUukpZjMeEDGeqbDhubk1G+hdedF4 4f3KOrbFPaGFcndZJyGFDqTTx4I2wEJCx1+OjvFZ0KXygoUA7mvKGy6Ex dOjZa0LxLnBfrxdULEFHyRzD9efyB9mV93vJ1ef98CC0GfpJE4oNeLYEq pzlE6VkTX1JvEBSa8PPGT4TPGZ3ubnBDNidIeswTdzTV7yMOnpklfGuGD xeUYrFV6zDOnsWnr8t7cdGyPxLBaA/xzFvG+UVDxe0NRJlEdA+hpwDhUh /sZI/yamzbQniGaxyvVvwpe2OYT7pccemFwv7zRlKliHZcSox5s+uQQp8 w==; X-CSE-ConnectionGUID: qVZ177c+QKW1SvH2FUoaEQ== X-CSE-MsgGUID: qz9WyzemQqWbnHqxOJ4fiw== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199806" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199806" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 X-CSE-ConnectionGUID: jFJhqsSdRmmykK9g8P5rJQ== X-CSE-MsgGUID: 8mxoelrKRayXkmN67REZ2w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593463" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 27/49] crypto: x86/twofish - Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:58 -0700 Message-ID: <20240520224620.9480-28-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- arch/x86/crypto/twofish_glue_3way.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/x86/crypto/twofish_glue_3way.c b/arch/x86/crypto/twofish_= glue_3way.c index 90454cf18e0d..82311249048f 100644 --- a/arch/x86/crypto/twofish_glue_3way.c +++ b/arch/x86/crypto/twofish_glue_3way.c @@ -12,6 +12,8 @@ #include #include =20 +#include + #include "twofish.h" #include "ecb_cbc_helpers.h" =20 @@ -107,10 +109,10 @@ static bool is_blacklisted_cpu(void) if (boot_cpu_data.x86_vendor !=3D X86_VENDOR_INTEL) return false; =20 - if (boot_cpu_data.x86 =3D=3D 0x06 && - (boot_cpu_data.x86_model =3D=3D 0x1c || - boot_cpu_data.x86_model =3D=3D 0x26 || - boot_cpu_data.x86_model =3D=3D 0x36)) { + switch (boot_cpu_data.x86_vfm) { + case INTEL_ATOM_BONNELL: + case INTEL_ATOM_BONNELL_MID: + case INTEL_ATOM_SALTWELL: /* * On Atom, twofish-3way is slower than original assembler * implementation. Twofish-3way trades off some performance in --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9754713BC3F for ; Mon, 20 May 2024 22:46:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245211; cv=none; b=NTTEQ50Xih0VrXp5DJCiUF74RwhN7WavJOoZJxwu7Ce0omwTdw56yAiNB0A/CW/OfHwc2iJa82MmPSZBkkDSL4NdytT/hh2ggpV26Z9rstlKqt+STWQRkLm8LmgM7dtvlAR/dCl4+vjWL8KyYIIsI7NydGkKHqHPCMeXkkfTd0U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245211; c=relaxed/simple; bh=l3ocWaXogaTkgtbM/N+j+qLt8Sod225GVPVLcrQcTCY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=otpkwee3SmQltIHaD4z1VqrpJ6nxU7icxAzObnnf/civsfDXag0/rHnOdfIXvtYArOYA+3cY/8QX1FAkGHReNlxEuZH4EdjFKlkFmyu1X4lhky9oO5tER/LzQF2f8y7dUiFDZdHm21PFcgzHxZifrClteUvuQvLSR5avWy0QCxk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=e2yXb5xz; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="e2yXb5xz" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245210; x=1747781210; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=l3ocWaXogaTkgtbM/N+j+qLt8Sod225GVPVLcrQcTCY=; b=e2yXb5xzw7nwYH3DmB94tixSPM3Zj+WL7p1jKPUlGRsjnN7YA2wB0m5M GxZzBThrq+yonIgNQF079TsoZZxBVRfHlY5BpM/qLYAQEcSO+WDahkpTA aP4KjAITp3rLkRZV85VICReuPsvv0AiiQFpcPIrnaytgsrNRRGw4rc44h G4na7fRFuE131lqrVTYg91001/2AMrDz7VHfr1ZmVGW7oY/FLol0eImAO fqJ5ZJDcoxb/hqz2PaRrcp1VRBHEEq2iLi/mnIUprzFoBAds+XJ+uTQiv 9zOS4Jv8cYJ+zc8+Ug6C38YjDc3u3z0PRUy5p/1R46j+TuGsH0a/Q8+q3 A==; X-CSE-ConnectionGUID: nh4bqoicStKrrVRhWCTAjA== X-CSE-MsgGUID: wFWuVhKHTc66Ux2ekt7Ykw== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199818" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199818" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 X-CSE-ConnectionGUID: jgTm0rwLTN+B10D4WpyHZQ== X-CSE-MsgGUID: T2fWzsTnSCirRuVZuSPuIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593467" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 28/49] x86/cpu/intel: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:45:59 -0700 Message-ID: <20240520224620.9480-29-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/intel.c | 108 ++++++++++++++++++------------------ 1 file changed, 53 insertions(+), 55 deletions(-) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 3c3e7e5695ba..98ff73c6ace0 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -72,19 +72,19 @@ static bool cpu_model_supports_sld __ro_after_init; */ static void check_memory_type_self_snoop_errata(struct cpuinfo_x86 *c) { - switch (c->x86_model) { - case INTEL_FAM6_CORE_YONAH: - case INTEL_FAM6_CORE2_MEROM: - case INTEL_FAM6_CORE2_MEROM_L: - case INTEL_FAM6_CORE2_PENRYN: - case INTEL_FAM6_CORE2_DUNNINGTON: - case INTEL_FAM6_NEHALEM: - case INTEL_FAM6_NEHALEM_G: - case INTEL_FAM6_NEHALEM_EP: - case INTEL_FAM6_NEHALEM_EX: - case INTEL_FAM6_WESTMERE: - case INTEL_FAM6_WESTMERE_EP: - case INTEL_FAM6_SANDYBRIDGE: + switch (c->x86_vfm) { + case INTEL_CORE_YONAH: + case INTEL_CORE2_MEROM: + case INTEL_CORE2_MEROM_L: + case INTEL_CORE2_PENRYN: + case INTEL_CORE2_DUNNINGTON: + case INTEL_NEHALEM: + case INTEL_NEHALEM_G: + case INTEL_NEHALEM_EP: + case INTEL_NEHALEM_EX: + case INTEL_WESTMERE: + case INTEL_WESTMERE_EP: + case INTEL_SANDYBRIDGE: setup_clear_cpu_cap(X86_FEATURE_SELFSNOOP); } } @@ -106,9 +106,9 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *= c) */ if (c->x86 !=3D 6) return; - switch (c->x86_model) { - case INTEL_FAM6_XEON_PHI_KNL: - case INTEL_FAM6_XEON_PHI_KNM: + switch (c->x86_vfm) { + case INTEL_XEON_PHI_KNL: + case INTEL_XEON_PHI_KNM: break; default: return; @@ -134,32 +134,32 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86= *c) * - Release note from 20180108 microcode release */ struct sku_microcode { - u8 model; + u32 vfm; u8 stepping; u32 microcode; }; static const struct sku_microcode spectre_bad_microcodes[] =3D { - { INTEL_FAM6_KABYLAKE, 0x0B, 0x80 }, - { INTEL_FAM6_KABYLAKE, 0x0A, 0x80 }, - { INTEL_FAM6_KABYLAKE, 0x09, 0x80 }, - { INTEL_FAM6_KABYLAKE_L, 0x0A, 0x80 }, - { INTEL_FAM6_KABYLAKE_L, 0x09, 0x80 }, - { INTEL_FAM6_SKYLAKE_X, 0x03, 0x0100013e }, - { INTEL_FAM6_SKYLAKE_X, 0x04, 0x0200003c }, - { INTEL_FAM6_BROADWELL, 0x04, 0x28 }, - { INTEL_FAM6_BROADWELL_G, 0x01, 0x1b }, - { INTEL_FAM6_BROADWELL_D, 0x02, 0x14 }, - { INTEL_FAM6_BROADWELL_D, 0x03, 0x07000011 }, - { INTEL_FAM6_BROADWELL_X, 0x01, 0x0b000025 }, - { INTEL_FAM6_HASWELL_L, 0x01, 0x21 }, - { INTEL_FAM6_HASWELL_G, 0x01, 0x18 }, - { INTEL_FAM6_HASWELL, 0x03, 0x23 }, - { INTEL_FAM6_HASWELL_X, 0x02, 0x3b }, - { INTEL_FAM6_HASWELL_X, 0x04, 0x10 }, - { INTEL_FAM6_IVYBRIDGE_X, 0x04, 0x42a }, + { INTEL_KABYLAKE, 0x0B, 0x80 }, + { INTEL_KABYLAKE, 0x0A, 0x80 }, + { INTEL_KABYLAKE, 0x09, 0x80 }, + { INTEL_KABYLAKE_L, 0x0A, 0x80 }, + { INTEL_KABYLAKE_L, 0x09, 0x80 }, + { INTEL_SKYLAKE_X, 0x03, 0x0100013e }, + { INTEL_SKYLAKE_X, 0x04, 0x0200003c }, + { INTEL_BROADWELL, 0x04, 0x28 }, + { INTEL_BROADWELL_G, 0x01, 0x1b }, + { INTEL_BROADWELL_D, 0x02, 0x14 }, + { INTEL_BROADWELL_D, 0x03, 0x07000011 }, + { INTEL_BROADWELL_X, 0x01, 0x0b000025 }, + { INTEL_HASWELL_L, 0x01, 0x21 }, + { INTEL_HASWELL_G, 0x01, 0x18 }, + { INTEL_HASWELL, 0x03, 0x23 }, + { INTEL_HASWELL_X, 0x02, 0x3b }, + { INTEL_HASWELL_X, 0x04, 0x10 }, + { INTEL_IVYBRIDGE_X, 0x04, 0x42a }, /* Observed in the wild */ - { INTEL_FAM6_SANDYBRIDGE_X, 0x06, 0x61b }, - { INTEL_FAM6_SANDYBRIDGE_X, 0x07, 0x712 }, + { INTEL_SANDYBRIDGE_X, 0x06, 0x61b }, + { INTEL_SANDYBRIDGE_X, 0x07, 0x712 }, }; =20 static bool bad_spectre_microcode(struct cpuinfo_x86 *c) @@ -173,11 +173,8 @@ static bool bad_spectre_microcode(struct cpuinfo_x86 *= c) if (cpu_has(c, X86_FEATURE_HYPERVISOR)) return false; =20 - if (c->x86 !=3D 6) - return false; - for (i =3D 0; i < ARRAY_SIZE(spectre_bad_microcodes); i++) { - if (c->x86_model =3D=3D spectre_bad_microcodes[i].model && + if (c->x86_vfm =3D=3D spectre_bad_microcodes[i].vfm && c->x86_stepping =3D=3D spectre_bad_microcodes[i].stepping) return (c->microcode <=3D spectre_bad_microcodes[i].microcode); } @@ -313,7 +310,7 @@ static void early_init_intel(struct cpuinfo_x86 *c) * need the microcode to have already been loaded... so if it is * not, recommend a BIOS update and disable large pages. */ - if (c->x86 =3D=3D 6 && c->x86_model =3D=3D 0x1c && c->x86_stepping <=3D 2= && + if (c->x86_vfm =3D=3D INTEL_ATOM_BONNELL && c->x86_stepping <=3D 2 && c->microcode < 0x20e) { pr_warn("Atom PSE erratum detected, BIOS microcode update recommended\n"= ); clear_cpu_cap(c, X86_FEATURE_PSE); @@ -346,11 +343,11 @@ static void early_init_intel(struct cpuinfo_x86 *c) =20 /* Penwell and Cloverview have the TSC which doesn't sleep on S3 */ if (c->x86 =3D=3D 6) { - switch (c->x86_model) { - case INTEL_FAM6_ATOM_SALTWELL_MID: - case INTEL_FAM6_ATOM_SALTWELL_TABLET: - case INTEL_FAM6_ATOM_SILVERMONT_MID: - case INTEL_FAM6_ATOM_AIRMONT_NP: + switch (c->x86_vfm) { + case INTEL_ATOM_SALTWELL_MID: + case INTEL_ATOM_SALTWELL_TABLET: + case INTEL_ATOM_SILVERMONT_MID: + case INTEL_ATOM_AIRMONT_NP: set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3); break; default: @@ -394,7 +391,7 @@ static void early_init_intel(struct cpuinfo_x86 *c) * should be false so that __flush_tlb_all() causes CR3 instead of CR4.PGE * to be modified. */ - if (c->x86 =3D=3D 5 && c->x86_model =3D=3D 9) { + if (c->x86_vfm =3D=3D INTEL_QUARK_X1000) { pr_info("Disabling PGE capability bit\n"); setup_clear_cpu_cap(X86_FEATURE_PGE); } @@ -626,12 +623,13 @@ static void init_intel(struct cpuinfo_x86 *c) set_cpu_cap(c, X86_FEATURE_PEBS); } =20 - if (c->x86 =3D=3D 6 && boot_cpu_has(X86_FEATURE_CLFLUSH) && - (c->x86_model =3D=3D 29 || c->x86_model =3D=3D 46 || c->x86_model =3D= =3D 47)) + if (boot_cpu_has(X86_FEATURE_CLFLUSH) && + (c->x86_vfm =3D=3D INTEL_CORE2_DUNNINGTON || + c->x86_vfm =3D=3D INTEL_NEHALEM_EX || + c->x86_vfm =3D=3D INTEL_WESTMERE_EX)) set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR); =20 - if (c->x86 =3D=3D 6 && boot_cpu_has(X86_FEATURE_MWAIT) && - ((c->x86_model =3D=3D INTEL_FAM6_ATOM_GOLDMONT))) + if (boot_cpu_has(X86_FEATURE_MWAIT) && c->x86_vfm =3D=3D INTEL_ATOM_GOLDM= ONT) set_cpu_bug(c, X86_BUG_MONITOR); =20 #ifdef CONFIG_X86_64 @@ -1247,9 +1245,9 @@ void handle_bus_lock(struct pt_regs *regs) * feature even though they do not enumerate IA32_CORE_CAPABILITIES. */ static const struct x86_cpu_id split_lock_cpu_ids[] __initconst =3D { - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, 0), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, 0), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, 0), + X86_MATCH_VFM(INTEL_ICELAKE_X, 0), + X86_MATCH_VFM(INTEL_ICELAKE_L, 0), + X86_MATCH_VFM(INTEL_ICELAKE_D, 0), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 667FF13C660 for ; Mon, 20 May 2024 22:46:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245212; cv=none; b=FPeWv5OLXbq2m1WUSAF0VcZA/xi9Fh78x8oEWaqi4Jk9ggrHYtDsmEo5M7G6lHaZ60kRriKaskqltkup+9I1qHSGQ+oUQYQY9mLh+8kawlDT0mMbp3o19guLhia3KE9DaR7bWOAxmNIP1ED4zdWkL3/Ad5xXR4NE+gsEtepkT8w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245212; c=relaxed/simple; bh=lbpkB4zBQpI4GcfCpRLlxtqxYH5hSB0ZDHxIhsLKKBA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bCg4QDwA6NUUBK/hm2x8z1RY4Mj00NCwtDWAJcDoo0MuNea+yCVQqfTH0/g+6xD9F6DtCfjxwbG2FR9MmBK5e/3eheMFIjSnA0rHaVmLTPUD072NXRQoguC8zMivl4hG45Dq6XcpEFxyYeXaSAu8LTtD5lciyZVFlKiFbMRuOS0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nKqUfhqW; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nKqUfhqW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245210; x=1747781210; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lbpkB4zBQpI4GcfCpRLlxtqxYH5hSB0ZDHxIhsLKKBA=; b=nKqUfhqW1T+TdSkjZMwh8GWyqLHknWk/mrofBfuev1X3zFOfqirDeuOZ f/XSB1eDNxgE/KHULbZUq+atYOdwC4qUa2zBlYsQpBvOw8yp0b2C51XBs e0Q5ONAlYCuj9VFQQSM2ofi80k0zwlzkbMzbSK6jb1AQtzXUE2MYtDMuq j/cVYvtu7lrdk42O3N3PXoweodi6mreh5RMSbW7dq+h4hPtQXaUlLSz36 aGvsVlR3udO84IzLa+n7xJ30fmB9fKMvGQzswpT1X0t5UKvAG5AXBgHGZ vax0Kok0L8gYxHaHz/Bg74eyMBAXigfzOVyasKSX5rclUBQyIIwl8xZgv g==; X-CSE-ConnectionGUID: Q9qS81HvRMOB25C3AKhxBQ== X-CSE-MsgGUID: gTqtKHzUTtaiy9+7ymKjbQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199829" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199829" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 X-CSE-ConnectionGUID: O4y47AxMTaynDCoGD+QjFA== X-CSE-MsgGUID: DK/YWFaeRTu19v5t14xv2w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593470" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 29/49] x86/PCI: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:00 -0700 Message-ID: <20240520224620.9480-30-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- arch/x86/pci/intel_mid_pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c index 8edd62206604..933ff795e53e 100644 --- a/arch/x86/pci/intel_mid_pci.c +++ b/arch/x86/pci/intel_mid_pci.c @@ -216,7 +216,7 @@ static int pci_write(struct pci_bus *bus, unsigned int = devfn, int where, } =20 static const struct x86_cpu_id intel_mid_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, NULL), {} }; =20 @@ -243,7 +243,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) model =3D id->model; =20 switch (model) { - case INTEL_FAM6_ATOM_SILVERMONT_MID: + case VFM_MODEL(INTEL_ATOM_SILVERMONT_MID): polarity_low =3D false; =20 /* Special treatment for IRQ0 */ --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64BEC13C801 for ; Mon, 20 May 2024 22:46:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245213; cv=none; b=HCaLQmmFdsT9fKM5UPNd7bQTjJ0juGwoVBRFASWLl7W/M1gYQjCr2d6RhPFDcoQErbpZuUbyqPpgD+OnA2sb6jNXDCFf6TsTouNPaqr4+C7LKy6IWwjcLZkAKGa4M0j5Yjf3ETyOLHYI7fCS3yaKKEVs7fG+1b5Cta7hm85y2JA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245213; c=relaxed/simple; bh=dSW16Z5owqXk0diJ8oqVw/YYkOHbNprsGlWIpUTivak=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Dpu8Orq/FkiXXwisSimNJfkCARnJnaduh9cOCqdS45GdlsDWLrY7Py2S84Dp/cMe+6VBBTHr58QlHsBAjwYTCpZB8jGMFbysXbmUBl+DUc68bxRnaQ/oVsZAJuiaGm1Q+TmB7WfEE6NOsZ3cR4NGRgAiXfD8GYsUN7egb8JQ+rs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=GIuNz72K; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="GIuNz72K" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245211; x=1747781211; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dSW16Z5owqXk0diJ8oqVw/YYkOHbNprsGlWIpUTivak=; b=GIuNz72K2RcCm7Kc6Au2PBfql2nGe4o8nO98kKOfXBNlSq1prHQypbit pXQ7c/nqQiS9mMx/zfNQPi/OxKvYRnmwaCUr1sZowoTPZ0hwoimAnaiuh 5arzch3P+bAYlsAarwExufc66bQzuwXK5+KFMJVW2x6N0DsmokCvHb/UY 1tKDMhHhsCZWAH5NwfJ9gzlgz73GnKucJkta6Hl8Y9Hx26T6eyN/T03bs RFamzH5dPr/7UAuiHFiCWYPE6UoMH9LCKi7aQZQEkpoWzkbgEWj2CQsWR hxo6VC1BIJF44RADAMuSyX2aRTpWJijXNeGxKWJxBAVvqfDDP0ocppMll A==; X-CSE-ConnectionGUID: pOLs1EyFRBumNLNNMWLbrg== X-CSE-MsgGUID: 5TBdsGz9SxaPL1hXgHDf1A== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199836" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199836" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 X-CSE-ConnectionGUID: 10UPfhpOSu27kDmEtACdaw== X-CSE-MsgGUID: 15/3bRvIQzO/o2blYupKog== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593473" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:38 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 30/49] x86/virt/tdx: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:01 -0700 Message-ID: <20240520224620.9480-31-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- arch/x86/virt/vmx/tdx/tdx.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c index 49a1c6890b55..4e2b2e2ac9f9 100644 --- a/arch/x86/virt/vmx/tdx/tdx.c +++ b/arch/x86/virt/vmx/tdx/tdx.c @@ -33,7 +33,7 @@ #include #include #include -#include +#include #include #include #include "tdx.h" @@ -1426,9 +1426,9 @@ static void __init check_tdx_erratum(void) * private memory poisons that memory, and a subsequent read of * that memory triggers #MC. */ - switch (boot_cpu_data.x86_model) { - case INTEL_FAM6_SAPPHIRERAPIDS_X: - case INTEL_FAM6_EMERALDRAPIDS_X: + switch (boot_cpu_data.x86_vfm) { + case INTEL_SAPPHIRERAPIDS_X: + case INTEL_EMERALDRAPIDS_X: setup_force_cpu_bug(X86_BUG_TDX_PW_MCE); } } --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9031813C66C for ; Mon, 20 May 2024 22:46:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245213; cv=none; b=a/uvUxNrR1uIKHW6NhLwNIKJW5VsCexQk9Dtw0d9OltMnswF7pBq+X68n81kqH7ILIGgMR5jbc1kkx2KZafGolKksujw0++yZC1V01aPCcWxFyHUmwbWG9QasTxmn7JmtA5njdQxwcCKCbkom0qH0ApNeP0U9U/Xg/vvaD7EFXM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245213; c=relaxed/simple; bh=CQdIbxPFFGxZJY8rjttoFMJO6IYQfNb94Hv8400ZZHk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gvAEe4y2ZsYFOm1hKGZKt5YwVek2AqolQZ3OZOg8pXRE0vTW/KqrEYhQabloSQwf4LvLrHk5ua7JRqN0PFWzY4xdpaa3wroouaKhHbpCNDV6eBVMcWXmVPn6ybLhenz1jsOLh05i5x0Ilag0iDY4Ai2n3egSdajfKVSTpVfVnIs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jF/pHmKR; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jF/pHmKR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245211; x=1747781211; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CQdIbxPFFGxZJY8rjttoFMJO6IYQfNb94Hv8400ZZHk=; b=jF/pHmKRvgNNE87mcCts8t03HzNcfa8Or84OvT4zX/6iRTzunrqIl2iZ 51xNUzf4IyzV1xw5F1sbvX11zpBFy52/5Ma3mD0IxwVRSqaH6/0+P3YBb cvrdOeAqroU1FDy97+cIFM0hl60H8kYob3Kv75DJuEjN9HNFNkUTVhdf1 a44amDPc4QxjThLlcjKmn5haOG8XB+SGSRL7mzB8J2ifjW3SO51UMbnvy R1DUvRsUcd18vOuyzRSX9rbkq5p8pcG2ZJjJjTWhR9+yGtExdxRm7UcLD H0bn87GLMI4dfPHXXE4uoBYMVOgqjmjASKlvl9IQEkeS3Kkbh9B732Dj0 w==; X-CSE-ConnectionGUID: BIDepFvcSoimYNIbHT2rDQ== X-CSE-MsgGUID: Os2SGVQkQVi06yWXMghp4w== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199844" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199844" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 X-CSE-ConnectionGUID: XTqqqq27Qwm3AZNn7j3FJQ== X-CSE-MsgGUID: VbRFuBxrQn25GpiKGCSBfQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593476" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 31/49] perf/x86/intel: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:02 -0700 Message-ID: <20240520224620.9480-32-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- arch/x86/events/intel/core.c | 148 +++++++++++++++++------------------ 1 file changed, 74 insertions(+), 74 deletions(-) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 768d1414897f..94206f8cd371 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -4698,8 +4698,8 @@ static void intel_pmu_check_extra_regs(struct extra_r= eg *extra_regs); static inline bool intel_pmu_broken_perf_cap(void) { /* The Perf Metric (Bit 15) is always cleared */ - if ((boot_cpu_data.x86_model =3D=3D INTEL_FAM6_METEORLAKE) || - (boot_cpu_data.x86_model =3D=3D INTEL_FAM6_METEORLAKE_L)) + if (boot_cpu_data.x86_vfm =3D=3D INTEL_METEORLAKE || + boot_cpu_data.x86_vfm =3D=3D INTEL_METEORLAKE_L) return true; =20 return false; @@ -6245,19 +6245,19 @@ __init int intel_pmu_init(void) /* * Install the hw-cache-events table: */ - switch (boot_cpu_data.x86_model) { - case INTEL_FAM6_CORE_YONAH: + switch (boot_cpu_data.x86_vfm) { + case INTEL_CORE_YONAH: pr_cont("Core events, "); name =3D "core"; break; =20 - case INTEL_FAM6_CORE2_MEROM: + case INTEL_CORE2_MEROM: x86_add_quirk(intel_clovertown_quirk); fallthrough; =20 - case INTEL_FAM6_CORE2_MEROM_L: - case INTEL_FAM6_CORE2_PENRYN: - case INTEL_FAM6_CORE2_DUNNINGTON: + case INTEL_CORE2_MEROM_L: + case INTEL_CORE2_PENRYN: + case INTEL_CORE2_DUNNINGTON: memcpy(hw_cache_event_ids, core2_hw_cache_event_ids, sizeof(hw_cache_event_ids)); =20 @@ -6269,9 +6269,9 @@ __init int intel_pmu_init(void) name =3D "core2"; break; =20 - case INTEL_FAM6_NEHALEM: - case INTEL_FAM6_NEHALEM_EP: - case INTEL_FAM6_NEHALEM_EX: + case INTEL_NEHALEM: + case INTEL_NEHALEM_EP: + case INTEL_NEHALEM_EX: memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs, @@ -6303,11 +6303,11 @@ __init int intel_pmu_init(void) name =3D "nehalem"; break; =20 - case INTEL_FAM6_ATOM_BONNELL: - case INTEL_FAM6_ATOM_BONNELL_MID: - case INTEL_FAM6_ATOM_SALTWELL: - case INTEL_FAM6_ATOM_SALTWELL_MID: - case INTEL_FAM6_ATOM_SALTWELL_TABLET: + case INTEL_ATOM_BONNELL: + case INTEL_ATOM_BONNELL_MID: + case INTEL_ATOM_SALTWELL: + case INTEL_ATOM_SALTWELL_MID: + case INTEL_ATOM_SALTWELL_TABLET: memcpy(hw_cache_event_ids, atom_hw_cache_event_ids, sizeof(hw_cache_event_ids)); =20 @@ -6320,11 +6320,11 @@ __init int intel_pmu_init(void) name =3D "bonnell"; break; =20 - case INTEL_FAM6_ATOM_SILVERMONT: - case INTEL_FAM6_ATOM_SILVERMONT_D: - case INTEL_FAM6_ATOM_SILVERMONT_MID: - case INTEL_FAM6_ATOM_AIRMONT: - case INTEL_FAM6_ATOM_AIRMONT_MID: + case INTEL_ATOM_SILVERMONT: + case INTEL_ATOM_SILVERMONT_D: + case INTEL_ATOM_SILVERMONT_MID: + case INTEL_ATOM_AIRMONT: + case INTEL_ATOM_AIRMONT_MID: memcpy(hw_cache_event_ids, slm_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs, @@ -6342,8 +6342,8 @@ __init int intel_pmu_init(void) name =3D "silvermont"; break; =20 - case INTEL_FAM6_ATOM_GOLDMONT: - case INTEL_FAM6_ATOM_GOLDMONT_D: + case INTEL_ATOM_GOLDMONT: + case INTEL_ATOM_GOLDMONT_D: memcpy(hw_cache_event_ids, glm_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, glm_hw_cache_extra_regs, @@ -6369,7 +6369,7 @@ __init int intel_pmu_init(void) name =3D "goldmont"; break; =20 - case INTEL_FAM6_ATOM_GOLDMONT_PLUS: + case INTEL_ATOM_GOLDMONT_PLUS: memcpy(hw_cache_event_ids, glp_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, glp_hw_cache_extra_regs, @@ -6398,9 +6398,9 @@ __init int intel_pmu_init(void) name =3D "goldmont_plus"; break; =20 - case INTEL_FAM6_ATOM_TREMONT_D: - case INTEL_FAM6_ATOM_TREMONT: - case INTEL_FAM6_ATOM_TREMONT_L: + case INTEL_ATOM_TREMONT_D: + case INTEL_ATOM_TREMONT: + case INTEL_ATOM_TREMONT_L: x86_pmu.late_ack =3D true; memcpy(hw_cache_event_ids, glp_hw_cache_event_ids, sizeof(hw_cache_event_ids)); @@ -6427,7 +6427,7 @@ __init int intel_pmu_init(void) name =3D "Tremont"; break; =20 - case INTEL_FAM6_ATOM_GRACEMONT: + case INTEL_ATOM_GRACEMONT: intel_pmu_init_grt(NULL); intel_pmu_pebs_data_source_grt(); x86_pmu.pebs_latency_data =3D adl_latency_data_small; @@ -6439,8 +6439,8 @@ __init int intel_pmu_init(void) name =3D "gracemont"; break; =20 - case INTEL_FAM6_ATOM_CRESTMONT: - case INTEL_FAM6_ATOM_CRESTMONT_X: + case INTEL_ATOM_CRESTMONT: + case INTEL_ATOM_CRESTMONT_X: intel_pmu_init_grt(NULL); x86_pmu.extra_regs =3D intel_cmt_extra_regs; intel_pmu_pebs_data_source_cmt(); @@ -6453,9 +6453,9 @@ __init int intel_pmu_init(void) name =3D "crestmont"; break; =20 - case INTEL_FAM6_WESTMERE: - case INTEL_FAM6_WESTMERE_EP: - case INTEL_FAM6_WESTMERE_EX: + case INTEL_WESTMERE: + case INTEL_WESTMERE_EP: + case INTEL_WESTMERE_EX: memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs, @@ -6484,8 +6484,8 @@ __init int intel_pmu_init(void) name =3D "westmere"; break; =20 - case INTEL_FAM6_SANDYBRIDGE: - case INTEL_FAM6_SANDYBRIDGE_X: + case INTEL_SANDYBRIDGE: + case INTEL_SANDYBRIDGE_X: x86_add_quirk(intel_sandybridge_quirk); x86_add_quirk(intel_ht_bug); memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, @@ -6498,7 +6498,7 @@ __init int intel_pmu_init(void) x86_pmu.event_constraints =3D intel_snb_event_constraints; x86_pmu.pebs_constraints =3D intel_snb_pebs_event_constraints; x86_pmu.pebs_aliases =3D intel_pebs_aliases_snb; - if (boot_cpu_data.x86_model =3D=3D INTEL_FAM6_SANDYBRIDGE_X) + if (boot_cpu_data.x86_vfm =3D=3D INTEL_SANDYBRIDGE_X) x86_pmu.extra_regs =3D intel_snbep_extra_regs; else x86_pmu.extra_regs =3D intel_snb_extra_regs; @@ -6524,8 +6524,8 @@ __init int intel_pmu_init(void) name =3D "sandybridge"; break; =20 - case INTEL_FAM6_IVYBRIDGE: - case INTEL_FAM6_IVYBRIDGE_X: + case INTEL_IVYBRIDGE: + case INTEL_IVYBRIDGE_X: x86_add_quirk(intel_ht_bug); memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, sizeof(hw_cache_event_ids)); @@ -6541,7 +6541,7 @@ __init int intel_pmu_init(void) x86_pmu.pebs_constraints =3D intel_ivb_pebs_event_constraints; x86_pmu.pebs_aliases =3D intel_pebs_aliases_ivb; x86_pmu.pebs_prec_dist =3D true; - if (boot_cpu_data.x86_model =3D=3D INTEL_FAM6_IVYBRIDGE_X) + if (boot_cpu_data.x86_vfm =3D=3D INTEL_IVYBRIDGE_X) x86_pmu.extra_regs =3D intel_snbep_extra_regs; else x86_pmu.extra_regs =3D intel_snb_extra_regs; @@ -6563,10 +6563,10 @@ __init int intel_pmu_init(void) break; =20 =20 - case INTEL_FAM6_HASWELL: - case INTEL_FAM6_HASWELL_X: - case INTEL_FAM6_HASWELL_L: - case INTEL_FAM6_HASWELL_G: + case INTEL_HASWELL: + case INTEL_HASWELL_X: + case INTEL_HASWELL_L: + case INTEL_HASWELL_G: x86_add_quirk(intel_ht_bug); x86_add_quirk(intel_pebs_isolation_quirk); x86_pmu.late_ack =3D true; @@ -6596,10 +6596,10 @@ __init int intel_pmu_init(void) name =3D "haswell"; break; =20 - case INTEL_FAM6_BROADWELL: - case INTEL_FAM6_BROADWELL_D: - case INTEL_FAM6_BROADWELL_G: - case INTEL_FAM6_BROADWELL_X: + case INTEL_BROADWELL: + case INTEL_BROADWELL_D: + case INTEL_BROADWELL_G: + case INTEL_BROADWELL_X: x86_add_quirk(intel_pebs_isolation_quirk); x86_pmu.late_ack =3D true; memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event= _ids)); @@ -6638,8 +6638,8 @@ __init int intel_pmu_init(void) name =3D "broadwell"; break; =20 - case INTEL_FAM6_XEON_PHI_KNL: - case INTEL_FAM6_XEON_PHI_KNM: + case INTEL_XEON_PHI_KNL: + case INTEL_XEON_PHI_KNM: memcpy(hw_cache_event_ids, slm_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, @@ -6658,15 +6658,15 @@ __init int intel_pmu_init(void) name =3D "knights-landing"; break; =20 - case INTEL_FAM6_SKYLAKE_X: + case INTEL_SKYLAKE_X: pmem =3D true; fallthrough; - case INTEL_FAM6_SKYLAKE_L: - case INTEL_FAM6_SKYLAKE: - case INTEL_FAM6_KABYLAKE_L: - case INTEL_FAM6_KABYLAKE: - case INTEL_FAM6_COMETLAKE_L: - case INTEL_FAM6_COMETLAKE: + case INTEL_SKYLAKE_L: + case INTEL_SKYLAKE: + case INTEL_KABYLAKE_L: + case INTEL_KABYLAKE: + case INTEL_COMETLAKE_L: + case INTEL_COMETLAKE: x86_add_quirk(intel_pebs_isolation_quirk); x86_pmu.late_ack =3D true; memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event= _ids)); @@ -6715,16 +6715,16 @@ __init int intel_pmu_init(void) name =3D "skylake"; break; =20 - case INTEL_FAM6_ICELAKE_X: - case INTEL_FAM6_ICELAKE_D: + case INTEL_ICELAKE_X: + case INTEL_ICELAKE_D: x86_pmu.pebs_ept =3D 1; pmem =3D true; fallthrough; - case INTEL_FAM6_ICELAKE_L: - case INTEL_FAM6_ICELAKE: - case INTEL_FAM6_TIGERLAKE_L: - case INTEL_FAM6_TIGERLAKE: - case INTEL_FAM6_ROCKETLAKE: + case INTEL_ICELAKE_L: + case INTEL_ICELAKE: + case INTEL_TIGERLAKE_L: + case INTEL_TIGERLAKE: + case INTEL_ROCKETLAKE: x86_pmu.late_ack =3D true; memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event= _ids)); memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_ext= ra_regs)); @@ -6759,13 +6759,13 @@ __init int intel_pmu_init(void) name =3D "icelake"; break; =20 - case INTEL_FAM6_SAPPHIRERAPIDS_X: - case INTEL_FAM6_EMERALDRAPIDS_X: + case INTEL_SAPPHIRERAPIDS_X: + case INTEL_EMERALDRAPIDS_X: x86_pmu.flags |=3D PMU_FL_MEM_LOADS_AUX; x86_pmu.extra_regs =3D intel_glc_extra_regs; fallthrough; - case INTEL_FAM6_GRANITERAPIDS_X: - case INTEL_FAM6_GRANITERAPIDS_D: + case INTEL_GRANITERAPIDS_X: + case INTEL_GRANITERAPIDS_D: intel_pmu_init_glc(NULL); if (!x86_pmu.extra_regs) x86_pmu.extra_regs =3D intel_rwc_extra_regs; @@ -6783,11 +6783,11 @@ __init int intel_pmu_init(void) name =3D "sapphire_rapids"; break; =20 - case INTEL_FAM6_ALDERLAKE: - case INTEL_FAM6_ALDERLAKE_L: - case INTEL_FAM6_RAPTORLAKE: - case INTEL_FAM6_RAPTORLAKE_P: - case INTEL_FAM6_RAPTORLAKE_S: + case INTEL_ALDERLAKE: + case INTEL_ALDERLAKE_L: + case INTEL_RAPTORLAKE: + case INTEL_RAPTORLAKE_P: + case INTEL_RAPTORLAKE_S: /* * Alder Lake has 2 types of CPU, core and atom. * @@ -6845,8 +6845,8 @@ __init int intel_pmu_init(void) name =3D "alderlake_hybrid"; break; =20 - case INTEL_FAM6_METEORLAKE: - case INTEL_FAM6_METEORLAKE_L: + case INTEL_METEORLAKE: + case INTEL_METEORLAKE_L: intel_pmu_init_hybrid(hybrid_big_small); =20 x86_pmu.pebs_latency_data =3D mtl_latency_data_small; --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0EEF613C831 for ; Mon, 20 May 2024 22:46:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245214; cv=none; b=k7xwZsy8n3M8QatIfPttGmwkqtHY67WX3iK/XfX6xj4l39FY1Nt6XU4DG6zpZHvRPGehrmFzljd0+9GirL5yWegmHKZnZmLjnNrLNBXFcWh9bFT0aIbyKZv2rEtyqhXrjNKcK6i5TL/P4fMwcWeepMeUrXXBe5rnKknoRY2ZwTE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245214; c=relaxed/simple; bh=fYJHYz8V9kimHRbxD5uVEAotpDMXkQsRHlaEWk/P2XA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uPA1YSCy5qxX8o/KOmlyEz4MerfF6IxfBORhC6wflEfOE1mwL+PCex135SQ5bM3F+GRMEnxMD1WOWoJApbPBPNRkpWcYzbgDTZFZMWzRwHd2Liro6pFYI4RezjWYIvzAbqTt30W+Pt7TOHZaV+RR1sZQmf71g9qr6ZhV+FazeK4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=KEySrn86; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="KEySrn86" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245212; x=1747781212; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fYJHYz8V9kimHRbxD5uVEAotpDMXkQsRHlaEWk/P2XA=; b=KEySrn86dwqsyzijLjpllKbgsN4B7EkzHVd22rN37+erin7YEAmpVuxE VVFgNgzX0ANMpMjhPsCZpG0qZRJZyrD2V/2W8ceoM7BsEQ8AqtAbR3Gal jAZJqXFVqG1VAEkJUpsnH3KTb05vS93Ye8snP2YLj6QXACv+HMhOcAd7/ MlDlCdhaeXbhf3iGdtrA0tB3kl2CcPLhb5uFfv7ibmIpgGSmx/1F+9H5D HSypnbYSBeuVh3Ak2A+vpo6spvCYZC0YEMYJdtzNPHQaDoUoFzWbOcUk5 OrcCeIagdnFFIVZWfjejuRaG/bRSml4PvYEEmaspmABzRPHk6Mg/1s94w A==; X-CSE-ConnectionGUID: 2XrwvG6vSFWm0Hu/LmZxhg== X-CSE-MsgGUID: NyeKR2a6T7W+/GHC7RLfsA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199855" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199855" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 X-CSE-ConnectionGUID: UK2mgWJFRYS6AmhMecX+Iw== X-CSE-MsgGUID: ElbWYlQcQlKP46GzimvXLA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593479" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 32/49] x86/platform/atom: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:03 -0700 Message-ID: <20240520224620.9480-33-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- arch/x86/platform/atom/punit_atom_debug.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/x86/platform/atom/punit_atom_debug.c b/arch/x86/platform/= atom/punit_atom_debug.c index 6b9c6deca8ba..44c30ce6360a 100644 --- a/arch/x86/platform/atom/punit_atom_debug.c +++ b/arch/x86/platform/atom/punit_atom_debug.c @@ -165,14 +165,13 @@ static void punit_s2idle_check_register(struct punit_= device *punit_device) {} static void punit_s2idle_check_unregister(void) {} #endif =20 -#define X86_MATCH(model, data) \ - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \ - X86_FEATURE_MWAIT, data) +#define X86_MATCH(vfm, data) \ + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_MWAIT, data) =20 static const struct x86_cpu_id intel_punit_cpu_ids[] =3D { - X86_MATCH(ATOM_SILVERMONT, &punit_device_byt), - X86_MATCH(ATOM_SILVERMONT_MID, &punit_device_tng), - X86_MATCH(ATOM_AIRMONT, &punit_device_cht), + X86_MATCH(INTEL_ATOM_SILVERMONT, &punit_device_byt), + X86_MATCH(INTEL_ATOM_SILVERMONT_MID, &punit_device_tng), + X86_MATCH(INTEL_ATOM_AIRMONT, &punit_device_cht), {} }; MODULE_DEVICE_TABLE(x86cpu, intel_punit_cpu_ids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C1F013C8FB for ; Mon, 20 May 2024 22:46:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245215; cv=none; b=Rgosw0Lgq0t+uwCc9SBOqgkBAQ4YtZMkNzioysoVb+kR/23EZgvh05W8K7QkdcPOBiJtzi9+A9lfWUwHnLOyqJ+BKmALxwU1HdovHOVcofZGRbp8ZufGzljvoQ+B1Mb8G/cwF5vDb7mlIm4R6yBgU6O2P2FBQOpsU6HwSHqiqkE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245215; c=relaxed/simple; bh=tMaJ9LquKdyqtIrCznQawsIwTZJVDk5Gf87ol/G8gIM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Gbr/PsbhsgtixDk+aTs/UHfNhU8YvD4twi9OxGKIFTZHZM3dWdPNuus65IeAyPxS0gFPYRy0h7SR0CO3/sNTgZeXMyiHXELOH2L8xriyngQDEyic5nrfp1j09QEreIP69buoo7MS5MFbRwSyFiaycZrMHYX0PMkeOg5YfqsU0bc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=COd+zUsm; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="COd+zUsm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245213; x=1747781213; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tMaJ9LquKdyqtIrCznQawsIwTZJVDk5Gf87ol/G8gIM=; b=COd+zUsmGDo1I7Bf3T9XhaFUKwMDksHa/uokSUTIotf2Q03L3MR33gpn ZJcb2ItjeRFAiU0dqjE6/X7XzmAVed5tmf8SU592ceHTEwMI2/l+7xurL DV8n366SvfCOioaFWzyRzPDpew4N8jJMsfsrX4IkilMRl6iktcW589JX6 BNoV1HkMBP6JIltkp5lcoYSAhobX5hd3zMB+ZD8uXFn22V6MVIjpzDZy+ Oevdo4tWu5oM8seTjf19l3BkanJXT57lUROmRGIYoP2suS85YK02qAIsg dXS1UB0yIyl3/6Z29P/TYphA4kRI676bXTOVKfyB68ZXVvI3sQy5EwZKg w==; X-CSE-ConnectionGUID: VsVUUSw7S9+qzdxLcFPIng== X-CSE-MsgGUID: 7wTOAzMTTUulzk1+3xkZeA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199866" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199866" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 X-CSE-ConnectionGUID: wwPHbdJoRQGiEM90Rv7ckw== X-CSE-MsgGUID: Ljne8m3+TIaOHBGZftr0Zg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593483" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 33/49] x86/cpu: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:04 -0700 Message-ID: <20240520224620.9480-34-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Update INTEL_CPU_DESC() to work with vendor/family/model. Signed-off-by: Tony Luck --- arch/x86/include/asm/cpu_device_id.h | 8 ++-- arch/x86/events/intel/core.c | 64 ++++++++++++++-------------- 2 files changed, 36 insertions(+), 36 deletions(-) diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cp= u_device_id.h index 54a71c669ce9..df07d3776db8 100644 --- a/arch/x86/include/asm/cpu_device_id.h +++ b/arch/x86/include/asm/cpu_device_id.h @@ -277,10 +277,10 @@ struct x86_cpu_desc { u32 x86_microcode_rev; }; =20 -#define INTEL_CPU_DESC(model, stepping, revision) { \ - .x86_family =3D 6, \ - .x86_vendor =3D X86_VENDOR_INTEL, \ - .x86_model =3D (model), \ +#define INTEL_CPU_DESC(vfm, stepping, revision) { \ + .x86_family =3D VFM_FAMILY(vfm), \ + .x86_vendor =3D VFM_VENDOR(vfm), \ + .x86_model =3D VFM_MODEL(vfm), \ .x86_stepping =3D (stepping), \ .x86_microcode_rev =3D (revision), \ } diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 94206f8cd371..d3294ef18aef 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -5187,35 +5187,35 @@ static __init void intel_clovertown_quirk(void) } =20 static const struct x86_cpu_desc isolation_ucodes[] =3D { - INTEL_CPU_DESC(INTEL_FAM6_HASWELL, 3, 0x0000001f), - INTEL_CPU_DESC(INTEL_FAM6_HASWELL_L, 1, 0x0000001e), - INTEL_CPU_DESC(INTEL_FAM6_HASWELL_G, 1, 0x00000015), - INTEL_CPU_DESC(INTEL_FAM6_HASWELL_X, 2, 0x00000037), - INTEL_CPU_DESC(INTEL_FAM6_HASWELL_X, 4, 0x0000000a), - INTEL_CPU_DESC(INTEL_FAM6_BROADWELL, 4, 0x00000023), - INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_G, 1, 0x00000014), - INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 2, 0x00000010), - INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 3, 0x07000009), - INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 4, 0x0f000009), - INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 5, 0x0e000002), - INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_X, 1, 0x0b000014), - INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 3, 0x00000021), - INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 4, 0x00000000), - INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 5, 0x00000000), - INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 6, 0x00000000), - INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 7, 0x00000000), - INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 11, 0x00000000), - INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_L, 3, 0x0000007c), - INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE, 3, 0x0000007c), - INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 9, 0x0000004e), - INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 9, 0x0000004e), - INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 10, 0x0000004e), - INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 11, 0x0000004e), - INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 12, 0x0000004e), - INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 10, 0x0000004e), - INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 11, 0x0000004e), - INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 12, 0x0000004e), - INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 13, 0x0000004e), + INTEL_CPU_DESC(INTEL_HASWELL, 3, 0x0000001f), + INTEL_CPU_DESC(INTEL_HASWELL_L, 1, 0x0000001e), + INTEL_CPU_DESC(INTEL_HASWELL_G, 1, 0x00000015), + INTEL_CPU_DESC(INTEL_HASWELL_X, 2, 0x00000037), + INTEL_CPU_DESC(INTEL_HASWELL_X, 4, 0x0000000a), + INTEL_CPU_DESC(INTEL_BROADWELL, 4, 0x00000023), + INTEL_CPU_DESC(INTEL_BROADWELL_G, 1, 0x00000014), + INTEL_CPU_DESC(INTEL_BROADWELL_D, 2, 0x00000010), + INTEL_CPU_DESC(INTEL_BROADWELL_D, 3, 0x07000009), + INTEL_CPU_DESC(INTEL_BROADWELL_D, 4, 0x0f000009), + INTEL_CPU_DESC(INTEL_BROADWELL_D, 5, 0x0e000002), + INTEL_CPU_DESC(INTEL_BROADWELL_X, 1, 0x0b000014), + INTEL_CPU_DESC(INTEL_SKYLAKE_X, 3, 0x00000021), + INTEL_CPU_DESC(INTEL_SKYLAKE_X, 4, 0x00000000), + INTEL_CPU_DESC(INTEL_SKYLAKE_X, 5, 0x00000000), + INTEL_CPU_DESC(INTEL_SKYLAKE_X, 6, 0x00000000), + INTEL_CPU_DESC(INTEL_SKYLAKE_X, 7, 0x00000000), + INTEL_CPU_DESC(INTEL_SKYLAKE_X, 11, 0x00000000), + INTEL_CPU_DESC(INTEL_SKYLAKE_L, 3, 0x0000007c), + INTEL_CPU_DESC(INTEL_SKYLAKE, 3, 0x0000007c), + INTEL_CPU_DESC(INTEL_KABYLAKE, 9, 0x0000004e), + INTEL_CPU_DESC(INTEL_KABYLAKE_L, 9, 0x0000004e), + INTEL_CPU_DESC(INTEL_KABYLAKE_L, 10, 0x0000004e), + INTEL_CPU_DESC(INTEL_KABYLAKE_L, 11, 0x0000004e), + INTEL_CPU_DESC(INTEL_KABYLAKE_L, 12, 0x0000004e), + INTEL_CPU_DESC(INTEL_KABYLAKE, 10, 0x0000004e), + INTEL_CPU_DESC(INTEL_KABYLAKE, 11, 0x0000004e), + INTEL_CPU_DESC(INTEL_KABYLAKE, 12, 0x0000004e), + INTEL_CPU_DESC(INTEL_KABYLAKE, 13, 0x0000004e), {} }; =20 @@ -5232,9 +5232,9 @@ static __init void intel_pebs_isolation_quirk(void) } =20 static const struct x86_cpu_desc pebs_ucodes[] =3D { - INTEL_CPU_DESC(INTEL_FAM6_SANDYBRIDGE, 7, 0x00000028), - INTEL_CPU_DESC(INTEL_FAM6_SANDYBRIDGE_X, 6, 0x00000618), - INTEL_CPU_DESC(INTEL_FAM6_SANDYBRIDGE_X, 7, 0x0000070c), + INTEL_CPU_DESC(INTEL_SANDYBRIDGE, 7, 0x00000028), + INTEL_CPU_DESC(INTEL_SANDYBRIDGE_X, 6, 0x00000618), + INTEL_CPU_DESC(INTEL_SANDYBRIDGE_X, 7, 0x0000070c), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 93C4613C903 for ; Mon, 20 May 2024 22:46:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245214; cv=none; b=V5Af9zRZ/RavPV+UnHbsUVTI8XJ05RrWRfhuylpjy5A11JonV/w4Ul2U63Do3fq8lsamo9FmhQc38jHPJ3nqBdvOUucFLxamk0CFnqJ570G/EEPZbpndtA8h8LXCKPkb6edkkvce1XiCKErRvpm1pMN79rxqMrlm4Cg/OtVTgL4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245214; c=relaxed/simple; bh=sASbPr2zR3JdDKlYAQlWUeMercohyneum+eNLKpGg/c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e3rco2bg6IGHAcRotsgBFM+GM19AyIMDN5vrw0t2v4/gMGTaQIFrLuZJ8dXO07piBSiLmdGhowlSRswaxCQ15Udb03UEPrW/Fj6inchCH0lqZK7Whz+Vm45jNOyQv4zl0dsbZbkpOrPNK1prdSQKCPnt81yx9Pgdr0SctDJf/zg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cKMSI+dF; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cKMSI+dF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245213; x=1747781213; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sASbPr2zR3JdDKlYAQlWUeMercohyneum+eNLKpGg/c=; b=cKMSI+dFAGRDXbJv3aOwGwutUZKZ+KU5pvE/r0Aoig36o4BlMWE9eyfa Z+dRvnECzZHcmiwQ8rAjG46v3z8CzCF1F1GC72L8YbXhjBtPLaUzsAlAx x/osZD3MhEXLb4ZJpyOGnlRUmaMrliOjwaWGXMhSHs/fOPNQUeJ9oFAkC 1IUybRzAvsVDmqSRHemlO87i1aSUAj4qRt+ENRvelfCBNPh4IcFxUZh+i 5qj3Fl44mV+y8780q52Cu2BvmTH7LYadV1gw1CfU75FgE3Lp6nW7ol3nJ HtsNa42UmdwCHzfCYbDR1+SWDHVVUWTh6cN1SE8e3aFA9BlHMUU8RfHJ6 g==; X-CSE-ConnectionGUID: PLqZ0/pdQXS0kc0t/BbOmw== X-CSE-MsgGUID: GNkGNA9cTJuoabxnS4e+pg== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199878" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199878" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 X-CSE-ConnectionGUID: nlACXApCRPuDY0QXHvTOlQ== X-CSE-MsgGUID: rNZxRk8JRsmWn+lR2jNOeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593486" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 34/49] x86/boot: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:05 -0700 Message-ID: <20240520224620.9480-35-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model but boot code doesn't have all the infrastructure to use them. Hard code the one CPU model number used here. Signed-off-by: Tony Luck --- arch/x86/boot/cpucheck.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index fed8d13ce252..0aae4d4ed615 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -203,7 +203,7 @@ int check_knl_erratum(void) */ if (!is_intel() || cpu.family !=3D 6 || - cpu.model !=3D INTEL_FAM6_XEON_PHI_KNL) + cpu.model !=3D 0x57 /*INTEL_XEON_PHI_KNL*/) return 0; =20 /* --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C90A413AD22 for ; Mon, 20 May 2024 22:46:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245215; cv=none; b=K976kojvxrMY0IW8PXx4L2kM0P9SzXFSSGCCB+NTfduZQ4lN8uGPapmSY7/F3PxwLnfO3WVXI7etnsubfTGRYju0O7xpJ1HmBIrGZG68Bs8XLRup4GZTuED8KZ3XS/P3WuIK5tpDjJB4o7aZNHH13QeQZJa6oo4as/4jSva89Ik= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245215; c=relaxed/simple; bh=7ymWfCCzp7TNiplx+Q1AsZqgqALtTY2Wy8qBKmus9Ng=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=otVme59OevNtutLEMPMPoLvI5y0fvI2wVVI4Zq3ABfKDP71zJELMndOhipCDfRC++q16BJmaGqqhx5wNEjNMMXu2cc+OR97gk4NPc1kO8uHMjWnQch2TctTw1Az+05Th1SeTmlLPImGvGJg33eRPQPp+JJ/aQJ3iK5nROE9I9L4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=FEqJl3Qs; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="FEqJl3Qs" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245214; x=1747781214; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7ymWfCCzp7TNiplx+Q1AsZqgqALtTY2Wy8qBKmus9Ng=; b=FEqJl3QshDVKdq73iadzD1PnwgMymvzDTGh7iJ+ZSZAEMoygwiClp15X pTJlfLRHwSK+XL3DjWdn7LWyG9PfvPIoOsP72ogu19uCLbwlzEqaxIgHs HpLpdAdqIZp5ibiGAvAOQKAZ3cNhLvwHCbQj3H9tguSdYVeebSkHJbA0q F/u9jKALWoWBcoKLp6mJAiV3/rtn4p+8I2yS8nyDsINBHnIH18c1mK7v9 nReL9GtggaoQtITJqwobsoOnD3iom0wnIdnYooIxtDcQnZUWzwTYYHgXg Ll7d01SAK024rvvHEq1QjNL4fb7QPyB8z+0U++9AvIn8SWLXIsqlzguPh w==; X-CSE-ConnectionGUID: GXPlE3H2Rba081lLbkuOzQ== X-CSE-MsgGUID: 2x5U/fSdRs2E4QWa7e1w9A== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199889" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199889" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 X-CSE-ConnectionGUID: sEjHnpiNQZqU+zl84XsQug== X-CSE-MsgGUID: UcFKgdpcQxaOoN1sHwb9vg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593489" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 35/49] EDAC/i10nm: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:06 -0700 Message-ID: <20240520224620.9480-36-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- drivers/edac/i10nm_base.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c index 3fd22a1eb1a9..24dd896d9a9d 100644 --- a/drivers/edac/i10nm_base.c +++ b/drivers/edac/i10nm_base.c @@ -942,16 +942,16 @@ static struct res_config gnr_cfg =3D { }; =20 static const struct x86_cpu_id i10nm_cpuids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_TREMONT_D, X86_STEPPINGS(0x0, 0= x3), &i10nm_cfg0), - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_TREMONT_D, X86_STEPPINGS(0x4, 0= xf), &i10nm_cfg1), - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X, X86_STEPPINGS(0x0, 0x3),= &i10nm_cfg0), - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X, X86_STEPPINGS(0x4, 0xf),= &i10nm_cfg1), - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_D, X86_STEPPINGS(0x0, 0xf),= &i10nm_cfg1), - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X, X86_STEPPINGS(0x0,= 0xf), &spr_cfg), - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X, X86_STEPPINGS(0x0, = 0xf), &spr_cfg), - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X, X86_STEPPINGS(0x0, = 0xf), &gnr_cfg), - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT_X, X86_STEPPINGS(0x0,= 0xf), &gnr_cfg), - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT, X86_STEPPINGS(0x0, 0= xf), &gnr_cfg), + X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPINGS(0x0, 0x3), &i= 10nm_cfg0), + X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPINGS(0x4, 0xf), &i= 10nm_cfg1), + X86_MATCH_VFM_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPINGS(0x0, 0x3), &i10nm_= cfg0), + X86_MATCH_VFM_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPINGS(0x4, 0xf), &i10nm_= cfg1), + X86_MATCH_VFM_STEPPINGS(INTEL_ICELAKE_D, X86_STEPPINGS(0x0, 0xf), &i10nm_= cfg1), + X86_MATCH_VFM_STEPPINGS(INTEL_SAPPHIRERAPIDS_X, X86_STEPPINGS(0x0, 0xf), = &spr_cfg), + X86_MATCH_VFM_STEPPINGS(INTEL_EMERALDRAPIDS_X, X86_STEPPINGS(0x0, 0xf), &= spr_cfg), + X86_MATCH_VFM_STEPPINGS(INTEL_GRANITERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &= gnr_cfg), + X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_CRESTMONT_X, X86_STEPPINGS(0x0, 0xf), = &gnr_cfg), + X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_CRESTMONT, X86_STEPPINGS(0x0, 0xf), &g= nr_cfg), {} }; MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3DD3D13B792 for ; Mon, 20 May 2024 22:46:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245215; cv=none; b=Li0k6KdxZhpvYN7aMYTO2V9AqgY/gqfFUh3xdZKJixtSM3/Qt6iZ5l6ndlEKYX1gx1Ju0GjrI42Yn4zeNNDqmw3wPpGiJyh909RoF/hcCSfHt4d/KPUeY/afaU33PFYtQ1xckkXAzhPz5FXaoW5x1onoNfO+yb1TjXaYojBBtXI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245215; c=relaxed/simple; bh=ifunLBjjEJ27+/uU6cajdNrtE7FxVrkvN9E3z6UIJT8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZARKiRTC24MdytBLTW/D0Hq5pTuHj37xPyZ9d4XhHABi6GHEodgGzC5GUBEUSmixJFWc5IwQXDSsW5PQVJzkaloG3dLtEGJfigdT4SSjdve+usuQFYOrT/hpUOCoBC2/jdpuRDSXka/BHfesbjHnsWKINIhTgpWbPlRqbSW9ssY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LO0QhOfY; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LO0QhOfY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245213; x=1747781213; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ifunLBjjEJ27+/uU6cajdNrtE7FxVrkvN9E3z6UIJT8=; b=LO0QhOfYpq9AO2b9WDJegU3NZL8rjFHztdD/9hCmiMXROLOgdYpmmWWF yX8xnQ3WswJLc08SQBTwat+JQBIBtlbikr+omu8bhfUSDL917GrtytJ0l K7a0pp7ra/Qrx//blh+KM4nxml+LLmgWN9XRINxsMp9aSVeqpyuJCk/Jt vhpHpdgWq0cFaLZY9nK8PbLqwPsR00cCwIXvrasU/Rd74QYwaXGhA5ezQ tqeYtsQrbbJzMiShsD/2TfA+i6YQI4cEQz2bHLRn4oxQZUTwQ4pm8cvn9 MW2JhdXRxn9V17yFyBdh+LVMHGzFHACI8gSpXyV3frY7TWuYQScPv8gH6 A==; X-CSE-ConnectionGUID: dcPDBJXwTwGHJXz3ubxyyg== X-CSE-MsgGUID: rZetZfOVQ9+vvY+hw967Ig== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199900" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199900" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 X-CSE-ConnectionGUID: GVU20H2TQqCBG6tz0xcbZg== X-CSE-MsgGUID: 9fqPi9D2Qt+5UqCp/uLm3A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593492" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 36/49] EDAC, pnd2: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:07 -0700 Message-ID: <20240520224620.9480-37-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- drivers/edac/pnd2_edac.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/edac/pnd2_edac.c b/drivers/edac/pnd2_edac.c index 2afcd148fcf8..f93f2f2b1cf2 100644 --- a/drivers/edac/pnd2_edac.c +++ b/drivers/edac/pnd2_edac.c @@ -1511,8 +1511,8 @@ static struct dunit_ops dnv_ops =3D { }; =20 static const struct x86_cpu_id pnd2_cpuids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &apl_ops), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &dnv_ops), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &apl_ops), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &dnv_ops), { } }; MODULE_DEVICE_TABLE(x86cpu, pnd2_cpuids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 334FE13CA92 for ; Mon, 20 May 2024 22:46:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245216; cv=none; b=sYJgDWOY7+ZTGMCCExLqb3s1BY2LglGzlpffV/TUfDEm6h0VT2cdKlZAU52NvGstosUwJ+BXO7WNgvnHNH2azeIW7A9GgO2m+yBAzAYXTTHTGG2dH5xa+qeJ5ZnKItFoRRbplA20UL0aq4d+3heHY+IondscYHueu6Mu3tgFF7k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245216; c=relaxed/simple; bh=yvG8vVOFiUlIL/SKzVALgFIjKhQFvNcZtyEQuh9ZrVQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=V59ePT6AgAlKLhu1gHX51bjV8zsOXvIGUAtie82lHq9lJDCbteoeVo1mo+MSUb0zHp9P4CDZKKtjYqZvqgBhqqtRH8IkVvWbmbYrYPLnE001GVIgp0ZaiN8RjGe9USLKZ25AYOppo+UtuWNgMFfvu7lcnwEOT9JSE2esJs7sO0s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Rndo5BOs; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Rndo5BOs" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245214; x=1747781214; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yvG8vVOFiUlIL/SKzVALgFIjKhQFvNcZtyEQuh9ZrVQ=; b=Rndo5BOsDr2GgTxSzzn+QjoJp8P9kDrIpyrazRV/cqoboT09ciHcyjmd gfEOwW2K+BKxJ1KNaJDqAs9EX4dE9QI2TqXwvx5zFN2SDwb85XAhpGi82 nbPXikTRJZAaRqZg6NCtVQATZanQpiVcXT9etxKBnduCkZ45eQxHycDHs CeG7uLXVQ/SjQ0v68QP/nfMly6zT819NvIwt3KuHdO9F/qLtw7Gb70/hR DcHQAZ+Z01TEZLhWwP4jXiixftDzkxsR79tB2bt7Eh7myQyB3ClhlAnM3 ijNVGoGuz/TMZ/zORfxJ2Ka52n3cws9mVPBm7d9mzFdKMJ0P7o1VXT1Lm Q==; X-CSE-ConnectionGUID: QukVl16FSuGoY9H8iJucAw== X-CSE-MsgGUID: 98ao9+lVQhKd6+ISRFGGJg== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199913" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199913" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 X-CSE-ConnectionGUID: yStxYKhOQCKRJBCtnmc/fw== X-CSE-MsgGUID: BT5RpVzmSqifu12udtCIkg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593495" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 37/49] EDAC/sb_edac: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:08 -0700 Message-ID: <20240520224620.9480-38-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- drivers/edac/sb_edac.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index 26cca5a9322d..cbc92d3683e6 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -3546,13 +3546,13 @@ static int sbridge_register_mci(struct sbridge_dev = *sbridge_dev, enum type type) } =20 static const struct x86_cpu_id sbridge_cpuids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &pci_dev_descr_sbridge_table), - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &pci_dev_descr_ibridge_table), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &pci_dev_descr_haswell_table), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &pci_dev_descr_broadwell_table), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &pci_dev_descr_broadwell_table), - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &pci_dev_descr_knl_table), - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &pci_dev_descr_knl_table), + X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &pci_dev_descr_sbridge_table), + X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &pci_dev_descr_ibridge_table), + X86_MATCH_VFM(INTEL_HASWELL_X, &pci_dev_descr_haswell_table), + X86_MATCH_VFM(INTEL_BROADWELL_X, &pci_dev_descr_broadwell_table), + X86_MATCH_VFM(INTEL_BROADWELL_D, &pci_dev_descr_broadwell_table), + X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &pci_dev_descr_knl_table), + X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &pci_dev_descr_knl_table), { } }; MODULE_DEVICE_TABLE(x86cpu, sbridge_cpuids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4745113CFAB for ; Mon, 20 May 2024 22:46:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245217; cv=none; b=PmnUT1vN4W5vVdDgX1yjY034ie7UKTKDqGoYOAZ2MAXCU6MY66QS2BJcWwDTstlFj9/QugcvnY0rUr0xYQ+CJbwq8+YXMFpu0BpmjfP04rNU5V/uzxLr4TEnGk3gs0JS2HrSt1NUp00sPWMOoFNRzgSAm63x4I7yDrsg6FIGXgQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245217; c=relaxed/simple; bh=0BIu25xiRc9EWcC4UBkBOf5JXNRhy4328JnDHuEYwgY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Pf6V2I8kXEy4UM2dgyAElWnnyNFW92lWGDq2P+wPE60A4W/uwMuD5PHnUV3rJy+ciyt2XVZjvWbv4ko5fZdjdwaiSDLvGhfpJSk+dKQTJQ3KqAl0qjYFhg2jL8ziCVjKlPxpVa6CV4t8tbQ1Oqa1ERlasxPsJBLYmKa3hsD7ikw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=j245rpoV; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="j245rpoV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245215; x=1747781215; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0BIu25xiRc9EWcC4UBkBOf5JXNRhy4328JnDHuEYwgY=; b=j245rpoVQ/oI+kYhjDXQRu851wI1A2V2ThGmI+OgPnsH9//s6PxMctoj 3Yoc3hL2G+73L+6URxj6qAWznviAqMDVouFIaaUMf+XtUgvx23MAepn4V 6kSIF2uRZtI0P7jDlr4vtmB+NeIuwPCa7SqTsPXodHZF3c6k/fio2Dz2l 3sHfS8gbLb6T2FdawptvDCDIWmv+UbZ+4GiNN7PF8MXxuUl71WO1rCvhv 8LMLQGerKG2in0ijhgFzgQwxCUcB/lkehSEMpJWS+P8j7XInuAuncMRjO FTTUxRqhR23jWtVvN6dhKUBQwEmaPgBoGlqEnUD+jurXrhKXOpCfb9Zvk Q==; X-CSE-ConnectionGUID: Ha+XOuuGQ4iOzZyD+cmFvA== X-CSE-MsgGUID: yYJaIg5iTOSR4n6C/GYfOA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199928" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199928" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 X-CSE-ConnectionGUID: WNuY+Ue2QteY1j6M/VwZmA== X-CSE-MsgGUID: qITB6he/Te+4xpMHQ3uyJw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593499" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 38/49] EDAC/skx: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:09 -0700 Message-ID: <20240520224620.9480-39-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- drivers/edac/skx_base.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/edac/skx_base.c b/drivers/edac/skx_base.c index 0a862336a7ce..af3fa807acdb 100644 --- a/drivers/edac/skx_base.c +++ b/drivers/edac/skx_base.c @@ -164,7 +164,7 @@ static struct res_config skx_cfg =3D { }; =20 static const struct x86_cpu_id skx_cpuids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x0, 0xf), = &skx_cfg), + X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x0, 0xf), &skx_cf= g), { } }; MODULE_DEVICE_TABLE(x86cpu, skx_cpuids); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD19013CF96 for ; Mon, 20 May 2024 22:46:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245216; cv=none; b=ZOCjHTWwxTOcVm2C3jQPJC9GwAI7GnqnBD+gtiyfVWMnZgtZkLW71wBob/b2mx7sctaA0O97vwUzAd6HW2PW/wsQsrxn87X2IBvnHPiyzE47yRHU8hCUoS1DZYPZqOxnQb55CSnNadMbRd1buxHfEnXK+AKKUWu7hqwupl8M3fw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245216; c=relaxed/simple; bh=PfFXI3d8s3t/NWnQnGzvD1hWBKVfxk2hbTTJbFy8Fl0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nHo24dbWT6FhK8yIOdzlm+ZVleYqJ+5wHbSXN9MrLi80uvvmHZNAWdT93qH8v00R+Vdt2n2anucbn1JSK70HvLrzD/a0BwbVdtivz3KCz+nuO9SmI/7wgWwygpCg722j1rRE9/eXhMK+9JOQdA5T30YP/HfNcZjGoXUunnHjDzg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=V5HZxYHb; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="V5HZxYHb" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245215; x=1747781215; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PfFXI3d8s3t/NWnQnGzvD1hWBKVfxk2hbTTJbFy8Fl0=; b=V5HZxYHbvSbDHrpm234YbQL3spgjBL3oLe1LKf0tE2m9pwEd7ZnBRl33 BqxjUqwN1kdaZuVITQ4QZt8Tuv8mH4/4IayFxkLxCELNKv0LqWWhgAxbF 1E+Z9DBIigKTJnrgko/WfO543gO13L23KkkK7fK1qNxJphrShdgd2vSVU COHeXijfp5X0rt+oQub2u7hC9KFH/X1DKM7jz5gfzPbd19vTfpEbCMkNy FagiMEVxqiQsp2jwqlUpBcKEYRWL3tYD4FSXLS9QWOpTeFC0U1Og1jKgD qqdqrKcE5+lVgTXHM3LdNCTKV8r8MBu7SFxjBRq82d22TUUetYWqJdTPT Q==; X-CSE-ConnectionGUID: pm/EWBHWTq6LIUwUrfuOWw== X-CSE-MsgGUID: QrsrF9RlRA28KvOqRde0Yg== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199942" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199942" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 X-CSE-ConnectionGUID: QRLoRNeHQ0Od5z6D8hPZAw== X-CSE-MsgGUID: FZ22/soYRF2xjxrtSRVzZQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593502" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:39 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 39/49] extcon: axp288: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:10 -0700 Message-ID: <20240520224620.9480-40-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- drivers/extcon/extcon-axp288.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/extcon/extcon-axp288.c b/drivers/extcon/extcon-axp288.c index a703a8315634..d3bcbe839c09 100644 --- a/drivers/extcon/extcon-axp288.c +++ b/drivers/extcon/extcon-axp288.c @@ -108,7 +108,7 @@ struct axp288_extcon_info { }; =20 static const struct x86_cpu_id cherry_trail_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL), + X86_MATCH_VFM(INTEL_ATOM_AIRMONT, NULL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8410B13CFBA for ; Mon, 20 May 2024 22:46:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245220; cv=none; b=D/dGNyrD7IDdr/tXi0iU1RAt9B+B/h2KNiQEwawt+15oiHAnSaUoxutHFaxdURvgFWF++Nmy/tG8sXTatkOUysCyRVDGccyPNWdzgNFSXJ8bzLQ1pdM/ICUbrFxSLXePd4YBGrqWPf9X/Z3+VJXFfeO4DhdyB5syU4iiCJVWvcw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245220; c=relaxed/simple; bh=mv/DdbZyo6eomJ/rc6S48OLZws5x/hvaTKemElND+wk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=T1b8w1CXVjz4jw9gMkSUUx4ptKQTgTjZyvE2IpkuBKEUZmqT2w58xgKlmGj2ZSJHdPwSZHnbHGjOi5QSXHtN2ZUtlgMsMLRHjcJYLPQNiZtKlEPYWHLpQzwEkUQN9j8B4frma1Il05jxuSyPstLe6LcEEhziHNuR3QQgo8v+/6c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Z9WYDV9L; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Z9WYDV9L" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245216; x=1747781216; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mv/DdbZyo6eomJ/rc6S48OLZws5x/hvaTKemElND+wk=; b=Z9WYDV9LFkxFaNVelu/uBUrpyRzgC5dYspkpRBYP3Yd2CHTOutQY2x/K PWIAwGoyGry/Xtn/QTfRfK+tSR9a7ey1bh7O5QvxFF7lCGHyuevBItsOt U8cL2G9/5liRQDKyV1vNPvyeti9oY/SfmLb0ydRKmggNdjPM7I07NbQhT jLqMp/OAZvy8IrVEXRQdGcAzI286GwLn56fjaLzlmMTtmQeBuLLQf/8oa YxhcvwA57EAqE/kdiAQSQU84omGNGC0aqFZgeXTXR4/CltbqzRkV86HYa HfxdddIk6DFFFcdhQGd6PEHLRGFCjkrT/Utp+C6bTBsbrvTRM7erAQjtG g==; X-CSE-ConnectionGUID: Msm4DpycQY69wIA0g9Hjug== X-CSE-MsgGUID: YU3zzfCkSI+hjXLiqGxqOA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199949" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199949" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 X-CSE-ConnectionGUID: N6iJoTr9Rs6llL8HsCEguQ== X-CSE-MsgGUID: gq4jayzTTueHQeNli00jwg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593505" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, "Rafael J . Wysocki" Subject: [PATCH v6 40/49] ACPI: LPSS: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:11 -0700 Message-ID: <20240520224620.9480-41-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Rafael J. Wysocki --- drivers/acpi/x86/lpss.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/acpi/x86/lpss.c b/drivers/acpi/x86/lpss.c index 148e29c2c526..258440b899a9 100644 --- a/drivers/acpi/x86/lpss.c +++ b/drivers/acpi/x86/lpss.c @@ -338,8 +338,8 @@ static const struct lpss_device_desc bsw_spi_dev_desc = =3D { }; =20 static const struct x86_cpu_id lpss_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, NULL), + X86_MATCH_VFM(INTEL_ATOM_AIRMONT, NULL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B3BE13D251 for ; Mon, 20 May 2024 22:46:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245218; cv=none; b=mIUakhLTo9eEDOPcc9sB2RFj6pjmXWqrsoKXS+HxOHTPKngv9ZdGQUZ3hYtGRpcJgFGyA1eVP2tQPfq+F9yAxXQrDkDD9z6wPhF5DD3Ba7u1t7We7367U1YgmB0Zmgpvsf3eOp5hmZ/mcBEsO6vXg2xcSw882CNLQKcXdUmAaKQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245218; c=relaxed/simple; bh=OekOtMnWgaL3iX/OP7hSuh3keHSFGAGWeh7AoTG5V7c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HHSuN+JRq6aHY4/AH9/ztP0m3nYODng9keTH2HXl+UZ2pty13dRsIEZsm9JckjCm3WD9TZUwe97cXUWcJSJb0D3AKk83weLDEmbCkcAVVtz/LATxKamooDcTSEgKEYoG9USWI71AH+8cykhfq1x+WbqDxb2lE17l8DG8IJfi7DA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Ln2gQiWF; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Ln2gQiWF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245216; x=1747781216; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OekOtMnWgaL3iX/OP7hSuh3keHSFGAGWeh7AoTG5V7c=; b=Ln2gQiWFDdYQRAqZvUj3GnBFXcWS2VUU/PwFdP9b6MFOIRxgzLJkwP7v 5Vy1ygrXVvYJUeNOOoCIevEqNLaNEqXpQ7ugZHCyc/STnB31oI06M7Zgd 8UB7MzmMgwX4hzvRo0sK6fivIEI4RGnZwaG/XwMW9GXAsUHsyNdSNqMDh 78eE7EGCjhnZ2THAbsiUL+urImPBiUd0ViwoF0GgkefIhLDl9AD79sA88 2x/WNs7QrgJtm/F1SNeDq+/d/Ry7v34HXoX1aOcw6ROrapM+eHFP8PiIz YcAaG3YCEW5ohvp5bMZkpkLvVdDpO/DvJt2qWnvQAD5EPaGrWOOP66O0O Q==; X-CSE-ConnectionGUID: Wuuyj/q2ROuABCRn6QeQwg== X-CSE-MsgGUID: 8AL1GZ9WRVi/17VC4bu7rA== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199959" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199959" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 X-CSE-ConnectionGUID: y62cgbd4ROO5Q9XeGG+TbQ== X-CSE-MsgGUID: 4wx58AOFQH6IDm0cvKcTBw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593509" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 41/49] ACPI: x86: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:12 -0700 Message-ID: <20240520224620.9480-42-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- drivers/acpi/x86/utils.c | 44 ++++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c index 7dca73417e2b..e628d969d613 100644 --- a/drivers/acpi/x86/utils.c +++ b/drivers/acpi/x86/utils.c @@ -45,37 +45,37 @@ struct override_status_id { unsigned long long status; }; =20 -#define ENTRY(status, hid, uid, path, cpu_model, dmi...) { \ +#define ENTRY(status, hid, uid, path, cpu_vfm, dmi...) { \ { { hid, }, {} }, \ - { X86_MATCH_INTEL_FAM6_MODEL(cpu_model, NULL), {} }, \ + { X86_MATCH_VFM(cpu_vfm, NULL), {} }, \ { { .matches =3D dmi }, {} }, \ uid, \ path, \ status, \ } =20 -#define PRESENT_ENTRY_HID(hid, uid, cpu_model, dmi...) \ - ENTRY(ACPI_STA_DEFAULT, hid, uid, NULL, cpu_model, dmi) +#define PRESENT_ENTRY_HID(hid, uid, cpu_vfm, dmi...) \ + ENTRY(ACPI_STA_DEFAULT, hid, uid, NULL, cpu_vfm, dmi) =20 -#define NOT_PRESENT_ENTRY_HID(hid, uid, cpu_model, dmi...) \ - ENTRY(0, hid, uid, NULL, cpu_model, dmi) +#define NOT_PRESENT_ENTRY_HID(hid, uid, cpu_vfm, dmi...) \ + ENTRY(0, hid, uid, NULL, cpu_vfm, dmi) =20 -#define PRESENT_ENTRY_PATH(path, cpu_model, dmi...) \ - ENTRY(ACPI_STA_DEFAULT, "", NULL, path, cpu_model, dmi) +#define PRESENT_ENTRY_PATH(path, cpu_vfm, dmi...) \ + ENTRY(ACPI_STA_DEFAULT, "", NULL, path, cpu_vfm, dmi) =20 -#define NOT_PRESENT_ENTRY_PATH(path, cpu_model, dmi...) \ - ENTRY(0, "", NULL, path, cpu_model, dmi) +#define NOT_PRESENT_ENTRY_PATH(path, cpu_vfm, dmi...) \ + ENTRY(0, "", NULL, path, cpu_vfm, dmi) =20 static const struct override_status_id override_status_ids[] =3D { /* * Bay / Cherry Trail PWM directly poked by GPU driver in win10, * but Linux uses a separate PWM driver, harmless if not used. */ - PRESENT_ENTRY_HID("80860F09", "1", ATOM_SILVERMONT, {}), - PRESENT_ENTRY_HID("80862288", "1", ATOM_AIRMONT, {}), + PRESENT_ENTRY_HID("80860F09", "1", INTEL_ATOM_SILVERMONT, {}), + PRESENT_ENTRY_HID("80862288", "1", INTEL_ATOM_AIRMONT, {}), =20 /* The Xiaomi Mi Pad 2 uses PWM2 for touchkeys backlight control */ - PRESENT_ENTRY_HID("80862289", "2", ATOM_AIRMONT, { + PRESENT_ENTRY_HID("80862289", "2", INTEL_ATOM_AIRMONT, { DMI_MATCH(DMI_SYS_VENDOR, "Xiaomi Inc"), DMI_MATCH(DMI_PRODUCT_NAME, "Mipad2"), }), @@ -84,18 +84,18 @@ static const struct override_status_id override_status_= ids[] =3D { * The INT0002 device is necessary to clear wakeup interrupt sources * on Cherry Trail devices, without it we get nobody cared IRQ msgs. */ - PRESENT_ENTRY_HID("INT0002", "1", ATOM_AIRMONT, {}), + PRESENT_ENTRY_HID("INT0002", "1", INTEL_ATOM_AIRMONT, {}), /* * On the Dell Venue 11 Pro 7130 and 7139, the DSDT hides * the touchscreen ACPI device until a certain time * after _SB.PCI0.GFX0.LCD.LCD1._ON gets called has passed * *and* _STA has been called at least 3 times since. */ - PRESENT_ENTRY_HID("SYNA7500", "1", HASWELL_L, { + PRESENT_ENTRY_HID("SYNA7500", "1", INTEL_HASWELL_L, { DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7130"), }), - PRESENT_ENTRY_HID("SYNA7500", "1", HASWELL_L, { + PRESENT_ENTRY_HID("SYNA7500", "1", INTEL_HASWELL_L, { DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7139"), }), @@ -104,7 +104,7 @@ static const struct override_status_id override_status_= ids[] =3D { * The Dell XPS 15 9550 has a SMO8110 accelerometer / * HDD freefall sensor which is wrongly marked as not present. */ - PRESENT_ENTRY_HID("SMO8810", "1", SKYLAKE, { + PRESENT_ENTRY_HID("SMO8810", "1", INTEL_SKYLAKE, { DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), DMI_MATCH(DMI_PRODUCT_NAME, "XPS 15 9550"), }), @@ -121,19 +121,19 @@ static const struct override_status_id override_statu= s_ids[] =3D { * was copy-pasted from the GPD win, so it has a disabled KIOX000A * node which we should not enable, thus we also check the BIOS date. */ - PRESENT_ENTRY_HID("KIOX000A", "1", ATOM_AIRMONT, { + PRESENT_ENTRY_HID("KIOX000A", "1", INTEL_ATOM_AIRMONT, { DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), DMI_MATCH(DMI_BOARD_NAME, "Default string"), DMI_MATCH(DMI_PRODUCT_NAME, "Default string"), DMI_MATCH(DMI_BIOS_DATE, "02/21/2017") }), - PRESENT_ENTRY_HID("KIOX000A", "1", ATOM_AIRMONT, { + PRESENT_ENTRY_HID("KIOX000A", "1", INTEL_ATOM_AIRMONT, { DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), DMI_MATCH(DMI_BOARD_NAME, "Default string"), DMI_MATCH(DMI_PRODUCT_NAME, "Default string"), DMI_MATCH(DMI_BIOS_DATE, "03/20/2017") }), - PRESENT_ENTRY_HID("KIOX000A", "1", ATOM_AIRMONT, { + PRESENT_ENTRY_HID("KIOX000A", "1", INTEL_ATOM_AIRMONT, { DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), DMI_MATCH(DMI_BOARD_NAME, "Default string"), DMI_MATCH(DMI_PRODUCT_NAME, "Default string"), @@ -146,7 +146,7 @@ static const struct override_status_id override_status_= ids[] =3D { * method sets a GPIO causing the PCI wifi card to turn off. * See above remark about uniqueness of the DMI match. */ - NOT_PRESENT_ENTRY_PATH("\\_SB_.PCI0.SDHB.BRC1", ATOM_AIRMONT, { + NOT_PRESENT_ENTRY_PATH("\\_SB_.PCI0.SDHB.BRC1", INTEL_ATOM_AIRMONT, { DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), DMI_EXACT_MATCH(DMI_BOARD_NAME, "Default string"), DMI_EXACT_MATCH(DMI_BOARD_SERIAL, "Default string"), @@ -158,7 +158,7 @@ static const struct override_status_id override_status_= ids[] =3D { * as both ACCL0001 and MAGN0001. As we can only ever register an * i2c client for one of them, ignore MAGN0001. */ - NOT_PRESENT_ENTRY_HID("MAGN0001", "1", ATOM_SILVERMONT, { + NOT_PRESENT_ENTRY_HID("MAGN0001", "1", INTEL_ATOM_SILVERMONT, { DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), DMI_MATCH(DMI_PRODUCT_FAMILY, "YOGATablet2"), }), --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96E1813D274 for ; Mon, 20 May 2024 22:46:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245218; cv=none; b=TOWrnDi9gh/0fI/dQnOO7d5NqtfRsEfrvr0SMw3s84ZCcltcT8ewTSUDXHXw4DTVIw9YdR3632DXGDdcRT40uW5wQphD7kfRXKF+d583FSyIWHNT6VB+CFKexZrYKO1TmrbSvqVfDArqvHeCAoQPr+jUHa1ukR2A5o8X4ZhnLIY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245218; c=relaxed/simple; bh=6a3GkybpndO6V8BBiLVHi4y7WhZypoRGyiKKTkvOGRo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Q0Z8VLXZwROQNj95ryFDUfRgwk7pbm7pHOACmdMB/pXqYPPDSGO/nG7d4ZdBcOBRLLUxSWVV4zYhkDKTbjno4wgYg9h+STeX95EKygudvA3yCCqvUBCAbQ9LI3/3GROhyc298XE+Frv9O2j3UzJumNcHRyoHIOSMNZMJJ84SmY0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=gKTDdA04; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="gKTDdA04" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245217; x=1747781217; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6a3GkybpndO6V8BBiLVHi4y7WhZypoRGyiKKTkvOGRo=; b=gKTDdA04iSKAWM1+Lw3eGlUf2ZVYAPkvhJ/lRfwJSGJNsIjY7MMmAbYt Lo3yd4pUSAB0rWdZKRyOeFNfZFP7VDRQ/xyFBwEVR/jWi9rlLgxkaLEky q8I5pexSVUkr86L7gScebT9B1VALn3bdNK2IryMcyLHwaEH11fgUaCYLi n1AYGXnUcjVE4hCFTSgrWLtsxnL/H4clprTIlNTWj1D/voV8kPEJHEqHm aV8k/w9y+AuRgqP43WWdkA0lO/Tb1m8kAH75kD5mJo93Z0w/9Ct0jLsfh Z2cW+NOuDUDNWFw1gD3WSB36spU7cGruzi5BZQPI7TI74UkUa3yeyiOPS A==; X-CSE-ConnectionGUID: hoqfmQawSMm/oKOaJ1Gblw== X-CSE-MsgGUID: YGNNQgheSwe307kZ/h1pBQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199969" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199969" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 X-CSE-ConnectionGUID: kuR694ncSg+jAMCLnwR/Eg== X-CSE-MsgGUID: QG2j3FUCQaGHzzUx49fZbA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593512" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, "Rafael J . Wysocki" Subject: [PATCH v6 42/49] cpufreq: intel_pstate: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:13 -0700 Message-ID: <20240520224620.9480-43-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Rafael J. Wysocki --- drivers/cpufreq/intel_pstate.c | 90 +++++++++++++++++----------------- 1 file changed, 44 insertions(+), 46 deletions(-) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index 4b986c044741..69d85b5bf366 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -2362,54 +2362,53 @@ static const struct pstate_funcs knl_funcs =3D { .get_val =3D core_get_val, }; =20 -#define X86_MATCH(model, policy) \ - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \ - X86_FEATURE_APERFMPERF, &policy) +#define X86_MATCH(vfm, policy) \ + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_APERFMPERF, &policy) =20 static const struct x86_cpu_id intel_pstate_cpu_ids[] =3D { - X86_MATCH(SANDYBRIDGE, core_funcs), - X86_MATCH(SANDYBRIDGE_X, core_funcs), - X86_MATCH(ATOM_SILVERMONT, silvermont_funcs), - X86_MATCH(IVYBRIDGE, core_funcs), - X86_MATCH(HASWELL, core_funcs), - X86_MATCH(BROADWELL, core_funcs), - X86_MATCH(IVYBRIDGE_X, core_funcs), - X86_MATCH(HASWELL_X, core_funcs), - X86_MATCH(HASWELL_L, core_funcs), - X86_MATCH(HASWELL_G, core_funcs), - X86_MATCH(BROADWELL_G, core_funcs), - X86_MATCH(ATOM_AIRMONT, airmont_funcs), - X86_MATCH(SKYLAKE_L, core_funcs), - X86_MATCH(BROADWELL_X, core_funcs), - X86_MATCH(SKYLAKE, core_funcs), - X86_MATCH(BROADWELL_D, core_funcs), - X86_MATCH(XEON_PHI_KNL, knl_funcs), - X86_MATCH(XEON_PHI_KNM, knl_funcs), - X86_MATCH(ATOM_GOLDMONT, core_funcs), - X86_MATCH(ATOM_GOLDMONT_PLUS, core_funcs), - X86_MATCH(SKYLAKE_X, core_funcs), - X86_MATCH(COMETLAKE, core_funcs), - X86_MATCH(ICELAKE_X, core_funcs), - X86_MATCH(TIGERLAKE, core_funcs), - X86_MATCH(SAPPHIRERAPIDS_X, core_funcs), - X86_MATCH(EMERALDRAPIDS_X, core_funcs), + X86_MATCH(INTEL_SANDYBRIDGE, core_funcs), + X86_MATCH(INTEL_SANDYBRIDGE_X, core_funcs), + X86_MATCH(INTEL_ATOM_SILVERMONT, silvermont_funcs), + X86_MATCH(INTEL_IVYBRIDGE, core_funcs), + X86_MATCH(INTEL_HASWELL, core_funcs), + X86_MATCH(INTEL_BROADWELL, core_funcs), + X86_MATCH(INTEL_IVYBRIDGE_X, core_funcs), + X86_MATCH(INTEL_HASWELL_X, core_funcs), + X86_MATCH(INTEL_HASWELL_L, core_funcs), + X86_MATCH(INTEL_HASWELL_G, core_funcs), + X86_MATCH(INTEL_BROADWELL_G, core_funcs), + X86_MATCH(INTEL_ATOM_AIRMONT, airmont_funcs), + X86_MATCH(INTEL_SKYLAKE_L, core_funcs), + X86_MATCH(INTEL_BROADWELL_X, core_funcs), + X86_MATCH(INTEL_SKYLAKE, core_funcs), + X86_MATCH(INTEL_BROADWELL_D, core_funcs), + X86_MATCH(INTEL_XEON_PHI_KNL, knl_funcs), + X86_MATCH(INTEL_XEON_PHI_KNM, knl_funcs), + X86_MATCH(INTEL_ATOM_GOLDMONT, core_funcs), + X86_MATCH(INTEL_ATOM_GOLDMONT_PLUS, core_funcs), + X86_MATCH(INTEL_SKYLAKE_X, core_funcs), + X86_MATCH(INTEL_COMETLAKE, core_funcs), + X86_MATCH(INTEL_ICELAKE_X, core_funcs), + X86_MATCH(INTEL_TIGERLAKE, core_funcs), + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs), + X86_MATCH(INTEL_EMERALDRAPIDS_X, core_funcs), {} }; MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); =20 #ifdef CONFIG_ACPI static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst =3D { - X86_MATCH(BROADWELL_D, core_funcs), - X86_MATCH(BROADWELL_X, core_funcs), - X86_MATCH(SKYLAKE_X, core_funcs), - X86_MATCH(ICELAKE_X, core_funcs), - X86_MATCH(SAPPHIRERAPIDS_X, core_funcs), + X86_MATCH(INTEL_BROADWELL_D, core_funcs), + X86_MATCH(INTEL_BROADWELL_X, core_funcs), + X86_MATCH(INTEL_SKYLAKE_X, core_funcs), + X86_MATCH(INTEL_ICELAKE_X, core_funcs), + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs), {} }; #endif =20 static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] =3D { - X86_MATCH(KABYLAKE, core_funcs), + X86_MATCH(INTEL_KABYLAKE, core_funcs), {} }; =20 @@ -3345,14 +3344,13 @@ static inline void intel_pstate_request_control_fro= m_smm(void) {} =20 #define INTEL_PSTATE_HWP_BROADWELL 0x01 =20 -#define X86_MATCH_HWP(model, hwp_mode) \ - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \ - X86_FEATURE_HWP, hwp_mode) +#define X86_MATCH_HWP(vfm, hwp_mode) \ + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_HWP, hwp_mode) =20 static const struct x86_cpu_id hwp_support_ids[] __initconst =3D { - X86_MATCH_HWP(BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL), - X86_MATCH_HWP(BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL), - X86_MATCH_HWP(ANY, 0), + X86_MATCH_HWP(INTEL_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL), + X86_MATCH_HWP(INTEL_BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL), + X86_MATCH_HWP(INTEL_ANY, 0), {} }; =20 @@ -3385,15 +3383,15 @@ static const struct x86_cpu_id intel_epp_default[] = =3D { * which can result in one core turbo frequency for * AlderLake Mobile CPUs. */ - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)= ), - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP= (32)), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWER= SAVE, - HWP_EPP_BALANCE_POWERSAVE, 115, 16)), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)), + X86_MATCH_VFM(INTEL_METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE, + HWP_EPP_BALANCE_POWERSAVE, 115, 16)), {} }; =20 static const struct x86_cpu_id intel_hybrid_scaling_factor[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL), + X86_MATCH_VFM(INTEL_METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8FB513D527 for ; Mon, 20 May 2024 22:46:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245220; cv=none; b=Tg++KTXU+kfQgR8jrZhhomp2rRcuIGK0sn3Ur6pYU3U2w3dJZwYJDldk8ktqESLS2xBJog2pfCpjUT/NkaB+fLHFLzsGaga3N22g2Aq2U91dDM0mOVVsvfa5AGGJQfRPyX2sR65YCl1OhwKV+Xhy7Y92PSItaTisrzOfGq3hOWw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245220; c=relaxed/simple; bh=u+wLTku9+HuuC8Qmf1gTNgKbRO640SfS5D9xhRd1fEU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gsn9Pr9x7Ltf3pcoVTHQk+IPxOqHDzDiTr0zHP8Hct/kZrXl3nXku63I+iVVGhAWGcXiTlbW7zvZh2rHawHp0F6Si/fRO0oZuSfQnngww0zOj7AHK9ZGN3LYCAv/BNy36FrpnAB1FI+gBSooWWCWMt5mx43e3J9AXwo0DIxT9F4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kSWoZwHx; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kSWoZwHx" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245219; x=1747781219; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u+wLTku9+HuuC8Qmf1gTNgKbRO640SfS5D9xhRd1fEU=; b=kSWoZwHx2SKZvO/ocKiHQKQntPuzzLeP+sY8so0gfyis2ktPyf5bgy+I IQdC1Sgm1nUzfWFQQwMFW7ZnImpdFWtgg3peWL5VcPxMxVnGn0Chm+OEb ykqX183y7jTa0SLsHNYkWPYJpa5JbKmuePevOe3uarOivLX1LkZnQuufR acSZGOYvc5S13DHB76RynhwT+B83nt0IwhYb7Kmnt+jLXciG3E1QANHuJ b7RVV1SiZC+STrpoWonbDQywW8UJDjbXDnQbesVCmHVyvdqV1Y4SW3kog aQOjRB7PjZEfpLl32Hl2ze75grxBNw1hc2hbR/tM+iHIDqjpVb9t/mbjD w==; X-CSE-ConnectionGUID: upEjUuJyTjqZOnmkHm5QCQ== X-CSE-MsgGUID: YXZqC1vsRFmVOhhIRZv4Jw== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199979" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199979" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 X-CSE-ConnectionGUID: FEg2DnAGT/C5dx5m1Lgj0g== X-CSE-MsgGUID: U1sw2U2DSTalky/lOkcuVQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593515" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 43/49] perf/x86/rapl: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:14 -0700 Message-ID: <20240520224620.9480-44-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- arch/x86/events/rapl.c | 90 +++++++++++++++++++++--------------------- 1 file changed, 45 insertions(+), 45 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index 46e673585560..edab61e3b053 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -764,51 +764,51 @@ static struct rapl_model model_amd_hygon =3D { }; =20 static const struct x86_cpu_id rapl_model_match[] __initconst =3D { - X86_MATCH_FEATURE(X86_FEATURE_RAPL, &model_amd_hygon), - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &model_snb), - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &model_snbep), - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &model_snb), - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &model_snbep), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &model_hsw), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &model_hsx), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &model_hsw), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &model_hsw), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &model_hsw), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &model_hsw), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &model_hsx), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &model_hsx), - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &model_knl), - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &model_knl), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &model_hsx), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &model_hsw), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &model_hsw), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &model_hsw), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &model_hsx), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &model_hsx), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &model_spr), - X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &model_spr), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE_H, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, &model_skl), - X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M, &model_skl), + X86_MATCH_FEATURE(X86_FEATURE_RAPL, &model_amd_hygon), + X86_MATCH_VFM(INTEL_SANDYBRIDGE, &model_snb), + X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &model_snbep), + X86_MATCH_VFM(INTEL_IVYBRIDGE, &model_snb), + X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &model_snbep), + X86_MATCH_VFM(INTEL_HASWELL, &model_hsw), + X86_MATCH_VFM(INTEL_HASWELL_X, &model_hsx), + X86_MATCH_VFM(INTEL_HASWELL_L, &model_hsw), + X86_MATCH_VFM(INTEL_HASWELL_G, &model_hsw), + X86_MATCH_VFM(INTEL_BROADWELL, &model_hsw), + X86_MATCH_VFM(INTEL_BROADWELL_G, &model_hsw), + X86_MATCH_VFM(INTEL_BROADWELL_X, &model_hsx), + X86_MATCH_VFM(INTEL_BROADWELL_D, &model_hsx), + X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &model_knl), + X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &model_knl), + X86_MATCH_VFM(INTEL_SKYLAKE_L, &model_skl), + X86_MATCH_VFM(INTEL_SKYLAKE, &model_skl), + X86_MATCH_VFM(INTEL_SKYLAKE_X, &model_hsx), + X86_MATCH_VFM(INTEL_KABYLAKE_L, &model_skl), + X86_MATCH_VFM(INTEL_KABYLAKE, &model_skl), + X86_MATCH_VFM(INTEL_CANNONLAKE_L, &model_skl), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &model_hsw), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &model_hsw), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &model_hsw), + X86_MATCH_VFM(INTEL_ICELAKE_L, &model_skl), + X86_MATCH_VFM(INTEL_ICELAKE, &model_skl), + X86_MATCH_VFM(INTEL_ICELAKE_D, &model_hsx), + X86_MATCH_VFM(INTEL_ICELAKE_X, &model_hsx), + X86_MATCH_VFM(INTEL_COMETLAKE_L, &model_skl), + X86_MATCH_VFM(INTEL_COMETLAKE, &model_skl), + X86_MATCH_VFM(INTEL_TIGERLAKE_L, &model_skl), + X86_MATCH_VFM(INTEL_TIGERLAKE, &model_skl), + X86_MATCH_VFM(INTEL_ALDERLAKE, &model_skl), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, &model_skl), + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &model_skl), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &model_spr), + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &model_spr), + X86_MATCH_VFM(INTEL_RAPTORLAKE, &model_skl), + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &model_skl), + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &model_skl), + X86_MATCH_VFM(INTEL_METEORLAKE, &model_skl), + X86_MATCH_VFM(INTEL_METEORLAKE_L, &model_skl), + X86_MATCH_VFM(INTEL_ARROWLAKE_H, &model_skl), + X86_MATCH_VFM(INTEL_ARROWLAKE, &model_skl), + X86_MATCH_VFM(INTEL_LUNARLAKE_M, &model_skl), {}, }; MODULE_DEVICE_TABLE(x86cpu, rapl_model_match); --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B48613D289 for ; Mon, 20 May 2024 22:46:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245219; cv=none; b=P19Nc8N5O5lkrSQEpzrIYThhmaQoaeylRjAtFcg7hxzUBsz41qni/Kt5g7wKTFZ70AC/GeoxM1F9ltB/q3TrrDpddHbRSSaHYmsXLX6vTNy25VUGKEetz1V6Br4qYCbo1nAXsIYbMFT0eCq1mtcOYnL6FpJMfY6M1u0RbROfFL4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245219; c=relaxed/simple; bh=PBr5qbc4Ss4oqMBYAxjj4UdSDANT6hrIS0/VoPySkL0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=q11SGMVIVs5Hq0+CDwh94SGLta7yPX8nb/YXgg1zWwOv4jXz0ZDe70N8dx0TxAoI6XQzDrZLJXa7Ve15mnyWlF0Q2GTw3b6rfxaJJiiBdjZM3Upc1xeJpHieH1IFj2aRw4AOKZDOyGpkX417paprkrCom75JOd9NAvnbmMbmxB8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CrMmLYsH; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CrMmLYsH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245217; x=1747781217; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PBr5qbc4Ss4oqMBYAxjj4UdSDANT6hrIS0/VoPySkL0=; b=CrMmLYsHlpy8xuPFQ0nuf15zNWgZCCNjCgJheb2bwKVo4NesY5okFBm8 os1GVuSaDfJZna6pGmmhJVpOozZOsk6VAcSoEM4O9pBzKGt256+gybX6l 2fvy5cLePJzDKPBV1s7ECjXjiFXgXBSlNfB+ZKLEf4hJz1J5gmsIwl7D+ 9BicFUOwz5KXXFEChlR08tg7GCmEbHSCUZesizs9NteLg/J0cQnN2HMwM 558shNbxazJu6FghrykTJUBCvagzbWiDtwQZ5pvVFUvLQL6faSDf7BCyo HPT9o1S0+qOpxYwbKTqn5x99RAKJcuQeb3dUfzi3WeLP14qyfIhXFdn5k g==; X-CSE-ConnectionGUID: tEpKD8IaQXG1vd4eoMYzOw== X-CSE-MsgGUID: lksSWXa4RT+BI1rXjIyJRQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12199990" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12199990" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 X-CSE-ConnectionGUID: nptkOWmKSM6BWb7h4XSrXg== X-CSE-MsgGUID: 7g7XCoOAQa+0UHw/cvqnhQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593519" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, Srinivas Pandruvada , Hans de Goede Subject: [PATCH v6 44/49] platform/x86: ISST: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:15 -0700 Message-ID: <20240520224620.9480-45-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Srinivas Pandruvada Acked-by: Hans de Goede --- .../platform/x86/intel/speed_select_if/isst_if_common.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c b/= drivers/platform/x86/intel/speed_select_if/isst_if_common.c index 713c0d1fa85f..21e15e679fc3 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c @@ -719,10 +719,10 @@ static struct miscdevice isst_if_char_driver =3D { }; =20 static const struct x86_cpu_id hpm_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D, NULL), - X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, NULL), + X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, NULL), + X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, NULL), + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, NULL), + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, NULL), {} }; =20 --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 965F913D2AB for ; Mon, 20 May 2024 22:46:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245219; cv=none; b=m9apcgZ/s86Tf/ktlEiJ93BvdQVO47ShDtVuEpq3iHsMW3+HzgoSulKd2mScqqwCGt87S0HfGwjHAgqsv0e+RLljiGAGCyaZFQAeE45Ywa7k21dR59cTdU2k/104OH3cICDkearjbXAyqXKEJwQZArUwSKqv6VFMDdsQWHEcEYA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245219; c=relaxed/simple; bh=+cW1FKmICz5yWt4FR2pNW4rOWKXVwnN1+017ENhmnxI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=namvlSoMoHedZplNZ7V0mL7x+hvrc+XRhUOouWtqSAYdX6lAzZ7ooCNYa/e7Siwl+heOfpA0aS5/6kwb9Xa+5UO6/QFCMGV0e5vFGEvcokOVPc4dPwoUs7JOEjrFtXAGhBpSaNB+wod03QnywGL5L0/GkXsc7WnPKxw+q7rKkoM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dbCfTi5x; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dbCfTi5x" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245218; x=1747781218; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+cW1FKmICz5yWt4FR2pNW4rOWKXVwnN1+017ENhmnxI=; b=dbCfTi5x+aRoCRtxhzly2CBM2JMkViLSdiGbBR+mn7jcslAgqep7y3dB zZ+FmzrYJ40JJsVFDwMO+pzBcSjK3Sx0331hW1fyNWVoSKOuYwSo77PwR VSFT/t1hdZ3/Bx5WubhG6u/xj5dQ5OYX6YlCh+xQP3nlJtuZ6j8RyxWBY XzGw+ApBTH272MxE+GHF/5wFdBUyACLOp7zjiHyv9uJplWfzwUcaU7AA+ 0/iOxi9XZ7X50iXuxB2CtarOkKn90LaN7jiDkJco1v2NibvCuDavYRCJx 7dg/nZQJohuMtSjG1t+QZrI4etNnJNjTCl+ypny7BOPXaqm+aT75/5x8Y g==; X-CSE-ConnectionGUID: +EHjy9oXR5KQxNFy2HuPrA== X-CSE-MsgGUID: fuyEmqOaSxCsTea6rhp5qg== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12200001" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12200001" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 X-CSE-ConnectionGUID: mLst+c4SQ5mFAbBPlmyApw== X-CSE-MsgGUID: y4s9iRi+REWfU/kmzxpuKQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593522" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, "Rafael J . Wysocki" Subject: [PATCH v6 45/49] powercap: intel_rapl: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:16 -0700 Message-ID: <20240520224620.9480-46-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Rafael J. Wysocki --- drivers/powercap/intel_rapl_common.c | 120 +++++++++++++-------------- 1 file changed, 60 insertions(+), 60 deletions(-) diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_= rapl_common.c index aac0744011a3..3cffa6c79538 100644 --- a/drivers/powercap/intel_rapl_common.c +++ b/drivers/powercap/intel_rapl_common.c @@ -1222,66 +1222,66 @@ static const struct rapl_defaults rapl_defaults_amd= =3D { }; =20 static const struct x86_cpu_id rapl_ids[] __initconst =3D { - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &rapl_defaults_core), - - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &rapl_defaults_core), - - X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &rapl_defaults_hsw_server), - - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &rapl_defaults_hsw_server), - - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &rapl_defaults_hsw_server), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &rapl_defaults_hsw_server), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &rapl_defaults_hsw_server), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &rapl_defaults_spr_server), - X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &rapl_defaults_spr_server), - X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE_H, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(LAKEFIELD, &rapl_defaults_core), - - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &rapl_defaults_byt), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &rapl_defaults_cht), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &rapl_defaults_tng), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_MID, &rapl_defaults_ann), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &rapl_defaults_core), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &rapl_defaults_core), - - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &rapl_defaults_hsw_server), - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &rapl_defaults_hsw_server), + X86_MATCH_VFM(INTEL_SANDYBRIDGE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &rapl_defaults_core), + + X86_MATCH_VFM(INTEL_IVYBRIDGE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &rapl_defaults_core), + + X86_MATCH_VFM(INTEL_HASWELL, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_HASWELL_L, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_HASWELL_G, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_HASWELL_X, &rapl_defaults_hsw_server), + + X86_MATCH_VFM(INTEL_BROADWELL, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_BROADWELL_G, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_BROADWELL_D, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_BROADWELL_X, &rapl_defaults_hsw_server), + + X86_MATCH_VFM(INTEL_SKYLAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_SKYLAKE_L, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_SKYLAKE_X, &rapl_defaults_hsw_server), + X86_MATCH_VFM(INTEL_KABYLAKE_L, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_KABYLAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_CANNONLAKE_L, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ICELAKE_L, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ICELAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ICELAKE_NNPI, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ICELAKE_X, &rapl_defaults_hsw_server), + X86_MATCH_VFM(INTEL_ICELAKE_D, &rapl_defaults_hsw_server), + X86_MATCH_VFM(INTEL_COMETLAKE_L, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_COMETLAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_TIGERLAKE_L, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_TIGERLAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ROCKETLAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ALDERLAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_RAPTORLAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_METEORLAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_METEORLAKE_L, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &rapl_defaults_spr_server), + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &rapl_defaults_spr_server), + X86_MATCH_VFM(INTEL_LUNARLAKE_M, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ARROWLAKE_H, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ARROWLAKE, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_LAKEFIELD, &rapl_defaults_core), + + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &rapl_defaults_byt), + X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &rapl_defaults_cht), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &rapl_defaults_tng), + X86_MATCH_VFM(INTEL_ATOM_AIRMONT_MID, &rapl_defaults_ann), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ATOM_TREMONT, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &rapl_defaults_core), + X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, &rapl_defaults_core), + + X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &rapl_defaults_hsw_server), + X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &rapl_defaults_hsw_server), =20 X86_MATCH_VENDOR_FAM(AMD, 0x17, &rapl_defaults_amd), X86_MATCH_VENDOR_FAM(AMD, 0x19, &rapl_defaults_amd), --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F39B813D539 for ; Mon, 20 May 2024 22:46:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245221; cv=none; b=LbbXgTh6Y8+aRyHImTxE9bjZ0kIrdbBnumC1Qg5BB6Gvl2wVijOjSlny1Aa02mYlNGSoBEnx5B+dKLpcAXKCRdR4FQ6HeLKKx3vPHw5pbMHlkubYB9hfs802Gk28R8ncCQoWPQfSVSBuEw16uD+5ypqIqG5A9pn61cL18wCOSv8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245221; c=relaxed/simple; bh=A/kp9Rdskk/VY+HmbT1Gfw4afwzWaErQECfGecHn7vw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CI6qLr3YGovgTCKOEV97XNkhJX3G5Qh+LcSYIppqP3/vNjEi2ZVFwDrZSrLw554A0sp3IAGdEzUSDt3m4p3UDbNiz4+ZWDXpVvz4+54fuIqe8JGsB73QwpQ0sriQMnVDfxDPqB1pg+RX4syVs5eCAq7zrCFz3+WMiT60UQW9IhQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=BVyhrLXF; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="BVyhrLXF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245219; x=1747781219; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=A/kp9Rdskk/VY+HmbT1Gfw4afwzWaErQECfGecHn7vw=; b=BVyhrLXFcG4jAGtyzrm0Ku62WcFP1Ol/zqtasCQCcLhE1WVuIRM/S0MK EYsBpetHtxA/Ny/3m0/wZGzUlcZ5TL0tCk9/hXwlrTNGNl4l4g0x8WCaw j+E4zS8i6wI0DPcrQiYhplBKcRXoZ1fyRnDnaF5e+v0BB6ElcwGxdM6S3 WBrSPpJdOnV34f7cULaBZMkAh6c14Nobhqo2VCKOff9xb1Zjg7SU0yGe6 ztQkRavgC4dE8Rggawt/9KPaLe4kSymx3xWlH3EvMZn1ZARCy2IBJQs5R XlSfDFRNAoPQ3fuBCtvpMUh4+j9w7kvV+zRt/74Hf1CVvgpZSM5v/ku67 A==; X-CSE-ConnectionGUID: UB8gfZMOQjCErLSVyPeOMg== X-CSE-MsgGUID: Q7icTqyoTH+LI5dqYjWy2Q== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12200012" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12200012" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 X-CSE-ConnectionGUID: /X0EMqcrQMKHwdvSe7S2Ag== X-CSE-MsgGUID: jblmajauQ925b227asUMIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593525" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev, "Rafael J . Wysocki" Subject: [PATCH v6 46/49] tools/power/turbostat: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:17 -0700 Message-ID: <20240520224620.9480-47-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New CPU #defines encode vendor and family as well as model. N.B. Copied VFM_*() defines here from to avoid an application picking a second internal kernel header file. Signed-off-by: Tony Luck Acked-by: Rafael J. Wysocki --- tools/power/x86/turbostat/turbostat.c | 165 +++++++++++++++----------- 1 file changed, 95 insertions(+), 70 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbos= tat/turbostat.c index 8cdf41906e98..2df6c118b6c0 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -9,6 +9,30 @@ =20 #define _GNU_SOURCE #include MSRHEADER + +// copied from arch/x86/include/asm/cpu_device_id.h +#define VFM_MODEL_BIT 0 +#define VFM_FAMILY_BIT 8 +#define VFM_VENDOR_BIT 16 +#define VFM_RSVD_BIT 24 + +#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT) +#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT) +#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT) + +#define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT) +#define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT) +#define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT) + +#define VFM_MAKE(_vendor, _family, _model) ( \ + ((_model) << VFM_MODEL_BIT) | \ + ((_family) << VFM_FAMILY_BIT) | \ + ((_vendor) << VFM_VENDOR_BIT) \ +) +// end copied section + +#define X86_VENDOR_INTEL 0 + #include INTEL_FAMILY_HEADER #include #include @@ -367,7 +391,7 @@ struct platform_features { }; =20 struct platform_data { - unsigned int model; + unsigned int vfm; const struct platform_features *features; }; =20 @@ -910,75 +934,75 @@ static const struct platform_features amd_features_wi= th_rapl =3D { }; =20 static const struct platform_data turbostat_pdata[] =3D { - { INTEL_FAM6_NEHALEM, &nhm_features }, - { INTEL_FAM6_NEHALEM_G, &nhm_features }, - { INTEL_FAM6_NEHALEM_EP, &nhm_features }, - { INTEL_FAM6_NEHALEM_EX, &nhx_features }, - { INTEL_FAM6_WESTMERE, &nhm_features }, - { INTEL_FAM6_WESTMERE_EP, &nhm_features }, - { INTEL_FAM6_WESTMERE_EX, &nhx_features }, - { INTEL_FAM6_SANDYBRIDGE, &snb_features }, - { INTEL_FAM6_SANDYBRIDGE_X, &snx_features }, - { INTEL_FAM6_IVYBRIDGE, &ivb_features }, - { INTEL_FAM6_IVYBRIDGE_X, &ivx_features }, - { INTEL_FAM6_HASWELL, &hsw_features }, - { INTEL_FAM6_HASWELL_X, &hsx_features }, - { INTEL_FAM6_HASWELL_L, &hswl_features }, - { INTEL_FAM6_HASWELL_G, &hswg_features }, - { INTEL_FAM6_BROADWELL, &bdw_features }, - { INTEL_FAM6_BROADWELL_G, &bdwg_features }, - { INTEL_FAM6_BROADWELL_X, &bdx_features }, - { INTEL_FAM6_BROADWELL_D, &bdx_features }, - { INTEL_FAM6_SKYLAKE_L, &skl_features }, - { INTEL_FAM6_SKYLAKE, &skl_features }, - { INTEL_FAM6_SKYLAKE_X, &skx_features }, - { INTEL_FAM6_KABYLAKE_L, &skl_features }, - { INTEL_FAM6_KABYLAKE, &skl_features }, - { INTEL_FAM6_COMETLAKE, &skl_features }, - { INTEL_FAM6_COMETLAKE_L, &skl_features }, - { INTEL_FAM6_CANNONLAKE_L, &cnl_features }, - { INTEL_FAM6_ICELAKE_X, &icx_features }, - { INTEL_FAM6_ICELAKE_D, &icx_features }, - { INTEL_FAM6_ICELAKE_L, &cnl_features }, - { INTEL_FAM6_ICELAKE_NNPI, &cnl_features }, - { INTEL_FAM6_ROCKETLAKE, &cnl_features }, - { INTEL_FAM6_TIGERLAKE_L, &cnl_features }, - { INTEL_FAM6_TIGERLAKE, &cnl_features }, - { INTEL_FAM6_SAPPHIRERAPIDS_X, &spr_features }, - { INTEL_FAM6_EMERALDRAPIDS_X, &spr_features }, - { INTEL_FAM6_GRANITERAPIDS_X, &spr_features }, - { INTEL_FAM6_LAKEFIELD, &cnl_features }, - { INTEL_FAM6_ALDERLAKE, &adl_features }, - { INTEL_FAM6_ALDERLAKE_L, &adl_features }, - { INTEL_FAM6_RAPTORLAKE, &adl_features }, - { INTEL_FAM6_RAPTORLAKE_P, &adl_features }, - { INTEL_FAM6_RAPTORLAKE_S, &adl_features }, - { INTEL_FAM6_METEORLAKE, &cnl_features }, - { INTEL_FAM6_METEORLAKE_L, &cnl_features }, - { INTEL_FAM6_ARROWLAKE_H, &arl_features }, - { INTEL_FAM6_ARROWLAKE_U, &arl_features }, - { INTEL_FAM6_ARROWLAKE, &arl_features }, - { INTEL_FAM6_LUNARLAKE_M, &arl_features }, - { INTEL_FAM6_ATOM_SILVERMONT, &slv_features }, - { INTEL_FAM6_ATOM_SILVERMONT_D, &slvd_features }, - { INTEL_FAM6_ATOM_AIRMONT, &amt_features }, - { INTEL_FAM6_ATOM_GOLDMONT, &gmt_features }, - { INTEL_FAM6_ATOM_GOLDMONT_D, &gmtd_features }, - { INTEL_FAM6_ATOM_GOLDMONT_PLUS, &gmtp_features }, - { INTEL_FAM6_ATOM_TREMONT_D, &tmtd_features }, - { INTEL_FAM6_ATOM_TREMONT, &tmt_features }, - { INTEL_FAM6_ATOM_TREMONT_L, &tmt_features }, - { INTEL_FAM6_ATOM_GRACEMONT, &adl_features }, - { INTEL_FAM6_ATOM_CRESTMONT_X, &srf_features }, - { INTEL_FAM6_ATOM_CRESTMONT, &grr_features }, - { INTEL_FAM6_XEON_PHI_KNL, &knl_features }, - { INTEL_FAM6_XEON_PHI_KNM, &knl_features }, + { INTEL_NEHALEM, &nhm_features }, + { INTEL_NEHALEM_G, &nhm_features }, + { INTEL_NEHALEM_EP, &nhm_features }, + { INTEL_NEHALEM_EX, &nhx_features }, + { INTEL_WESTMERE, &nhm_features }, + { INTEL_WESTMERE_EP, &nhm_features }, + { INTEL_WESTMERE_EX, &nhx_features }, + { INTEL_SANDYBRIDGE, &snb_features }, + { INTEL_SANDYBRIDGE_X, &snx_features }, + { INTEL_IVYBRIDGE, &ivb_features }, + { INTEL_IVYBRIDGE_X, &ivx_features }, + { INTEL_HASWELL, &hsw_features }, + { INTEL_HASWELL_X, &hsx_features }, + { INTEL_HASWELL_L, &hswl_features }, + { INTEL_HASWELL_G, &hswg_features }, + { INTEL_BROADWELL, &bdw_features }, + { INTEL_BROADWELL_G, &bdwg_features }, + { INTEL_BROADWELL_X, &bdx_features }, + { INTEL_BROADWELL_D, &bdx_features }, + { INTEL_SKYLAKE_L, &skl_features }, + { INTEL_SKYLAKE, &skl_features }, + { INTEL_SKYLAKE_X, &skx_features }, + { INTEL_KABYLAKE_L, &skl_features }, + { INTEL_KABYLAKE, &skl_features }, + { INTEL_COMETLAKE, &skl_features }, + { INTEL_COMETLAKE_L, &skl_features }, + { INTEL_CANNONLAKE_L, &cnl_features }, + { INTEL_ICELAKE_X, &icx_features }, + { INTEL_ICELAKE_D, &icx_features }, + { INTEL_ICELAKE_L, &cnl_features }, + { INTEL_ICELAKE_NNPI, &cnl_features }, + { INTEL_ROCKETLAKE, &cnl_features }, + { INTEL_TIGERLAKE_L, &cnl_features }, + { INTEL_TIGERLAKE, &cnl_features }, + { INTEL_SAPPHIRERAPIDS_X, &spr_features }, + { INTEL_EMERALDRAPIDS_X, &spr_features }, + { INTEL_GRANITERAPIDS_X, &spr_features }, + { INTEL_LAKEFIELD, &cnl_features }, + { INTEL_ALDERLAKE, &adl_features }, + { INTEL_ALDERLAKE_L, &adl_features }, + { INTEL_RAPTORLAKE, &adl_features }, + { INTEL_RAPTORLAKE_P, &adl_features }, + { INTEL_RAPTORLAKE_S, &adl_features }, + { INTEL_METEORLAKE, &cnl_features }, + { INTEL_METEORLAKE_L, &cnl_features }, + { INTEL_ARROWLAKE_H, &arl_features }, + { INTEL_ARROWLAKE_U, &arl_features }, + { INTEL_ARROWLAKE, &arl_features }, + { INTEL_LUNARLAKE_M, &arl_features }, + { INTEL_ATOM_SILVERMONT, &slv_features }, + { INTEL_ATOM_SILVERMONT_D, &slvd_features }, + { INTEL_ATOM_AIRMONT, &amt_features }, + { INTEL_ATOM_GOLDMONT, &gmt_features }, + { INTEL_ATOM_GOLDMONT_D, &gmtd_features }, + { INTEL_ATOM_GOLDMONT_PLUS, &gmtp_features }, + { INTEL_ATOM_TREMONT_D, &tmtd_features }, + { INTEL_ATOM_TREMONT, &tmt_features }, + { INTEL_ATOM_TREMONT_L, &tmt_features }, + { INTEL_ATOM_GRACEMONT, &adl_features }, + { INTEL_ATOM_CRESTMONT_X, &srf_features }, + { INTEL_ATOM_CRESTMONT, &grr_features }, + { INTEL_XEON_PHI_KNL, &knl_features }, + { INTEL_XEON_PHI_KNM, &knl_features }, /* * Missing support for - * INTEL_FAM6_ICELAKE - * INTEL_FAM6_ATOM_SILVERMONT_MID - * INTEL_FAM6_ATOM_AIRMONT_MID - * INTEL_FAM6_ATOM_AIRMONT_NP + * INTEL_ICELAKE + * INTEL_ATOM_SILVERMONT_MID + * INTEL_ATOM_AIRMONT_MID + * INTEL_ATOM_AIRMONT_NP */ { 0, NULL }, }; @@ -1003,11 +1027,12 @@ void probe_platform_features(unsigned int family, u= nsigned int model) return; } =20 - if (!genuine_intel || family !=3D 6) + if (!genuine_intel) return; =20 for (i =3D 0; turbostat_pdata[i].features; i++) { - if (turbostat_pdata[i].model =3D=3D model) { + if (VFM_FAMILY(turbostat_pdata[i].vfm) =3D=3D family && + VFM_MODEL(turbostat_pdata[i].vfm) =3D=3D model) { platform =3D turbostat_pdata[i].features; return; } --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 393BF13D609 for ; Mon, 20 May 2024 22:46:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245221; cv=none; b=dyo3BzjzNCCFKPAHqUEXxAhHVV9nOV6lVgt/VIxwYE9ue/3M6AR5dubwcDYbT1iRJMsNxCBLgtbzIIfCcY9F+5PQsLJ0ffFbP+LS5Syc5KqJoUpQXBbuXswkBoA6sJ20XYls0lzueNepIVBDT+i6+ihF8VAVqYn6c+3lM9NPM9g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245221; c=relaxed/simple; bh=kewR2uBkcTny6f6IgFHYsgMrVAXGPg5/f1jOQ9w1xDE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pRHJ1EAE8qzT2rBq6nwQI9/iWcoK4HhWsaxODyEy4KsYn7/WLcUiiUxdMjr1izwsAz4QxY323YoHJd88aGm77+fYmKYbMZcAisGALX0T36kOJet1CXsA5UazECt4FmkqOa1LzxrnzMK/G2lvrcsJwFjxBwFW1v6q8rXGS+Cgdhg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QIxj0FL3; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QIxj0FL3" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245219; x=1747781219; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kewR2uBkcTny6f6IgFHYsgMrVAXGPg5/f1jOQ9w1xDE=; b=QIxj0FL3arBZXSy8aiOslP9NtXtJQEWf5WamobWHd/I6VA3jKc913+94 HSfrv+CwyADcOlQxFSCB0n0lWZW6R6UMrzrpHQTNls+z29pf5cwas8b82 75Sscnpm7SAgtyO5VWMRWGF+3y8nThhgZ6HpYcyFGEgNO2AWE7J+jkb2x tYgrwW7adSvzvjWOjzzXa535nrhLljScNQxXEp63Hp6MLMRnPueTe9DBy 1xwk42WXvkpVWx+jG2vL2skuxAxSExF1EfBv4RNeyNI/GO4AMJa6av7E8 Jdv9X+yTi8vgGHjPlK3HiiU2LlOiaSbgZxeSvQ4JfB0RvkmBKRLy3RZ1q Q==; X-CSE-ConnectionGUID: l5GUuQcYRLSJkzRne4Mtxw== X-CSE-MsgGUID: OuxYXOqLQoaCMN5i+ShpTg== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12200024" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12200024" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:41 -0700 X-CSE-ConnectionGUID: zq0pFpXWS6ebPr0Zi6x9gw== X-CSE-MsgGUID: 2+NlFfxISxmt/ivpRL0kAQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593528" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:40 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 47/49] peci, hwmon: Switch to new Intel CPU model defines Date: Mon, 20 May 2024 15:46:18 -0700 Message-ID: <20240520224620.9480-48-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update peci subsystem to use the same vendor-family-model combined definition that core x86 code uses. Signed-off-by: Tony Luck --- include/linux/peci-cpu.h | 24 ++++++++++++++++++++++++ include/linux/peci.h | 6 ++---- drivers/peci/internal.h | 6 ++---- drivers/hwmon/peci/cputemp.c | 8 ++++---- drivers/peci/core.c | 5 ++--- drivers/peci/cpu.c | 21 +++++++-------------- drivers/peci/device.c | 3 +-- 7 files changed, 42 insertions(+), 31 deletions(-) diff --git a/include/linux/peci-cpu.h b/include/linux/peci-cpu.h index ff8ae9c26c80..601cdd086bf6 100644 --- a/include/linux/peci-cpu.h +++ b/include/linux/peci-cpu.h @@ -6,6 +6,30 @@ =20 #include =20 +/* Copied from x86 */ +#define X86_VENDOR_INTEL 0 + +/* Copied from x86 */ +#define VFM_MODEL_BIT 0 +#define VFM_FAMILY_BIT 8 +#define VFM_VENDOR_BIT 16 +#define VFM_RSVD_BIT 24 + +#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT) +#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT) +#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT) + +#define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT) +#define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT) +#define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT) + +#define VFM_MAKE(_vendor, _family, _model) ( \ + ((_model) << VFM_MODEL_BIT) | \ + ((_family) << VFM_FAMILY_BIT) | \ + ((_vendor) << VFM_VENDOR_BIT) \ +) +/* End of copied code */ + #include "../../arch/x86/include/asm/intel-family.h" =20 #define PECI_PCS_PKG_ID 0 /* Package Identifier Read */ diff --git a/include/linux/peci.h b/include/linux/peci.h index 90e241458ef6..3e0bc37591d6 100644 --- a/include/linux/peci.h +++ b/include/linux/peci.h @@ -59,8 +59,7 @@ static inline struct peci_controller *to_peci_controller(= void *d) * struct peci_device - PECI device * @dev: device object to register PECI device to the device model * @info: PECI device characteristics - * @info.family: device family - * @info.model: device model + * @info.x86_vfm: device vendor-family-model * @info.peci_revision: PECI revision supported by the PECI device * @info.socket_id: the socket ID represented by the PECI device * @addr: address used on the PECI bus connected to the parent controller @@ -73,8 +72,7 @@ static inline struct peci_controller *to_peci_controller(= void *d) struct peci_device { struct device dev; struct { - u16 family; - u8 model; + u32 x86_vfm; u8 peci_revision; u8 socket_id; } info; diff --git a/drivers/peci/internal.h b/drivers/peci/internal.h index 9d75ea54504c..b9d45483cabe 100644 --- a/drivers/peci/internal.h +++ b/drivers/peci/internal.h @@ -66,13 +66,11 @@ struct peci_request *peci_xfer_ep_mmio64_readl(struct p= eci_device *device, u8 ba /** * struct peci_device_id - PECI device data to match * @data: pointer to driver private data specific to device - * @family: device family - * @model: device model + * @x86_vfm: device vendor-family-model */ struct peci_device_id { const void *data; - u16 family; - u8 model; + u32 x86_vfm; }; =20 extern struct device_type peci_device_type; diff --git a/drivers/hwmon/peci/cputemp.c b/drivers/hwmon/peci/cputemp.c index a812c15948d9..5a682195b98f 100644 --- a/drivers/hwmon/peci/cputemp.c +++ b/drivers/hwmon/peci/cputemp.c @@ -360,10 +360,10 @@ static int init_core_mask(struct peci_cputemp *priv) int ret; =20 /* Get the RESOLVED_CORES register value */ - switch (peci_dev->info.model) { - case INTEL_FAM6_ICELAKE_X: - case INTEL_FAM6_ICELAKE_D: - case INTEL_FAM6_SAPPHIRERAPIDS_X: + switch (peci_dev->info.x86_vfm) { + case INTEL_ICELAKE_X: + case INTEL_ICELAKE_D: + case INTEL_SAPPHIRERAPIDS_X: ret =3D peci_ep_pci_local_read(peci_dev, 0, reg->bus, reg->dev, reg->func, reg->offset + 4, &data); if (ret) diff --git a/drivers/peci/core.c b/drivers/peci/core.c index 0f83a9c6093b..b2d7adf05ba0 100644 --- a/drivers/peci/core.c +++ b/drivers/peci/core.c @@ -163,9 +163,8 @@ EXPORT_SYMBOL_NS_GPL(devm_peci_controller_add, PECI); static const struct peci_device_id * peci_bus_match_device_id(const struct peci_device_id *id, struct peci_devi= ce *device) { - while (id->family !=3D 0) { - if (id->family =3D=3D device->info.family && - id->model =3D=3D device->info.model) + while (id->x86_vfm !=3D 0) { + if (id->x86_vfm =3D=3D device->info.x86_vfm) return id; id++; } diff --git a/drivers/peci/cpu.c b/drivers/peci/cpu.c index bd990acd92b8..152bbd8e717a 100644 --- a/drivers/peci/cpu.c +++ b/drivers/peci/cpu.c @@ -294,38 +294,31 @@ peci_cpu_probe(struct peci_device *device, const stru= ct peci_device_id *id) =20 static const struct peci_device_id peci_cpu_device_ids[] =3D { { /* Haswell Xeon */ - .family =3D 6, - .model =3D INTEL_FAM6_HASWELL_X, + .x86_vfm =3D INTEL_HASWELL_X, .data =3D "hsx", }, { /* Broadwell Xeon */ - .family =3D 6, - .model =3D INTEL_FAM6_BROADWELL_X, + .x86_vfm =3D INTEL_BROADWELL_X, .data =3D "bdx", }, { /* Broadwell Xeon D */ - .family =3D 6, - .model =3D INTEL_FAM6_BROADWELL_D, + .x86_vfm =3D INTEL_BROADWELL_D, .data =3D "bdxd", }, { /* Skylake Xeon */ - .family =3D 6, - .model =3D INTEL_FAM6_SKYLAKE_X, + .x86_vfm =3D INTEL_SKYLAKE_X, .data =3D "skx", }, { /* Icelake Xeon */ - .family =3D 6, - .model =3D INTEL_FAM6_ICELAKE_X, + .x86_vfm =3D INTEL_ICELAKE_X, .data =3D "icx", }, { /* Icelake Xeon D */ - .family =3D 6, - .model =3D INTEL_FAM6_ICELAKE_D, + .x86_vfm =3D INTEL_ICELAKE_D, .data =3D "icxd", }, { /* Sapphire Rapids Xeon */ - .family =3D 6, - .model =3D INTEL_FAM6_SAPPHIRERAPIDS_X, + .x86_vfm =3D INTEL_SAPPHIRERAPIDS_X, .data =3D "spr", }, { } diff --git a/drivers/peci/device.c b/drivers/peci/device.c index e6b0bffb14f4..5eb57b503c81 100644 --- a/drivers/peci/device.c +++ b/drivers/peci/device.c @@ -100,8 +100,7 @@ static int peci_device_info_init(struct peci_device *de= vice) if (ret) return ret; =20 - device->info.family =3D peci_x86_cpu_family(cpu_id); - device->info.model =3D peci_x86_cpu_model(cpu_id); + device->info.x86_vfm =3D IFM(peci_x86_cpu_family(cpu_id), peci_x86_cpu_mo= del(cpu_id)); =20 ret =3D peci_get_revision(device, &revision); if (ret) --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0902813C801 for ; Mon, 20 May 2024 22:46:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245221; cv=none; b=Ppr0DPywYv3jG2xyV6TZ+0IZad77wdIbQjN0sWuRZfWAh5ekfuls71QHKmt0bkBxE19gD9/4+CMUnLWeY4kTngFiU8tbQDsCv7Nu9c7NWLgOt5aJvPiUHdmw/P677B23YFtxxKuR3+G2VP+YMrSMLILo0lAlh2oZRJYqPEItZuM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245221; c=relaxed/simple; bh=ZlPHTm39lOOUOHNKeeb7Ctia3jKnfxDT65NpqhR4lvo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sXuDKUv7dZfd8n+PAzggeGU6Clxx0CBP25Hz5053ID2GG/RuvB/ZL8sUKmNFlmfYj8Wyh3zXCOTUJ73Ld9IBSaL52O7nBhqKLGBj6L3KBBu9yK2OAv0NVU4te72aJj5YBJYLoMnXaeDnn+ww3ksuOmGfMwCFg+sWPKYgiE0Trv8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=AUzDB/Gk; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="AUzDB/Gk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245220; x=1747781220; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZlPHTm39lOOUOHNKeeb7Ctia3jKnfxDT65NpqhR4lvo=; b=AUzDB/Gkxde+PC1JMrRJdfCKvM8t7oOpDLbNIfUpGB0WkUeIgcMM0IbO 3T5p2q5BCRsC17//p0l/LfFZOTmg/bVwgvY1Bn55R8orE1998aRFtPcG0 mNrXk/rvrMZiw5Zu3ZSaiAvPikqRY1WMpCnZMCAMYHNtupoilwW59Ucv8 QBp52dgO1vuWU5jesXoGDoTCeiv1ivHLIivppUVTPJChJDXqN2k1uYEF6 t+rQoN+qic3oZvZT+xT42dx7gtlecAtiweY/iUPM5pjRZEe9aUsQtkcec AzrPW2y3Qg6ELU8q2u+f/baw0ynSQmdorgJJTYBkGb8itflNerRTyV/kM g==; X-CSE-ConnectionGUID: HUSGbnt9SGyItQT22HBOsQ== X-CSE-MsgGUID: 2ArpsIP4SdyrRJnKMRjqZQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12200044" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12200044" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:41 -0700 X-CSE-ConnectionGUID: JniqsW9TRHmQrveKHwMIcA== X-CSE-MsgGUID: 6xQLbY0ETrqwBxgyWud0HQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593531" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:41 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 48/49] x86/cpu/vfm: Delete X86_MATCH_INTEL_FAM6_MODEL[_STEPPING]() macros Date: Mon, 20 May 2024 15:46:19 -0700 Message-ID: <20240520224620.9480-49-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" These macros have been replaced by X86_MATCH_VFM[_STEPPING]() Signed-off-by: Tony Luck --- arch/x86/include/asm/cpu_device_id.h | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cp= u_device_id.h index df07d3776db8..4be902a1d74c 100644 --- a/arch/x86/include/asm/cpu_device_id.h +++ b/arch/x86/include/asm/cpu_device_id.h @@ -189,26 +189,6 @@ #define X86_MATCH_VENDOR_FAM(vendor, family, data) \ X86_MATCH_VENDOR_FAM_MODEL(vendor, family, X86_MODEL_ANY, data) =20 -/** - * X86_MATCH_INTEL_FAM6_MODEL - Match vendor INTEL, family 6 and model - * @model: The model name without the INTEL_FAM6_ prefix or ANY - * The model name is expanded to INTEL_FAM6_@model internally - * @data: Driver specific data or NULL. The internal storage - * format is unsigned long. The supplied value, pointer - * etc. is casted to unsigned long internally. - * - * The vendor is set to INTEL, the family to 6 and all other missing - * arguments of X86_MATCH_VENDOR_FAM_MODEL_FEATURE() are set to wildcards. - * - * See X86_MATCH_VENDOR_FAM_MODEL_FEATURE() for further information. - */ -#define X86_MATCH_INTEL_FAM6_MODEL(model, data) \ - X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, INTEL_FAM6_##model, data) - -#define X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(model, steppings, data) \ - X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6, INTEL_FAM6_##model= , \ - steppings, X86_FEATURE_ANY, data) - /** * X86_MATCH_VFM - Match encoded vendor/family/model * @vfm: Encoded 8-bits each for vendor, family, model --=20 2.45.0 From nobody Thu Dec 18 14:46:26 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6364013D8B0 for ; Mon, 20 May 2024 22:47:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245222; cv=none; b=h5/ktjCSAg3QPrpQwX1scmWPsmKOL4OUnfjWo0RuM5+t2mZzwRT1kO0Zon9kNm8OcnsbRj5u6wRstZLAndFfQpUy+0ZMbKYgfqHmO6PLu6izlxRt1SFkCnFW9Uti9WYrV1eRCylixN+I4i0FoYIVpWzedIKkUclqJvm9VsaOfJY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716245222; c=relaxed/simple; bh=fARPp99QJtDjYFh93jB5P8ipyPFnC7ncFvMG22Occsg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RTLcVr9PkviQ01wA5dNqwXu000wcKarRA2cTrTQWFRjet7WE5e692BZtfzsmO+EMbSAUX/D9InjA99m1ezQmmciiN0AurkXpaKchl1zZWcB9vuP8n1m2KPDiVeUkfsZt9ghddahvimCanpNAk+LVGARhMW2pL2bV0nNvVnnEyTs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SmwGllr9; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SmwGllr9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716245220; x=1747781220; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fARPp99QJtDjYFh93jB5P8ipyPFnC7ncFvMG22Occsg=; b=SmwGllr9MFeNQ9kH4OlSXQb9wLyWRmyvffJR88H1n3NiXKgx8vyoGfQ1 Ui5ZlbBCuesk3b8eNms5b/A6o+jkiEwEiL8wQcNp6sCQyYhQZnAMW0MFJ Z2asBFjO6ryTWiaS7nZh/Lo3Qr+a5Kiw+Ml409abp7MOT72I6PkqyxPQw ZLF++xZbmcNn6LGmRnj2Oax8F9fuNQ+UdMz7swq9SJjSz47kQgmPCJUEh xqZIUX55sMgtNDTH2XU8eJMZmXsKtqSvv3aSP7QgbCauGP4qPPH1o6GWA k/USefcvcJaNQnSyZYRXEPJSbEcj9gL+xulue5/s+CBxxbTZ+q1fJZvJ1 g==; X-CSE-ConnectionGUID: 9HGY4O0LQhGIiIw58MrK8A== X-CSE-MsgGUID: +Py+qY26Q76/UpE/gUT0mQ== X-IronPort-AV: E=McAfee;i="6600,9927,11078"; a="12200054" X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="12200054" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:41 -0700 X-CSE-ConnectionGUID: I2278ouOR4eVNbzYBLzw/A== X-CSE-MsgGUID: ImHXOQT9QWqVP9mBIGmKqg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,176,1712646000"; d="scan'208";a="32593534" Received: from agluck-desk3.sc.intel.com ([172.25.222.70]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 15:46:41 -0700 From: Tony Luck To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Uros Bizjak , Rick Edgecombe , Arnd Bergmann , Tony Luck , Mateusz Guzik , Thomas Renninger , Andi Kleen , linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [PATCH v6 49/49] x86/cpu/vfm: Delete all the *_FAM6_ CPU #defines Date: Mon, 20 May 2024 15:46:20 -0700 Message-ID: <20240520224620.9480-50-tony.luck@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240520224620.9480-1-tony.luck@intel.com> References: <20240520224620.9480-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" All code has been converted to use the vendor/family/model versions. Signed-off-by: Tony Luck --- arch/x86/include/asm/intel-family.h | 85 +---------------------------- 1 file changed, 2 insertions(+), 83 deletions(-) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/int= el-family.h index f81a851c46dc..f7289094a483 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -10,7 +10,7 @@ * that group keep the CPUID for the variants sorted by model number. * * The defined symbol names have the following form: - * INTEL_FAM6{OPTFAMILY}_{MICROARCH}{OPTDIFF} + * INTEL_{OPTFAMILY}_{MICROARCH}{OPTDIFF} * where: * OPTFAMILY Describes the family of CPUs that this belongs to. Default * is assumed to be "_CORE" (and should be omitted). Other values @@ -42,215 +42,134 @@ =20 #define IFM(_fam, _model) VFM_MAKE(X86_VENDOR_INTEL, _fam, _model) =20 -/* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */ -#define INTEL_FAM6_ANY X86_MODEL_ANY -/* Wildcard match for FAM6 so X86_MATCH_VFM(ANY) works */ +/* Wildcard match so X86_MATCH_VFM(ANY) works */ #define INTEL_ANY IFM(X86_FAMILY_ANY, X86_MODEL_ANY) =20 -#define INTEL_FAM6_CORE_YONAH 0x0E #define INTEL_CORE_YONAH IFM(6, 0x0E) =20 -#define INTEL_FAM6_CORE2_MEROM 0x0F #define INTEL_CORE2_MEROM IFM(6, 0x0F) -#define INTEL_FAM6_CORE2_MEROM_L 0x16 #define INTEL_CORE2_MEROM_L IFM(6, 0x16) -#define INTEL_FAM6_CORE2_PENRYN 0x17 #define INTEL_CORE2_PENRYN IFM(6, 0x17) -#define INTEL_FAM6_CORE2_DUNNINGTON 0x1D #define INTEL_CORE2_DUNNINGTON IFM(6, 0x1D) =20 -#define INTEL_FAM6_NEHALEM 0x1E #define INTEL_NEHALEM IFM(6, 0x1E) -#define INTEL_FAM6_NEHALEM_G 0x1F /* Auburndale / Havendale */ #define INTEL_NEHALEM_G IFM(6, 0x1F) /* Auburndale / Havendale */ -#define INTEL_FAM6_NEHALEM_EP 0x1A #define INTEL_NEHALEM_EP IFM(6, 0x1A) -#define INTEL_FAM6_NEHALEM_EX 0x2E #define INTEL_NEHALEM_EX IFM(6, 0x2E) =20 -#define INTEL_FAM6_WESTMERE 0x25 #define INTEL_WESTMERE IFM(6, 0x25) -#define INTEL_FAM6_WESTMERE_EP 0x2C #define INTEL_WESTMERE_EP IFM(6, 0x2C) -#define INTEL_FAM6_WESTMERE_EX 0x2F #define INTEL_WESTMERE_EX IFM(6, 0x2F) =20 -#define INTEL_FAM6_SANDYBRIDGE 0x2A #define INTEL_SANDYBRIDGE IFM(6, 0x2A) -#define INTEL_FAM6_SANDYBRIDGE_X 0x2D #define INTEL_SANDYBRIDGE_X IFM(6, 0x2D) -#define INTEL_FAM6_IVYBRIDGE 0x3A #define INTEL_IVYBRIDGE IFM(6, 0x3A) -#define INTEL_FAM6_IVYBRIDGE_X 0x3E #define INTEL_IVYBRIDGE_X IFM(6, 0x3E) =20 -#define INTEL_FAM6_HASWELL 0x3C #define INTEL_HASWELL IFM(6, 0x3C) -#define INTEL_FAM6_HASWELL_X 0x3F #define INTEL_HASWELL_X IFM(6, 0x3F) -#define INTEL_FAM6_HASWELL_L 0x45 #define INTEL_HASWELL_L IFM(6, 0x45) -#define INTEL_FAM6_HASWELL_G 0x46 #define INTEL_HASWELL_G IFM(6, 0x46) =20 -#define INTEL_FAM6_BROADWELL 0x3D #define INTEL_BROADWELL IFM(6, 0x3D) -#define INTEL_FAM6_BROADWELL_G 0x47 #define INTEL_BROADWELL_G IFM(6, 0x47) -#define INTEL_FAM6_BROADWELL_X 0x4F #define INTEL_BROADWELL_X IFM(6, 0x4F) -#define INTEL_FAM6_BROADWELL_D 0x56 #define INTEL_BROADWELL_D IFM(6, 0x56) =20 -#define INTEL_FAM6_SKYLAKE_L 0x4E /* Sky Lake */ #define INTEL_SKYLAKE_L IFM(6, 0x4E) /* Sky Lake */ -#define INTEL_FAM6_SKYLAKE 0x5E /* Sky Lake */ #define INTEL_SKYLAKE IFM(6, 0x5E) /* Sky Lake */ -#define INTEL_FAM6_SKYLAKE_X 0x55 /* Sky Lake */ #define INTEL_SKYLAKE_X IFM(6, 0x55) /* Sky Lake */ /* CASCADELAKE_X 0x55 Sky Lake -- s: 7 */ /* COOPERLAKE_X 0x55 Sky Lake -- s: 11 */ =20 -#define INTEL_FAM6_KABYLAKE_L 0x8E /* Sky Lake */ #define INTEL_KABYLAKE_L IFM(6, 0x8E) /* Sky Lake */ /* AMBERLAKE_L 0x8E Sky Lake -- s: 9 */ /* COFFEELAKE_L 0x8E Sky Lake -- s: 10 */ /* WHISKEYLAKE_L 0x8E Sky Lake -- s: 11,12 */ =20 -#define INTEL_FAM6_KABYLAKE 0x9E /* Sky Lake */ #define INTEL_KABYLAKE IFM(6, 0x9E) /* Sky Lake */ /* COFFEELAKE 0x9E Sky Lake -- s: 10-13 */ =20 -#define INTEL_FAM6_COMETLAKE 0xA5 /* Sky Lake */ #define INTEL_COMETLAKE IFM(6, 0xA5) /* Sky Lake */ -#define INTEL_FAM6_COMETLAKE_L 0xA6 /* Sky Lake */ #define INTEL_COMETLAKE_L IFM(6, 0xA6) /* Sky Lake */ =20 -#define INTEL_FAM6_CANNONLAKE_L 0x66 /* Palm Cove */ #define INTEL_CANNONLAKE_L IFM(6, 0x66) /* Palm Cove */ =20 -#define INTEL_FAM6_ICELAKE_X 0x6A /* Sunny Cove */ #define INTEL_ICELAKE_X IFM(6, 0x6A) /* Sunny Cove */ -#define INTEL_FAM6_ICELAKE_D 0x6C /* Sunny Cove */ #define INTEL_ICELAKE_D IFM(6, 0x6C) /* Sunny Cove */ -#define INTEL_FAM6_ICELAKE 0x7D /* Sunny Cove */ #define INTEL_ICELAKE IFM(6, 0x7D) /* Sunny Cove */ -#define INTEL_FAM6_ICELAKE_L 0x7E /* Sunny Cove */ #define INTEL_ICELAKE_L IFM(6, 0x7E) /* Sunny Cove */ -#define INTEL_FAM6_ICELAKE_NNPI 0x9D /* Sunny Cove */ #define INTEL_ICELAKE_NNPI IFM(6, 0x9D) /* Sunny Cove */ =20 -#define INTEL_FAM6_ROCKETLAKE 0xA7 /* Cypress Cove */ #define INTEL_ROCKETLAKE IFM(6, 0xA7) /* Cypress Cove */ =20 -#define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */ #define INTEL_TIGERLAKE_L IFM(6, 0x8C) /* Willow Cove */ -#define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */ #define INTEL_TIGERLAKE IFM(6, 0x8D) /* Willow Cove */ =20 -#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */ #define INTEL_SAPPHIRERAPIDS_X IFM(6, 0x8F) /* Golden Cove */ =20 -#define INTEL_FAM6_EMERALDRAPIDS_X 0xCF #define INTEL_EMERALDRAPIDS_X IFM(6, 0xCF) =20 -#define INTEL_FAM6_GRANITERAPIDS_X 0xAD #define INTEL_GRANITERAPIDS_X IFM(6, 0xAD) -#define INTEL_FAM6_GRANITERAPIDS_D 0xAE #define INTEL_GRANITERAPIDS_D IFM(6, 0xAE) =20 /* "Hybrid" Processors (P-Core/E-Core) */ =20 -#define INTEL_FAM6_LAKEFIELD 0x8A /* Sunny Cove / Tremont */ #define INTEL_LAKEFIELD IFM(6, 0x8A) /* Sunny Cove / Tremont */ =20 -#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */ #define INTEL_ALDERLAKE IFM(6, 0x97) /* Golden Cove / Gracemont */ -#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */ #define INTEL_ALDERLAKE_L IFM(6, 0x9A) /* Golden Cove / Gracemont */ =20 -#define INTEL_FAM6_RAPTORLAKE 0xB7 /* Raptor Cove / Enhanced Gracemont */ #define INTEL_RAPTORLAKE IFM(6, 0xB7) /* Raptor Cove / Enhanced Gracemont= */ -#define INTEL_FAM6_RAPTORLAKE_P 0xBA #define INTEL_RAPTORLAKE_P IFM(6, 0xBA) -#define INTEL_FAM6_RAPTORLAKE_S 0xBF #define INTEL_RAPTORLAKE_S IFM(6, 0xBF) =20 -#define INTEL_FAM6_METEORLAKE 0xAC #define INTEL_METEORLAKE IFM(6, 0xAC) -#define INTEL_FAM6_METEORLAKE_L 0xAA #define INTEL_METEORLAKE_L IFM(6, 0xAA) =20 -#define INTEL_FAM6_ARROWLAKE_H 0xC5 #define INTEL_ARROWLAKE_H IFM(6, 0xC5) -#define INTEL_FAM6_ARROWLAKE 0xC6 #define INTEL_ARROWLAKE IFM(6, 0xC6) -#define INTEL_FAM6_ARROWLAKE_U 0xB5 #define INTEL_ARROWLAKE_U IFM(6, 0xB5) =20 -#define INTEL_FAM6_LUNARLAKE_M 0xBD #define INTEL_LUNARLAKE_M IFM(6, 0xBD) =20 /* "Small Core" Processors (Atom/E-Core) */ =20 -#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ #define INTEL_ATOM_BONNELL IFM(6, 0x1C) /* Diamondville, Pineview */ -#define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */ #define INTEL_ATOM_BONNELL_MID IFM(6, 0x26) /* Silverthorne, Lincroft */ =20 -#define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */ #define INTEL_ATOM_SALTWELL IFM(6, 0x36) /* Cedarview */ -#define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */ #define INTEL_ATOM_SALTWELL_MID IFM(6, 0x27) /* Penwell */ -#define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */ #define INTEL_ATOM_SALTWELL_TABLET IFM(6, 0x35) /* Cloverview */ =20 -#define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */ #define INTEL_ATOM_SILVERMONT IFM(6, 0x37) /* Bay Trail, Valleyview */ -#define INTEL_FAM6_ATOM_SILVERMONT_D 0x4D /* Avaton, Rangely */ #define INTEL_ATOM_SILVERMONT_D IFM(6, 0x4D) /* Avaton, Rangely */ -#define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */ #define INTEL_ATOM_SILVERMONT_MID IFM(6, 0x4A) /* Merriefield */ =20 -#define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */ #define INTEL_ATOM_AIRMONT IFM(6, 0x4C) /* Cherry Trail, Braswell */ -#define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */ #define INTEL_ATOM_AIRMONT_MID IFM(6, 0x5A) /* Moorefield */ -#define INTEL_FAM6_ATOM_AIRMONT_NP 0x75 /* Lightning Mountain */ #define INTEL_ATOM_AIRMONT_NP IFM(6, 0x75) /* Lightning Mountain */ =20 -#define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */ #define INTEL_ATOM_GOLDMONT IFM(6, 0x5C) /* Apollo Lake */ -#define INTEL_FAM6_ATOM_GOLDMONT_D 0x5F /* Denverton */ #define INTEL_ATOM_GOLDMONT_D IFM(6, 0x5F) /* Denverton */ =20 /* Note: the micro-architecture is "Goldmont Plus" */ -#define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ #define INTEL_ATOM_GOLDMONT_PLUS IFM(6, 0x7A) /* Gemini Lake */ =20 -#define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */ #define INTEL_ATOM_TREMONT_D IFM(6, 0x86) /* Jacobsville */ -#define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */ #define INTEL_ATOM_TREMONT IFM(6, 0x96) /* Elkhart Lake */ -#define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */ #define INTEL_ATOM_TREMONT_L IFM(6, 0x9C) /* Jasper Lake */ =20 -#define INTEL_FAM6_ATOM_GRACEMONT 0xBE /* Alderlake N */ #define INTEL_ATOM_GRACEMONT IFM(6, 0xBE) /* Alderlake N */ =20 -#define INTEL_FAM6_ATOM_CRESTMONT_X 0xAF /* Sierra Forest */ #define INTEL_ATOM_CRESTMONT_X IFM(6, 0xAF) /* Sierra Forest */ -#define INTEL_FAM6_ATOM_CRESTMONT 0xB6 /* Grand Ridge */ #define INTEL_ATOM_CRESTMONT IFM(6, 0xB6) /* Grand Ridge */ =20 -#define INTEL_FAM6_ATOM_DARKMONT_X 0xDD /* Clearwater Forest */ #define INTEL_ATOM_DARKMONT_X IFM(6, 0xDD) /* Clearwater Forest */ =20 /* Xeon Phi */ =20 -#define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */ #define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */ -#define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */ #define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */ =20 /* Family 5 */ --=20 2.45.0