From nobody Wed Feb 11 05:40:51 2026 Received: from out-174.mta0.migadu.com (out-174.mta0.migadu.com [91.218.175.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7696A136E04 for ; Mon, 20 May 2024 14:54:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716216861; cv=none; b=mr+Vurg817DHg2+BIJTBtSfc5LNX2BMm3djagTLo6+Rdi5YG/G4nADia4Tbsn+1X6V3y/tGKkr4KT4Qyc2bsHF+LMd+021BZyKwi9mfUD1RBF1VNPZaqbAy9MG1tjuZcMj6HKPKT1LcNuryFcmhxBOkuPPEvCzMWYcLv+oq4bbs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716216861; c=relaxed/simple; bh=sHuVMqOOOz9XO4IshcQZEwhXzzhogGCT5T+bmtChve0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=XCo2oNLyoQ5Ck58bL2Ez03a4lLDOz3AYa12gavWVdscSmYOKCGHCf9gCqk1AigSjFAU74b1lEXt8vLzGX16XwDF58d0TQ3kYveanlqy1rdw3EqhexaTP0MaCYXxb+Wwnffko8kcAOIzJLYRT5+5FVHdE6YvVNAPcU/GZvvUUhy0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=d09pMeOY; arc=none smtp.client-ip=91.218.175.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="d09pMeOY" X-Envelope-To: lpieralisi@kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1716216854; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0TZ3BGmEu8mVwpdyswgFBs/ct4xyk7TF2NGi7rztXsU=; b=d09pMeOYiWVnrY3txO33VLyO8lPiZDqCbW6nnx1MgKYzNfA7HqMxY6eRxGmcAVt+xvUuLr HJaMZwbY43vTCCVFZNqFMo0SGjrWVZyBsNQKtRnylcNqWD/4VhGRLaMgLvshkFuswYgckK JKBUlXWHl5h6LN9mcvgc7bixP3ltZMI= X-Envelope-To: kw@linux.com X-Envelope-To: robh@kernel.org X-Envelope-To: linux-pci@vger.kernel.org X-Envelope-To: michal.simek@amd.com X-Envelope-To: thippeswamy.havalige@amd.com X-Envelope-To: linux-arm-kernel@lists.infradead.org X-Envelope-To: bhelgaas@google.com X-Envelope-To: linux-kernel@vger.kernel.org X-Envelope-To: sean.anderson@linux.dev X-Envelope-To: conor+dt@kernel.org X-Envelope-To: krzysztof.kozlowski+dt@linaro.org X-Envelope-To: devicetree@vger.kernel.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Sean Anderson To: Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , linux-kernel@vger.kernel.org, Sean Anderson , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org Subject: [PATCH v3 1/7] dt-bindings: pci: xilinx-nwl: Add phys Date: Mon, 20 May 2024 10:53:56 -0400 Message-Id: <20240520145402.2526481-2-sean.anderson@linux.dev> In-Reply-To: <20240520145402.2526481-1-sean.anderson@linux.dev> References: <20240520145402.2526481-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add phys properties so Linux can power-on/configure the GTR transcievers. Signed-off-by: Sean Anderson Reviewed-by: Rob Herring (Arm) --- Changes in v3: - Document phys property Changes in v2: - Remove phy-names - Add an example Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Doc= umentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml index 426f90a47f35..cc50795d170b 100644 --- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml @@ -61,6 +61,11 @@ properties: interrupt-map: maxItems: 4 =20 + phys: + minItems: 1 + maxItems: 4 + description: One phy per logical lane, in order + power-domains: maxItems: 1 =20 @@ -110,6 +115,7 @@ examples: - | #include #include + #include #include soc { #address-cells =3D <2>; @@ -138,6 +144,7 @@ examples: <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; msi-parent =3D <&nwl_pcie>; + phys =3D <&psgtr 0 PHY_TYPE_PCIE 0 0>; power-domains =3D <&zynqmp_firmware PD_PCIE>; iommus =3D <&smmu 0x4d0>; pcie_intc: legacy-interrupt-controller { --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Feb 11 05:40:51 2026 Received: from out-172.mta0.migadu.com (out-172.mta0.migadu.com [91.218.175.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 361AE1369BB; Mon, 20 May 2024 14:54:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716216860; cv=none; b=AGXPsa6M+g7YkixpI6qGo5TNUy/OTNdBd7OkhpC2o7vYNhaYR2lcFCAQdIEEFr2hAV8M7O53CR/z2Ft2ss/Fya2ytODweWXMWiqTlG1B+CtyyNC6x1puM/AxQf7EMB/9oOuUZwa9vFtR4yKnFVlVyLt/NojqLNKr3GWkEex7zGY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716216860; c=relaxed/simple; bh=jpJD3Ut/eKZ4vL397+AxVQqI1CgT5ITqcuH0Fk7f2Os=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=V+bW8z6Z14HwII4YR098EyERJiwx89MjZd0ELdC01mbyYgH1XnIny+xXPj7zy0dupdE6ZyRnEciYnPK1jrBcub7WdhY6S9sO7u+wpomszhsMhbhvLGj8Mk7+cfMfRltfJ5OAsOegvnC7hP7rPuFjPY/7zWpRI2w8SfPsd0EA6d8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=OO5YMqBI; arc=none smtp.client-ip=91.218.175.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="OO5YMqBI" X-Envelope-To: lpieralisi@kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1716216856; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/t1FSYP+bGcYTDKpcE/G5Hl/ZwYo8lrjuzlYxLI6Fm8=; b=OO5YMqBIX0rj+TStl103p1v/ghce9G/17JW08A4sY1ddfg2Asm3i155oq3JolauPJrUV5D 2HtoIA7KTiqXlf2oHn+GJuHBoPYAiBQ86I+Uksmybn0+gka2h3zeSIP0sZIHF9suGgI6xo L6fOZ37Bj/PiNZ8ixyC8vEx4RHsMpyY= X-Envelope-To: kw@linux.com X-Envelope-To: robh@kernel.org X-Envelope-To: linux-pci@vger.kernel.org X-Envelope-To: michal.simek@amd.com X-Envelope-To: thippeswamy.havalige@amd.com X-Envelope-To: linux-arm-kernel@lists.infradead.org X-Envelope-To: bhelgaas@google.com X-Envelope-To: linux-kernel@vger.kernel.org X-Envelope-To: sean.anderson@linux.dev X-Envelope-To: stable@vger.kernel.org X-Envelope-To: bharatku@xilinx.com X-Envelope-To: helgaas@kernel.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Sean Anderson To: Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , linux-kernel@vger.kernel.org, Sean Anderson , stable@vger.kernel.org, Bharat Kumar Gogada , Bjorn Helgaas Subject: [PATCH v3 2/7] PCI: xilinx-nwl: Fix off-by-one in IRQ handler Date: Mon, 20 May 2024 10:53:57 -0400 Message-Id: <20240520145402.2526481-3-sean.anderson@linux.dev> In-Reply-To: <20240520145402.2526481-1-sean.anderson@linux.dev> References: <20240520145402.2526481-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" MSGF_LEG_MASK is laid out with INTA in bit 0, INTB in bit 1, INTC in bit 2, and INTD in bit 3. Hardware IRQ numbers start at 0, and we register PCI_NUM_INTX irqs. So to enable INTA (aka hwirq 0) we should set bit 0. Remove the subtraction of one. This fixes the following UBSAN error: [ 5.037483] =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D [ 5.046260] UBSAN: shift-out-of-bounds in ../drivers/pci/controller/pcie= -xilinx-nwl.c:389:11 [ 5.054983] shift exponent 18446744073709551615 is too large for 32-bit = type 'int' [ 5.062813] CPU: 1 PID: 61 Comm: kworker/u10:1 Not tainted 6.6.20+ #268 [ 5.070008] Hardware name: xlnx,zynqmp (DT) [ 5.074348] Workqueue: events_unbound deferred_probe_work_func [ 5.080410] Call trace: [ 5.082958] dump_backtrace (arch/arm64/kernel/stacktrace.c:235) [ 5.086850] show_stack (arch/arm64/kernel/stacktrace.c:242) [ 5.090292] dump_stack_lvl (lib/dump_stack.c:107) [ 5.094095] dump_stack (lib/dump_stack.c:114) [ 5.097540] __ubsan_handle_shift_out_of_bounds (lib/ubsan.c:218 lib/ubsa= n.c:387) [ 5.103227] nwl_unmask_leg_irq (drivers/pci/controller/pcie-xilinx-nwl.c= :389 (discriminator 1)) [ 5.107386] irq_enable (kernel/irq/internals.h:234 kernel/irq/chip.c:170= kernel/irq/chip.c:439 kernel/irq/chip.c:432 kernel/irq/chip.c:345) [ 5.110838] __irq_startup (kernel/irq/internals.h:239 kernel/irq/chip.c:= 180 kernel/irq/chip.c:250) [ 5.114552] irq_startup (kernel/irq/chip.c:270) [ 5.118266] __setup_irq (kernel/irq/manage.c:1800) [ 5.121982] request_threaded_irq (kernel/irq/manage.c:2206) [ 5.126412] pcie_pme_probe (include/linux/interrupt.h:168 drivers/pci/pc= ie/pme.c:348) [ 5.130303] pcie_port_probe_service (drivers/pci/pcie/portdrv.c:528) [ 5.134915] really_probe (drivers/base/dd.c:579 drivers/base/dd.c:658) [ 5.138720] __driver_probe_device (drivers/base/dd.c:800) [ 5.143236] driver_probe_device (drivers/base/dd.c:830) [ 5.147571] __device_attach_driver (drivers/base/dd.c:959) [ 5.152179] bus_for_each_drv (drivers/base/bus.c:457) [ 5.156163] __device_attach (drivers/base/dd.c:1032) [ 5.160147] device_initial_probe (drivers/base/dd.c:1080) [ 5.164488] bus_probe_device (drivers/base/bus.c:532) [ 5.168471] device_add (drivers/base/core.c:3638) [ 5.172098] device_register (drivers/base/core.c:3714) [ 5.175994] pcie_portdrv_probe (drivers/pci/pcie/portdrv.c:309 drivers/p= ci/pcie/portdrv.c:363 drivers/pci/pcie/portdrv.c:695) [ 5.180338] pci_device_probe (drivers/pci/pci-driver.c:324 drivers/pci/p= ci-driver.c:392 drivers/pci/pci-driver.c:417 drivers/pci/pci-driver.c:460) [ 5.184410] really_probe (drivers/base/dd.c:579 drivers/base/dd.c:658) [ 5.188213] __driver_probe_device (drivers/base/dd.c:800) [ 5.192729] driver_probe_device (drivers/base/dd.c:830) [ 5.197064] __device_attach_driver (drivers/base/dd.c:959) [ 5.201672] bus_for_each_drv (drivers/base/bus.c:457) [ 5.205657] __device_attach (drivers/base/dd.c:1032) [ 5.209641] device_attach (drivers/base/dd.c:1074) [ 5.213357] pci_bus_add_device (drivers/pci/bus.c:352) [ 5.217518] pci_bus_add_devices (drivers/pci/bus.c:371 (discriminator 2)) [ 5.221774] pci_host_probe (drivers/pci/probe.c:3099) [ 5.225581] nwl_pcie_probe (drivers/pci/controller/pcie-xilinx-nwl.c:938) [ 5.229562] platform_probe (drivers/base/platform.c:1404) [ 5.233367] really_probe (drivers/base/dd.c:579 drivers/base/dd.c:658) [ 5.237169] __driver_probe_device (drivers/base/dd.c:800) [ 5.241685] driver_probe_device (drivers/base/dd.c:830) [ 5.246020] __device_attach_driver (drivers/base/dd.c:959) [ 5.250628] bus_for_each_drv (drivers/base/bus.c:457) [ 5.254612] __device_attach (drivers/base/dd.c:1032) [ 5.258596] device_initial_probe (drivers/base/dd.c:1080) [ 5.262938] bus_probe_device (drivers/base/bus.c:532) [ 5.266920] deferred_probe_work_func (drivers/base/dd.c:124) [ 5.271619] process_one_work (arch/arm64/include/asm/jump_label.h:21 inc= lude/linux/jump_label.h:207 include/trace/events/workqueue.h:108 kernel/wor= kqueue.c:2632) [ 5.275788] worker_thread (kernel/workqueue.c:2694 (discriminator 2) ker= nel/workqueue.c:2781 (discriminator 2)) [ 5.279686] kthread (kernel/kthread.c:388) [ 5.283048] ret_from_fork (arch/arm64/kernel/entry.S:862) [ 5.286765] =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Fixes: 9a181e1093af ("PCI: xilinx-nwl: Modify IRQ chip for legacy interrupt= s") Cc: Signed-off-by: Sean Anderson --- Changes in v3: - Expand commit message drivers/pci/controller/pcie-xilinx-nwl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/control= ler/pcie-xilinx-nwl.c index 0408f4d612b5..437927e3bcca 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -371,7 +371,7 @@ static void nwl_mask_intx_irq(struct irq_data *data) u32 mask; u32 val; =20 - mask =3D 1 << (data->hwirq - 1); + mask =3D 1 << data->hwirq; raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags); val =3D nwl_bridge_readl(pcie, MSGF_LEG_MASK); nwl_bridge_writel(pcie, (val & (~mask)), MSGF_LEG_MASK); @@ -385,7 +385,7 @@ static void nwl_unmask_intx_irq(struct irq_data *data) u32 mask; u32 val; =20 - mask =3D 1 << (data->hwirq - 1); + mask =3D 1 << data->hwirq; raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags); val =3D nwl_bridge_readl(pcie, MSGF_LEG_MASK); nwl_bridge_writel(pcie, (val | mask), MSGF_LEG_MASK); --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Feb 11 05:40:51 2026 Received: from out-177.mta0.migadu.com (out-177.mta0.migadu.com [91.218.175.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55050136E26 for ; Mon, 20 May 2024 14:54:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.177 ARC-Seal: i=1; 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From: Sean Anderson To: Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , linux-kernel@vger.kernel.org, Sean Anderson Subject: [PATCH v3 3/7] PCI: xilinx-nwl: Fix register misspelling Date: Mon, 20 May 2024 10:53:58 -0400 Message-Id: <20240520145402.2526481-4-sean.anderson@linux.dev> In-Reply-To: <20240520145402.2526481-1-sean.anderson@linux.dev> References: <20240520145402.2526481-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" MSIC -> MISC Fixes: c2a7ff18edcd ("PCI: xilinx-nwl: Expand error logging") Signed-off-by: Sean Anderson --- (no changes since v1) drivers/pci/controller/pcie-xilinx-nwl.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/control= ler/pcie-xilinx-nwl.c index 437927e3bcca..ce881baac6d8 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -80,8 +80,8 @@ #define MSGF_MISC_SR_NON_FATAL_DEV BIT(22) #define MSGF_MISC_SR_FATAL_DEV BIT(23) #define MSGF_MISC_SR_LINK_DOWN BIT(24) -#define MSGF_MSIC_SR_LINK_AUTO_BWIDTH BIT(25) -#define MSGF_MSIC_SR_LINK_BWIDTH BIT(26) +#define MSGF_MISC_SR_LINK_AUTO_BWIDTH BIT(25) +#define MSGF_MISC_SR_LINK_BWIDTH BIT(26) =20 #define MSGF_MISC_SR_MASKALL (MSGF_MISC_SR_RXMSG_AVAIL | \ MSGF_MISC_SR_RXMSG_OVER | \ @@ -96,8 +96,8 @@ MSGF_MISC_SR_NON_FATAL_DEV | \ MSGF_MISC_SR_FATAL_DEV | \ MSGF_MISC_SR_LINK_DOWN | \ - MSGF_MSIC_SR_LINK_AUTO_BWIDTH | \ - MSGF_MSIC_SR_LINK_BWIDTH) + MSGF_MISC_SR_LINK_AUTO_BWIDTH | \ + MSGF_MISC_SR_LINK_BWIDTH) =20 /* Legacy interrupt status mask bits */ #define MSGF_LEG_SR_INTA BIT(0) @@ -299,10 +299,10 @@ static irqreturn_t nwl_pcie_misc_handler(int irq, voi= d *data) if (misc_stat & MSGF_MISC_SR_FATAL_DEV) dev_err(dev, "Fatal Error Detected\n"); =20 - if (misc_stat & MSGF_MSIC_SR_LINK_AUTO_BWIDTH) + if (misc_stat & MSGF_MISC_SR_LINK_AUTO_BWIDTH) dev_info(dev, "Link Autonomous Bandwidth Management Status bit set\n"); =20 - if (misc_stat & MSGF_MSIC_SR_LINK_BWIDTH) + if (misc_stat & MSGF_MISC_SR_LINK_BWIDTH) dev_info(dev, "Link Bandwidth Management Status bit set\n"); =20 /* Clear misc interrupt status */ --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Feb 11 05:40:51 2026 Received: from out-186.mta0.migadu.com (out-186.mta0.migadu.com [91.218.175.186]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1005D137744 for ; Mon, 20 May 2024 14:54:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.186 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716216863; cv=none; b=KctW50M3qio6xR2cBRQqStA1Bt2kxL/gcxXwIjKRZ3pZy/LpNuz3ybsy6vwzAQm2a5nVrnKA5axK5HF8B44gu8N7CWuN9bi/6CaRNIu+WR17FQdHAULRjyRC1uYAQ2dWPjUSycTthyImzmn5jU9zkOEFdMs87NeN1g+h2rZPEyk= ARC-Message-Signature: i=1; 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From: Sean Anderson To: Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , linux-kernel@vger.kernel.org, Sean Anderson Subject: [PATCH v3 4/7] PCI: xilinx-nwl: Rate-limit misc interrupt messages Date: Mon, 20 May 2024 10:53:59 -0400 Message-Id: <20240520145402.2526481-5-sean.anderson@linux.dev> In-Reply-To: <20240520145402.2526481-1-sean.anderson@linux.dev> References: <20240520145402.2526481-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" The conditions logged by the misc interrupt can occur repeatedly and continuously. Avoid rendering the console unusable by rate-limiting these messages. Signed-off-by: Sean Anderson --- (no changes since v1) drivers/pci/controller/pcie-xilinx-nwl.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/control= ler/pcie-xilinx-nwl.c index ce881baac6d8..c0a60cebdb2e 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -267,37 +267,37 @@ static irqreturn_t nwl_pcie_misc_handler(int irq, voi= d *data) return IRQ_NONE; =20 if (misc_stat & MSGF_MISC_SR_RXMSG_OVER) - dev_err(dev, "Received Message FIFO Overflow\n"); + dev_err_ratelimited(dev, "Received Message FIFO Overflow\n"); =20 if (misc_stat & MSGF_MISC_SR_SLAVE_ERR) - dev_err(dev, "Slave error\n"); + dev_err_ratelimited(dev, "Slave error\n"); =20 if (misc_stat & MSGF_MISC_SR_MASTER_ERR) - dev_err(dev, "Master error\n"); + dev_err_ratelimited(dev, "Master error\n"); =20 if (misc_stat & MSGF_MISC_SR_I_ADDR_ERR) - dev_err(dev, "In Misc Ingress address translation error\n"); + dev_err_ratelimited(dev, "In Misc Ingress address translation error\n"); =20 if (misc_stat & MSGF_MISC_SR_E_ADDR_ERR) - dev_err(dev, "In Misc Egress address translation error\n"); + dev_err_ratelimited(dev, "In Misc Egress address translation error\n"); =20 if (misc_stat & MSGF_MISC_SR_FATAL_AER) - dev_err(dev, "Fatal Error in AER Capability\n"); + dev_err_ratelimited(dev, "Fatal Error in AER Capability\n"); =20 if (misc_stat & MSGF_MISC_SR_NON_FATAL_AER) - dev_err(dev, "Non-Fatal Error in AER Capability\n"); + dev_err_ratelimited(dev, "Non-Fatal Error in AER Capability\n"); =20 if (misc_stat & MSGF_MISC_SR_CORR_AER) - dev_err(dev, "Correctable Error in AER Capability\n"); + dev_err_ratelimited(dev, "Correctable Error in AER Capability\n"); =20 if (misc_stat & MSGF_MISC_SR_UR_DETECT) - dev_err(dev, "Unsupported request Detected\n"); + dev_err_ratelimited(dev, "Unsupported request Detected\n"); =20 if (misc_stat & MSGF_MISC_SR_NON_FATAL_DEV) - dev_err(dev, "Non-Fatal Error Detected\n"); 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From: Sean Anderson To: Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , linux-kernel@vger.kernel.org, Sean Anderson , Bharat Kumar Gogada , Lorenzo Pieralisi , Michal Simek Subject: [PATCH v3 5/7] PCI: xilinx-nwl: Clean up clock on probe failure/removal Date: Mon, 20 May 2024 10:54:00 -0400 Message-Id: <20240520145402.2526481-6-sean.anderson@linux.dev> In-Reply-To: <20240520145402.2526481-1-sean.anderson@linux.dev> References: <20240520145402.2526481-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Make sure we turn off the clock on probe failure and device removal. Fixes: de0a01f52966 ("PCI: xilinx-nwl: Enable the clock through CCF") Signed-off-by: Sean Anderson --- (no changes since v1) drivers/pci/controller/pcie-xilinx-nwl.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/control= ler/pcie-xilinx-nwl.c index c0a60cebdb2e..424cc5a1b4d1 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -779,6 +779,7 @@ static int nwl_pcie_probe(struct platform_device *pdev) return -ENODEV; =20 pcie =3D pci_host_bridge_priv(bridge); + platform_set_drvdata(pdev, pcie); =20 pcie->dev =3D dev; =20 @@ -801,13 +802,13 @@ static int nwl_pcie_probe(struct platform_device *pde= v) err =3D nwl_pcie_bridge_init(pcie); if (err) { dev_err(dev, "HW Initialization failed\n"); - return err; + goto err_clk; } =20 err =3D nwl_pcie_init_irq_domain(pcie); if (err) { dev_err(dev, "Failed creating IRQ Domain\n"); - return err; + goto err_clk; } =20 bridge->sysdata =3D pcie; @@ -817,11 +818,23 @@ static int nwl_pcie_probe(struct platform_device *pde= v) err =3D nwl_pcie_enable_msi(pcie); if (err < 0) { dev_err(dev, "failed to enable MSI support: %d\n", err); - return err; + goto err_clk; } } =20 - return pci_host_probe(bridge); + err =3D pci_host_probe(bridge); + +err_clk: + if (err) + clk_disable_unprepare(pcie->clk); + return err; +} + +static void nwl_pcie_remove(struct platform_device *pdev) +{ + struct nwl_pcie *pcie =3D platform_get_drvdata(pdev); + + clk_disable_unprepare(pcie->clk); } =20 static struct platform_driver nwl_pcie_driver =3D { @@ -831,5 +844,6 @@ static struct platform_driver nwl_pcie_driver =3D { .of_match_table =3D nwl_pcie_of_match, }, .probe =3D nwl_pcie_probe, + .remove_new =3D nwl_pcie_remove, }; builtin_platform_driver(nwl_pcie_driver); --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Feb 11 05:40:51 2026 Received: from out-182.mta0.migadu.com (out-182.mta0.migadu.com [91.218.175.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5E29137938 for ; Mon, 20 May 2024 14:54:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716216867; cv=none; b=bohS5fA3oF1aryFrAfsBONhMN6adZ/VqtcH/qvacPlACgZm36ITw6zMhBhNRAdFTrcBTg+uGZBqyP1fF7n6al7y8CnA7LbZQrWToniQiwzlJZ63mEKLde7T7TeriAlZXeIJbYO/fcv54o5+yr/MHNQZXJLKorszVkXCV+TUqPyE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716216867; c=relaxed/simple; bh=3uMyDEJl05P+qgvwQEmQpgQbqsr9fk1HzEdGBAspwkE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BKDyB+DvfHrXttHR+BI4GfesnVj1GnxtUnjzKrUap8jBFBmKBh/5yG6BAqaHF8M2U+mvNTEnNK1OXg6r1RZy7q5STP0XLlpkJ6wvbnWmCF/+AFO39QA0zGpI/Vx6tFYKc5UtNgdSQWhCPGugvpbLqFTsp4n6Ae8wmqlTVOW8BTc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=jrStlv+1; arc=none smtp.client-ip=91.218.175.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="jrStlv+1" X-Envelope-To: lpieralisi@kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1716216864; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ah8ssJoJMpX9j3KA2wLR2XP4o+0DLv8mu8Ng3HYXVLw=; b=jrStlv+1tG8uCvzkM23diPlhKRq84UrhrrHWphKlLo5Ht5DIc6XR9XvrG4+ZC84uGLyHzX nJSDoRRhx/Pfk8SINmv5glUfLxOtMbfd+n/9Q2AaC5DzbAVWAkEkyRXVxNRkYBxkmoOtos gpvDqntz8oBwx5cX9c2fZM+kw6NdLOo= X-Envelope-To: kw@linux.com X-Envelope-To: robh@kernel.org X-Envelope-To: linux-pci@vger.kernel.org X-Envelope-To: michal.simek@amd.com X-Envelope-To: thippeswamy.havalige@amd.com X-Envelope-To: linux-arm-kernel@lists.infradead.org X-Envelope-To: bhelgaas@google.com X-Envelope-To: linux-kernel@vger.kernel.org X-Envelope-To: sean.anderson@linux.dev X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Sean Anderson To: Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , linux-kernel@vger.kernel.org, Sean Anderson Subject: [PATCH v3 6/7] PCI: xilinx-nwl: Add phy support Date: Mon, 20 May 2024 10:54:01 -0400 Message-Id: <20240520145402.2526481-7-sean.anderson@linux.dev> In-Reply-To: <20240520145402.2526481-1-sean.anderson@linux.dev> References: <20240520145402.2526481-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add support for enabling/disabling PCIe phys. We can't really do anything about failures in the disable/remove path, so just warn. Signed-off-by: Sean Anderson --- (no changes since v2) Changes in v2: - Get phys by index and not by name drivers/pci/controller/pcie-xilinx-nwl.c | 68 ++++++++++++++++++++++-- 1 file changed, 65 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/control= ler/pcie-xilinx-nwl.c index 424cc5a1b4d1..d32cf4247836 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include =20 @@ -157,6 +158,7 @@ struct nwl_pcie { void __iomem *breg_base; void __iomem *pcireg_base; void __iomem *ecam_base; + struct phy *phy[4]; phys_addr_t phys_breg_base; /* Physical Bridge Register Base */ phys_addr_t phys_pcie_reg_base; /* Physical PCIe Controller Base */ phys_addr_t phys_ecam_base; /* Physical Configuration Base */ @@ -521,6 +523,43 @@ static int nwl_pcie_init_msi_irq_domain(struct nwl_pci= e *pcie) return 0; } =20 +static int nwl_pcie_phy_enable(struct nwl_pcie *pcie) +{ + int i, ret; + + for (i =3D 0; i < ARRAY_SIZE(pcie->phy); i++) { + ret =3D phy_init(pcie->phy[i]); + if (ret) + goto err; + + ret =3D phy_power_on(pcie->phy[i]); + if (ret) { + WARN_ON(phy_exit(pcie->phy[i])); + goto err; + } + } + + return 0; + +err: + while (--i) { + WARN_ON(phy_power_off(pcie->phy[i])); + WARN_ON(phy_exit(pcie->phy[i])); + } + + return ret; +} + +static void nwl_pcie_phy_disable(struct nwl_pcie *pcie) +{ + int i; + + for (i =3D 0; i < ARRAY_SIZE(pcie->phy); i++) { + WARN_ON(phy_power_off(pcie->phy[i])); + WARN_ON(phy_exit(pcie->phy[i])); + } +} + static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie) { struct device *dev =3D pcie->dev; @@ -732,6 +771,7 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie, { struct device *dev =3D pcie->dev; struct resource *res; + int i; =20 res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "breg"); pcie->breg_base =3D devm_ioremap_resource(dev, res); @@ -759,6 +799,18 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie, irq_set_chained_handler_and_data(pcie->irq_intx, nwl_pcie_leg_handler, pcie); =20 + + for (i =3D 0; i < ARRAY_SIZE(pcie->phy); i++) { + pcie->phy[i] =3D devm_of_phy_get_by_index(dev, dev->of_node, i); + if (PTR_ERR(pcie->phy[i]) =3D=3D -ENODEV) { + pcie->phy[i] =3D NULL; + break; + } + + if (IS_ERR(pcie->phy[i])) + return PTR_ERR(pcie->phy[i]); + } + return 0; } =20 @@ -799,16 +851,22 @@ static int nwl_pcie_probe(struct platform_device *pde= v) return err; } =20 + err =3D nwl_pcie_phy_enable(pcie); + if (err) { + dev_err(dev, "could not enable PHYs\n"); + goto err_clk; + } + err =3D nwl_pcie_bridge_init(pcie); if (err) { dev_err(dev, "HW Initialization failed\n"); - goto err_clk; + goto err_phy; } =20 err =3D nwl_pcie_init_irq_domain(pcie); if (err) { dev_err(dev, "Failed creating IRQ Domain\n"); - goto err_clk; + goto err_phy; } =20 bridge->sysdata =3D pcie; @@ -818,12 +876,15 @@ static int nwl_pcie_probe(struct platform_device *pde= v) err =3D nwl_pcie_enable_msi(pcie); if (err < 0) { dev_err(dev, "failed to enable MSI support: %d\n", err); - goto err_clk; + goto err_phy; } } =20 err =3D pci_host_probe(bridge); =20 +err_phy: + if (err) + nwl_pcie_phy_disable(pcie); err_clk: if (err) clk_disable_unprepare(pcie->clk); @@ -834,6 +895,7 @@ static void nwl_pcie_remove(struct platform_device *pde= v) { struct nwl_pcie *pcie =3D platform_get_drvdata(pdev); =20 + nwl_pcie_phy_disable(pcie); clk_disable_unprepare(pcie->clk); } =20 --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Feb 11 05:40:51 2026 Received: from out-182.mta0.migadu.com (out-182.mta0.migadu.com [91.218.175.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CDB9F137C37 for ; Mon, 20 May 2024 14:54:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716216869; cv=none; b=YS8uxxGlw4ERYhPSmUCIvc+TIf/0pgfWmT0Vcci7y4vEuohieYz5HorO5Gxw7FA80zAt/lapagKt3tkm2v8rdwRu9qUALmC3SYXvwOJBbAKrrQ/CzMPPFaO+jCuXGqiCnWzcEcwZjfbOeVC095h6bNRRrSvntc0ZaMoWDQNkzPE= ARC-Message-Signature: i=1; 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From: Sean Anderson To: Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , linux-kernel@vger.kernel.org, Sean Anderson Subject: [PATCH v3 7/7] arm64: zynqmp: Add PCIe phys Date: Mon, 20 May 2024 10:54:02 -0400 Message-Id: <20240520145402.2526481-8-sean.anderson@linux.dev> In-Reply-To: <20240520145402.2526481-1-sean.anderson@linux.dev> References: <20240520145402.2526481-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add PCIe phy bindings for the ZCU102. Signed-off-by: Sean Anderson Tested-by: thippeswamy.havalige@amd.com --- (no changes since v2) Changes in v2: - Remove phy-names arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64= /boot/dts/xilinx/zynqmp-zcu102-revA.dts index ad8f23a0ec67..d2175f3dd099 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts @@ -941,6 +941,7 @@ conf-pull-none { =20 &pcie { status =3D "okay"; + phys =3D <&psgtr 0 PHY_TYPE_PCIE 0 0>; }; =20 &psgtr { --=20 2.35.1.1320.gc452695387.dirty