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Shutemov" To: Sean Christopherson , Paolo Bonzini , Dave Hansen , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Josh Poimboeuf , Peter Zijlstra Cc: linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCH 14/20] x86/tdx: Add macros to generate TDCALL wrappers Date: Fri, 17 May 2024 17:19:32 +0300 Message-ID: <20240517141938.4177174-15-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240517141938.4177174-1-kirill.shutemov@linux.intel.com> References: <20240517141938.4177174-1-kirill.shutemov@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a set of macros that allow to generate wrappers for TDCALL leafs. There are three macros differentiated by number of return parameters. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/shared/tdx.h | 58 +++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/x86/include/asm/shared/tdx.h b/arch/x86/include/asm/share= d/tdx.h index 46c299dc9cf0..70190ebc63ca 100644 --- a/arch/x86/include/asm/shared/tdx.h +++ b/arch/x86/include/asm/shared/tdx.h @@ -80,6 +80,64 @@ =20 #include =20 +#define TDCALL ".byte 0x66,0x0f,0x01,0xcc\n\t" + +#define TDCALL_0(reason, in_rcx, in_rdx, in_r8, in_r9) \ +({ \ + long __ret; \ + \ + asm( \ + "movq %[r8_in], %%r8\n\t" \ + "movq %[r9_in], %%r9\n\t" \ + TDCALL \ + : "=3Da" (__ret), ASM_CALL_CONSTRAINT \ + : "a" (reason), "c" (in_rcx), "d" (in_rdx), \ + [r8_in] "rm" ((u64)in_r8), [r9_in] "rm" ((u64)in_r9) \ + : "r8", "r9" \ + ); \ + __ret; \ +}) + +#define TDCALL_1(reason, in_rcx, in_rdx, in_r8, in_r9, out_r8) \ +({ \ + long __ret; \ + \ + asm( \ + "movq %[r8_in], %%r8\n\t" \ + "movq %[r9_in], %%r9\n\t" \ + TDCALL \ + "movq %%r8, %[r8_out]\n\t" \ + : "=3Da" (__ret), ASM_CALL_CONSTRAINT, [r8_out] "=3Drm" (out_r8) \ + : "a" (reason), "c" (in_rcx), "d" (in_rdx), \ + [r8_in] "rm" ((u64)in_r8), [r9_in] "rm" ((u64)in_r9) \ + : "r8", "r9" \ + ); \ + __ret; \ +}) + +#define TDCALL_5(reason, in_rcx, in_rdx, in_r8, in_r9, \ + out_rcx, out_rdx, out_r8, out_r9, out_r10) \ +({ \ + long __ret; \ + \ + asm( \ + "movq %[r8_in], %%r8\n\t" \ + "movq %[r9_in], %%r9\n\t" \ + TDCALL \ + "movq %%r8, %[r8_out]\n\t" \ + "movq %%r9, %[r9_out]\n\t" \ + "movq %%r10, %[r10_out]\n\t" \ + : "=3Da" (__ret), ASM_CALL_CONSTRAINT, \ + "=3Dc" (out_rcx), "=3Dd" (out_rdx), \ + [r8_out] "=3Drm" (out_r8), [r9_out] "=3Drm" (out_r9), \ + [r10_out] "=3Drm" (out_r10) \ + : "a" (reason), "c" (in_rcx), "d" (in_rdx), \ + [r8_in] "rm" ((u64)in_r8), [r9_in] "rm" ((u64)in_r9) \ + : "r8", "r9", "r10" \ + ); \ + __ret; \ +}) + #define TDVMCALL_0(reason, in_r12, in_r13, in_r14, in_r15) \ ({ \ long __ret; \ --=20 2.43.0