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([2a02:2f08:a105:8300:5179:8171:3530:3b]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3502b896a06sm13593927f8f.27.2024.05.14.05.03.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 05:03:22 -0700 (PDT) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: michael.hennerich@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, lgirdwood@gmail.com, broonie@kernel.org, andy@kernel.org, nuno.sa@analog.com, marcelo.schmitt@analog.com, bigunclemax@gmail.com, dlechner@baylibre.com, okan.sahin@analog.com, fr0st61te@gmail.com, alisa.roman@analog.com, marcus.folkesson@gmail.com, schnelle@linux.ibm.com, liambeguin@gmail.com Subject: [PATCH v8 6/6] iio: adc: ad7192: Add AD7194 support Date: Tue, 14 May 2024 15:02:22 +0300 Message-Id: <20240514120222.56488-7-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240514120222.56488-1-alisa.roman@analog.com> References: <20240514120222.56488-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Unlike the other AD719Xs, AD7194 has configurable channels. The user can dynamically configure them in the devicetree. Add sigma_delta_info member to chip_info structure. Since AD7194 is the only chip that has no channel sequencer, num_slots should remain undefined. Also modify config AD7192 description for better scaling. Signed-off-by: Alisa-Dariana Roman --- drivers/iio/adc/Kconfig | 11 ++- drivers/iio/adc/ad7192.c | 147 +++++++++++++++++++++++++++++++++++++-- 2 files changed, 150 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 8db68b80b391..74fecc284f1a 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -88,12 +88,17 @@ config AD7173 called ad7173. =20 config AD7192 - tristate "Analog Devices AD7190 AD7192 AD7193 AD7195 ADC driver" + tristate "Analog Devices AD7192 and similar ADC driver" depends on SPI select AD_SIGMA_DELTA help - Say yes here to build support for Analog Devices AD7190, - AD7192, AD7193 or AD7195 SPI analog to digital converters (ADC). + Say yes here to build support for Analog Devices SPI analog to digital + converters (ADC): + - AD7190 + - AD7192 + - AD7193 + - AD7194 + - AD7195 If unsure, say N (but it's safe to say "Y"). =20 To compile this driver as a module, choose M here: the diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index 7160929d32c9..fe2d8d55fa76 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * AD7190 AD7192 AD7193 AD7195 SPI ADC driver + * AD7192 and similar SPI ADC driver * * Copyright 2011-2015 Analog Devices Inc. */ @@ -129,10 +129,22 @@ #define AD7193_CH_AIN8 0x480 /* AIN7 - AINCOM */ #define AD7193_CH_AINCOM 0x600 /* AINCOM - AINCOM */ =20 +#define AD7194_CH_POS(x) (((x) - 1) << 4) +#define AD7194_CH_NEG(x) ((x) - 1) +#define AD7194_CH(p) (BIT(10) | AD7194_CH_POS(p)) + /* 10th bit corresponds to CON18(Pseudo) */ +#define AD7194_DIFF_CH(p, n) (AD7194_CH_POS(p) | AD7194_CH_NEG(n)) +#define AD7194_CH_TEMP 0x100 /* Temp sensor */ +#define AD7194_CH_BASE_NR 2 +#define AD7194_CH_AIN_START 1 +#define AD7194_CH_AIN_NR 16 +#define AD7194_CH_MAX_NR 272 + /* ID Register Bit Designations (AD7192_REG_ID) */ #define CHIPID_AD7190 0x4 #define CHIPID_AD7192 0x0 #define CHIPID_AD7193 0x2 +#define CHIPID_AD7194 0x3 #define CHIPID_AD7195 0x6 #define AD7192_ID_MASK GENMASK(3, 0) =20 @@ -170,6 +182,7 @@ enum { ID_AD7190, ID_AD7192, ID_AD7193, + ID_AD7194, ID_AD7195, }; =20 @@ -178,7 +191,9 @@ struct ad7192_chip_info { const char *name; const struct iio_chan_spec *channels; u8 num_channels; + const struct ad_sigma_delta_info *sigma_delta_info; const struct iio_info *info; + int (*parse_channels)(struct iio_dev *indio_dev); }; =20 struct ad7192_state { @@ -346,6 +361,18 @@ static const struct ad_sigma_delta_info ad7192_sigma_d= elta_info =3D { .irq_flags =3D IRQF_TRIGGER_FALLING, }; =20 +static const struct ad_sigma_delta_info ad7194_sigma_delta_info =3D { + .set_channel =3D ad7192_set_channel, + .append_status =3D ad7192_append_status, + .disable_all =3D ad7192_disable_all, + .set_mode =3D ad7192_set_mode, + .has_registers =3D true, + .addr_shift =3D 3, + .read_mask =3D BIT(6), + .status_ch_mask =3D GENMASK(3, 0), + .irq_flags =3D IRQF_TRIGGER_FALLING, +}; + static const struct ad_sd_calib_data ad7192_calib_arr[8] =3D { {AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN1}, {AD7192_MODE_CAL_INT_FULL, AD7192_CH_AIN1}, @@ -937,6 +964,14 @@ static const struct iio_info ad7192_info =3D { .update_scan_mode =3D ad7192_update_scan_mode, }; =20 +static const struct iio_info ad7194_info =3D { + .read_raw =3D ad7192_read_raw, + .write_raw =3D ad7192_write_raw, + .write_raw_get_fmt =3D ad7192_write_raw_get_fmt, + .read_avail =3D ad7192_read_avail, + .validate_trigger =3D ad_sd_validate_trigger, +}; + static const struct iio_info ad7195_info =3D { .read_raw =3D ad7192_read_raw, .write_raw =3D ad7192_write_raw, @@ -1028,12 +1063,96 @@ static const struct iio_chan_spec ad7193_channels[]= =3D { IIO_CHAN_SOFT_TIMESTAMP(14), }; =20 +static int ad7194_validate_ain_channel(struct device *dev, u32 ain) +{ + if (!in_range(ain, AD7194_CH_AIN_START, AD7194_CH_AIN_NR)) + return dev_err_probe(dev, -EINVAL, + "Invalid AIN channel: %u\n", ain); + + return 0; +} + +static int ad7194_parse_channels(struct iio_dev *indio_dev) +{ + struct device *dev =3D indio_dev->dev.parent; + struct iio_chan_spec *ad7194_channels; + const struct iio_chan_spec ad7194_chan =3D AD7193_CHANNEL(0, 0, 0); + const struct iio_chan_spec ad7194_chan_diff =3D AD7193_DIFF_CHANNEL(0, 0,= 0, 0); + const struct iio_chan_spec ad7194_chan_temp =3D AD719x_TEMP_CHANNEL(0, 0); + const struct iio_chan_spec ad7194_chan_timestamp =3D IIO_CHAN_SOFT_TIMEST= AMP(0); + unsigned int num_channels, index =3D 0; + u32 ain[2]; + int ret; + + num_channels =3D device_get_child_node_count(dev); + if (num_channels > AD7194_CH_MAX_NR) + return dev_err_probe(dev, -EINVAL, + "Too many channels: %u\n", num_channels); + + num_channels +=3D AD7194_CH_BASE_NR; + + ad7194_channels =3D devm_kcalloc(dev, num_channels, + sizeof(*ad7194_channels), GFP_KERNEL); + if (!ad7194_channels) + return -ENOMEM; + + indio_dev->channels =3D ad7194_channels; + indio_dev->num_channels =3D num_channels; + + device_for_each_child_node_scoped(dev, child) { + ret =3D fwnode_property_read_u32_array(child, "diff-channels", + ain, ARRAY_SIZE(ain)); + if (ret =3D=3D 0) { + ret =3D ad7194_validate_ain_channel(dev, ain[0]); + if (ret) + return ret; + + ret =3D ad7194_validate_ain_channel(dev, ain[1]); + if (ret) + return ret; + + *ad7194_channels =3D ad7194_chan_diff; + ad7194_channels->scan_index =3D index++; + ad7194_channels->channel =3D ain[0]; + ad7194_channels->channel2 =3D ain[1]; + ad7194_channels->address =3D AD7194_DIFF_CH(ain[0], ain[1]); + } else { + ret =3D fwnode_property_read_u32(child, "single-channel", + &ain[0]); + if (ret) + return dev_err_probe(dev, ret, + "Missing channel property\n"); + + ret =3D ad7194_validate_ain_channel(dev, ain[0]); + if (ret) + return ret; + + *ad7194_channels =3D ad7194_chan; + ad7194_channels->scan_index =3D index++; + ad7194_channels->channel =3D ain[0]; + ad7194_channels->address =3D AD7194_CH(ain[0]); + } + ad7194_channels++; + } + + *ad7194_channels =3D ad7194_chan_temp; + ad7194_channels->scan_index =3D index++; + ad7194_channels->address =3D AD7194_CH_TEMP; + ad7194_channels++; + + *ad7194_channels =3D ad7194_chan_timestamp; + ad7194_channels->scan_index =3D index; + + return 0; +} + static const struct ad7192_chip_info ad7192_chip_info_tbl[] =3D { [ID_AD7190] =3D { .chip_id =3D CHIPID_AD7190, .name =3D "ad7190", .channels =3D ad7192_channels, .num_channels =3D ARRAY_SIZE(ad7192_channels), + .sigma_delta_info =3D &ad7192_sigma_delta_info, .info =3D &ad7192_info, }, [ID_AD7192] =3D { @@ -1041,6 +1160,7 @@ static const struct ad7192_chip_info ad7192_chip_info= _tbl[] =3D { .name =3D "ad7192", .channels =3D ad7192_channels, .num_channels =3D ARRAY_SIZE(ad7192_channels), + .sigma_delta_info =3D &ad7192_sigma_delta_info, .info =3D &ad7192_info, }, [ID_AD7193] =3D { @@ -1048,13 +1168,22 @@ static const struct ad7192_chip_info ad7192_chip_in= fo_tbl[] =3D { .name =3D "ad7193", .channels =3D ad7193_channels, .num_channels =3D ARRAY_SIZE(ad7193_channels), + .sigma_delta_info =3D &ad7192_sigma_delta_info, .info =3D &ad7192_info, }, + [ID_AD7194] =3D { + .chip_id =3D CHIPID_AD7194, + .name =3D "ad7194", + .info =3D &ad7194_info, + .sigma_delta_info =3D &ad7194_sigma_delta_info, + .parse_channels =3D ad7194_parse_channels, + }, [ID_AD7195] =3D { .chip_id =3D CHIPID_AD7195, .name =3D "ad7195", .channels =3D ad7192_channels, .num_channels =3D ARRAY_SIZE(ad7192_channels), + .sigma_delta_info =3D &ad7192_sigma_delta_info, .info =3D &ad7195_info, }, }; @@ -1161,11 +1290,17 @@ static int ad7192_probe(struct spi_device *spi) st->chip_info =3D spi_get_device_match_data(spi); indio_dev->name =3D st->chip_info->name; indio_dev->modes =3D INDIO_DIRECT_MODE; - indio_dev->channels =3D st->chip_info->channels; - indio_dev->num_channels =3D st->chip_info->num_channels; indio_dev->info =3D st->chip_info->info; + if (st->chip_info->parse_channels) { + ret =3D st->chip_info->parse_channels(indio_dev); + if (ret) + return ret; + } else { + indio_dev->channels =3D st->chip_info->channels; + indio_dev->num_channels =3D st->chip_info->num_channels; + } =20 - ret =3D ad_sd_init(&st->sd, indio_dev, spi, &ad7192_sigma_delta_info); + ret =3D ad_sd_init(&st->sd, indio_dev, spi, st->chip_info->sigma_delta_in= fo); if (ret) return ret; =20 @@ -1202,6 +1337,7 @@ static const struct of_device_id ad7192_of_match[] = =3D { { .compatible =3D "adi,ad7190", .data =3D &ad7192_chip_info_tbl[ID_AD7190= ] }, { .compatible =3D "adi,ad7192", .data =3D &ad7192_chip_info_tbl[ID_AD7192= ] }, { .compatible =3D "adi,ad7193", .data =3D &ad7192_chip_info_tbl[ID_AD7193= ] }, + { .compatible =3D "adi,ad7194", .data =3D &ad7192_chip_info_tbl[ID_AD7194= ] }, { .compatible =3D "adi,ad7195", .data =3D &ad7192_chip_info_tbl[ID_AD7195= ] }, {} }; @@ -1211,6 +1347,7 @@ static const struct spi_device_id ad7192_ids[] =3D { { "ad7190", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7190] }, { "ad7192", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7192] }, { "ad7193", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7193] }, + { "ad7194", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7194] }, { "ad7195", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7195] }, {} }; @@ -1227,6 +1364,6 @@ static struct spi_driver ad7192_driver =3D { module_spi_driver(ad7192_driver); =20 MODULE_AUTHOR("Michael Hennerich "); -MODULE_DESCRIPTION("Analog Devices AD7190, AD7192, AD7193, AD7195 ADC"); +MODULE_DESCRIPTION("Analog Devices AD7192 and similar ADC"); MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS(IIO_AD_SIGMA_DELTA); --=20 2.34.1