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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240512-dsi-panels-upd-api-v2-1-e31ca14d102e@linaro.org> References: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> In-Reply-To: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> To: Douglas Anderson , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Sumit Semwal , Caleb Connolly , Marijn Suijten , Vinod Koul Cc: Cong Yang , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2884; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=sjNwNWt1lktWQrmL6beKWmXl2L8FICi4sYx1xY8LX/4=; b=owEBbAGT/pANAwAKAYs8ij4CKSjVAcsmYgBmP/iIq2PSj7Y1vez6Rc2QseG7HDNb8trfZ6GFD fbOLvZ4cmeJATIEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZj/4iAAKCRCLPIo+Aiko 1RPRB/iPkeSgZV6o0AQqVNOnA/LGZ26CD5knxYfdT6mUpksmIdzNgz51P7eJqFplreJORm+ki18 Ak5BJgGG1G/Le90JBUp2AAfXsWY8Qyc4blaMEuaiR7idSxNgE3dIMdrdKAxvV+Y8Km3qAquwJXw XX1uW/CIGcFwAkWYummz3BUUcQvximQ8c1502Q2MWhPeH/LD/Eb3qLSn9gzcXWL90IZXsQqaMrd TADER+4+U8OhlF9N29/espaXx4aqOR7cgeJ812G0t+TXDhqUA/nD2ptzrzxANloKyaGOrI1Qnfm fPGdECpiiVL/ErgtxppPVEIEBME0FKNDHgTZbbRHeR1R0T4= X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Add missing error handling for the mipi_dsi_ functions that actually return error code instead of silently ignoring it. Fixes: 069a6c0e94f9 ("drm: panel: Add LG sw43408 panel driver") Reviewed-by: Douglas Anderson Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 33 ++++++++++++++++++++++++++--= ---- 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/pan= el/panel-lg-sw43408.c index 2b3a73696dce..67a98ac508f8 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -62,16 +62,25 @@ static int sw43408_program(struct drm_panel *panel) { struct sw43408_panel *ctx =3D to_panel_info(panel); struct drm_dsc_picture_parameter_set pps; + int ret; =20 mipi_dsi_dcs_write_seq(ctx->link, MIPI_DCS_SET_GAMMA_CURVE, 0x02); =20 - mipi_dsi_dcs_set_tear_on(ctx->link, MIPI_DSI_DCS_TEAR_MODE_VBLANK); + ret =3D mipi_dsi_dcs_set_tear_on(ctx->link, MIPI_DSI_DCS_TEAR_MODE_VBLANK= ); + if (ret < 0) { + dev_err(panel->dev, "Failed to set tearing: %d\n", ret); + return ret; + } =20 mipi_dsi_dcs_write_seq(ctx->link, 0x53, 0x0c, 0x30); mipi_dsi_dcs_write_seq(ctx->link, 0x55, 0x00, 0x70, 0xdf, 0x00, 0x70, 0xd= f); mipi_dsi_dcs_write_seq(ctx->link, 0xf7, 0x01, 0x49, 0x0c); =20 - mipi_dsi_dcs_exit_sleep_mode(ctx->link); + ret =3D mipi_dsi_dcs_exit_sleep_mode(ctx->link); + if (ret < 0) { + dev_err(panel->dev, "Failed to exit sleep mode: %d\n", ret); + return ret; + } =20 msleep(135); =20 @@ -97,14 +106,22 @@ static int sw43408_program(struct drm_panel *panel) mipi_dsi_dcs_write_seq(ctx->link, 0x55, 0x04, 0x61, 0xdb, 0x04, 0x70, 0xd= b); mipi_dsi_dcs_write_seq(ctx->link, 0xb0, 0xca); =20 - mipi_dsi_dcs_set_display_on(ctx->link); + ret =3D mipi_dsi_dcs_set_display_on(ctx->link); + if (ret < 0) { + dev_err(panel->dev, "Failed to set display on: %d\n", ret); + return ret; + } =20 msleep(50); =20 ctx->link->mode_flags &=3D ~MIPI_DSI_MODE_LPM; =20 drm_dsc_pps_payload_pack(&pps, ctx->link->dsc); - mipi_dsi_picture_parameter_set(ctx->link, &pps); + ret =3D mipi_dsi_picture_parameter_set(ctx->link, &pps); + if (ret < 0) { + dev_err(panel->dev, "Failed to set PPS: %d\n", ret); + return ret; + } =20 ctx->link->mode_flags |=3D MIPI_DSI_MODE_LPM; =20 @@ -113,8 +130,12 @@ static int sw43408_program(struct drm_panel *panel) * PPS 1 if pps_identifier is 0 * PPS 2 if pps_identifier is 1 */ - mipi_dsi_compression_mode_ext(ctx->link, true, - MIPI_DSI_COMPRESSION_DSC, 1); + ret =3D mipi_dsi_compression_mode_ext(ctx->link, true, + MIPI_DSI_COMPRESSION_DSC, 1); + if (ret < 0) { + dev_err(panel->dev, "Failed to set compression mode: %d\n", ret); + return ret; + } =20 return 0; } --=20 2.39.2 From nobody Sun Dec 14 12:12:42 2025 Received: from mail-lf1-f51.google.com (mail-lf1-f51.google.com [209.85.167.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F06F2A8C1 for ; Sat, 11 May 2024 23:00:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715468432; 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Sat, 11 May 2024 16:00:28 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-521f38d3717sm1134222e87.173.2024.05.11.16.00.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 May 2024 16:00:27 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 12 May 2024 02:00:19 +0300 Subject: [PATCH v2 2/7] drm/mipi-dsi: wrap more functions for streamline handling Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240512-dsi-panels-upd-api-v2-2-e31ca14d102e@linaro.org> References: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> In-Reply-To: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> To: Douglas Anderson , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Sumit Semwal , Caleb Connolly , Marijn Suijten , Vinod Koul Cc: Cong Yang , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=9508; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=xi5U71kz8T87h4VViIeLZOLRoolhq+/AdfXL3EWovWo=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmP/iILRHsslbO7N+jkxp9j4cFntTv96XBqLvLi sJVcR2kvcaJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZj/4iAAKCRCLPIo+Aiko 1Z9DB/0SiooYtozFy/Si/1cRF+TFzLyCUNPoKFTkvKu71M6eLqaVvGWGYZRJ5Djj2A2Wr6dh5OJ 04lXqSIRYYlGMZJn0TZ4gByg2Ta3ZQafWiYOCAQSt92HyF8sk0JMCDHrSDOVwgnxElRgrwpC+vm QhGAijjacI42OHeCidtyTb+1exey8sb5eYYkve013ZUe1uzDA2EUgSp+Os/rRoVCpv++MsBdT7R 9GJ18MvwTzNpQUC7EL/i8aTAXUgccXL1laDgdkFu7QN9xG3HSj1h901jpKDsCBdFVPZi810GmwF 6JonyQp5VKjq0WcXTE1IZyH7DpnkaXVeUZeYzASgXZYNbB+y X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Follow the pattern of mipi_dsi_dcs_*_multi() and wrap several existing MIPI DSI functions to use the context for processing. This simplifies and streamlines driver code to use simpler code pattern. Note, msleep function is also wrapped in this way as it is frequently called inbetween other mipi_dsi_dcs_*() functions. Signed-off-by: Dmitry Baryshkov Reviewed-by: Douglas Anderson Reviewed-by: Neil Armstrong --- drivers/gpu/drm/drm_mipi_dsi.c | 210 +++++++++++++++++++++++++++++++++++++= ++++ include/drm/drm_mipi_dsi.h | 21 +++++ 2 files changed, 231 insertions(+) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index d2957cb692d3..8721edd06c06 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -1429,6 +1429,216 @@ int mipi_dsi_dcs_get_display_brightness_large(struc= t mipi_dsi_device *dsi, } EXPORT_SYMBOL(mipi_dsi_dcs_get_display_brightness_large); =20 +/** + * mipi_dsi_picture_parameter_set_multi() - transmit the DSC PPS to the pe= ripheral + * @ctx: Context for multiple DSI transactions + * @pps: VESA DSC 1.1 Picture Parameter Set + * + * Like mipi_dsi_picture_parameter_set() but deals with errors in a way th= at + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_picture_parameter_set_multi(struct mipi_dsi_multi_context *c= tx, + const struct drm_dsc_picture_parameter_set *pps) +{ + struct mipi_dsi_device *dsi =3D ctx->dsi; + struct device *dev =3D &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret =3D mipi_dsi_picture_parameter_set(dsi, pps); + if (ret < 0) { + ctx->accum_err =3D ret; + dev_err(dev, "sending PPS failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_picture_parameter_set_multi); + +/** + * mipi_dsi_compression_mode_ext_multi() - enable/disable DSC on the perip= heral + * @ctx: Context for multiple DSI transactions + * @enable: Whether to enable or disable the DSC + * @algo: Selected compression algorithm + * @pps_selector: Select PPS from the table of pre-stored or uploaded PPS = entries + * + * Like mipi_dsi_compression_mode_ext() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_compression_mode_ext_multi(struct mipi_dsi_multi_context *ct= x, + bool enable, + enum mipi_dsi_compression_algo algo, + unsigned int pps_selector) +{ + struct mipi_dsi_device *dsi =3D ctx->dsi; + struct device *dev =3D &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret =3D mipi_dsi_compression_mode_ext(dsi, enable, algo, pps_selector); + if (ret < 0) { + ctx->accum_err =3D ret; + dev_err(dev, "sending COMPRESSION_MODE failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_compression_mode_ext_multi); + +/** + * mipi_dsi_dcs_nop_multi() - send DCS NOP packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_nop() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_nop_multi(struct mipi_dsi_multi_context *ctx) +{ + struct mipi_dsi_device *dsi =3D ctx->dsi; + struct device *dev =3D &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret =3D mipi_dsi_dcs_nop(dsi); + if (ret < 0) { + ctx->accum_err =3D ret; + dev_err(dev, "sending DCS NOP failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_nop_multi); + +/** + * mipi_dsi_dcs_enter_sleep_mode_multi() - send DCS ENTER_SLEEP_MODE pack= et + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_enter_sleep_mode_multi(struct mipi_dsi_multi_context *ct= x) +{ + struct mipi_dsi_device *dsi =3D ctx->dsi; + struct device *dev =3D &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret =3D mipi_dsi_dcs_enter_sleep_mode(dsi); + if (ret < 0) { + ctx->accum_err =3D ret; + dev_err(dev, "sending DCS ENTER_SLEEP_MODE failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_enter_sleep_mode_multi); + +/** + * mipi_dsi_dcs_exit_sleep_mode_multi() - send DCS EXIT_SLEEP_MODE packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_exit_sleep_mode_multi(struct mipi_dsi_multi_context *ctx) +{ + struct mipi_dsi_device *dsi =3D ctx->dsi; + struct device *dev =3D &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret =3D mipi_dsi_dcs_exit_sleep_mode(dsi); + if (ret < 0) { + ctx->accum_err =3D ret; + dev_err(dev, "sending DCS EXIT_SLEEP_MODE failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_exit_sleep_mode_multi); + +/** + * mipi_dsi_dcs_set_display_off_multi() - send DCS SET_DISPLAY_OFF packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_set_display_off_multi(struct mipi_dsi_multi_context *ctx) +{ + struct mipi_dsi_device *dsi =3D ctx->dsi; + struct device *dev =3D &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret =3D mipi_dsi_dcs_set_display_off(dsi); + if (ret < 0) { + ctx->accum_err =3D ret; + dev_err(dev, "sending DCS SET_DISPLAY_OFF failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_set_display_off_multi); + +/** + * mipi_dsi_dcs_set_display_on_multi() - send DCS SET_DISPLAY_ON packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_set_display_on() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_set_display_on_multi(struct mipi_dsi_multi_context *ctx) +{ + struct mipi_dsi_device *dsi =3D ctx->dsi; + struct device *dev =3D &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret =3D mipi_dsi_dcs_set_display_on(dsi); + if (ret < 0) { + ctx->accum_err =3D ret; + dev_err(dev, "sending DCS SET_DISPLAY_ON failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_set_display_on_multi); + +/** + * mipi_dsi_dcs_set_tear_on_multi() - send DCS SET_TEAR_ON packet + * @ctx: Context for multiple DSI transactions + * @mode: the Tearing Effect Output Line mode + * + * Like mipi_dsi_dcs_set_tear_on() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_set_tear_on_multi(struct mipi_dsi_multi_context *ctx, + enum mipi_dsi_dcs_tear_mode mode) +{ + struct mipi_dsi_device *dsi =3D ctx->dsi; + struct device *dev =3D &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret =3D mipi_dsi_dcs_set_tear_on(dsi, mode); + if (ret < 0) { + ctx->accum_err =3D ret; + dev_err(dev, "sending DCS SET_TEAR_ON failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_set_tear_on_multi); + static int mipi_dsi_drv_probe(struct device *dev) { struct mipi_dsi_driver *drv =3D to_mipi_dsi_driver(dev->driver); diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 5e9cad541bd6..bd5a0b6d0711 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -275,6 +275,13 @@ int mipi_dsi_compression_mode_ext(struct mipi_dsi_devi= ce *dsi, bool enable, int mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, const struct drm_dsc_picture_parameter_set *pps); =20 +void mipi_dsi_compression_mode_ext_multi(struct mipi_dsi_multi_context *ct= x, + bool enable, + enum mipi_dsi_compression_algo algo, + unsigned int pps_selector); +void mipi_dsi_picture_parameter_set_multi(struct mipi_dsi_multi_context *c= tx, + const struct drm_dsc_picture_parameter_set *pps); + ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *pa= yload, size_t size); int mipi_dsi_generic_write_chatty(struct mipi_dsi_device *dsi, @@ -284,6 +291,12 @@ void mipi_dsi_generic_write_multi(struct mipi_dsi_mult= i_context *ctx, ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *par= ams, size_t num_params, void *data, size_t size); =20 +#define mipi_dsi_msleep(ctx, delay) \ + do { \ + if (!ctx.accum_err) \ + msleep(delay); \ + } while (0) + /** * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanki= ng @@ -338,6 +351,14 @@ int mipi_dsi_dcs_set_display_brightness_large(struct m= ipi_dsi_device *dsi, int mipi_dsi_dcs_get_display_brightness_large(struct mipi_dsi_device *dsi, u16 *brightness); =20 +void mipi_dsi_dcs_nop_multi(struct mipi_dsi_multi_context *ctx); +void mipi_dsi_dcs_enter_sleep_mode_multi(struct mipi_dsi_multi_context *ct= x); +void mipi_dsi_dcs_exit_sleep_mode_multi(struct mipi_dsi_multi_context *ctx= ); +void mipi_dsi_dcs_set_display_off_multi(struct mipi_dsi_multi_context *ctx= ); +void mipi_dsi_dcs_set_display_on_multi(struct mipi_dsi_multi_context *ctx); +void mipi_dsi_dcs_set_tear_on_multi(struct mipi_dsi_multi_context *ctx, + enum mipi_dsi_dcs_tear_mode mode); + /** * mipi_dsi_generic_write_seq - transmit data using a generic write packet * --=20 2.39.2 From nobody Sun Dec 14 12:12:42 2025 Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA9EC3B2BD for ; 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Reviewed-by: Douglas Anderson Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 81 ++++++----------------= ---- 1 file changed, 19 insertions(+), 62 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/d= rm/panel/panel-boe-tv101wum-nl6.c index 4b4b125a6c6b..8e839a1749e4 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -448,22 +448,16 @@ static int boe_tv110c9m_init(struct boe_panel *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x00); mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x13); mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x03, 0x96, 0x1a, 0x04, 0x04); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(100); + mipi_dsi_msleep(&ctx, 100); =20 mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(200); + mipi_dsi_msleep(&ctx, 200); =20 mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(100); + mipi_dsi_msleep(&ctx, 100); =20 return 0; }; @@ -893,22 +887,16 @@ static int inx_hj110iz_init(struct boe_panel *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x01); mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x00); mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x03, 0xae, 0x1a, 0x04, 0x04); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(100); + mipi_dsi_msleep(&ctx, 100); =20 mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(200); + mipi_dsi_msleep(&ctx, 200); =20 mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(100); + mipi_dsi_msleep(&ctx, 100); =20 return 0; }; @@ -1207,10 +1195,8 @@ static int boe_init(struct boe_panel *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x08); mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x04); mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x68); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(150); + mipi_dsi_msleep(&ctx, 150); =20 return 0; }; @@ -1222,16 +1208,12 @@ static int auo_kd101n80_45na_init(struct boe_panel = *boe) msleep(24); =20 mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(120); + mipi_dsi_msleep(&ctx, 120); =20 mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(120); + mipi_dsi_msleep(&ctx, 120); =20 return 0; }; @@ -1283,10 +1265,8 @@ static int auo_b101uan08_3_init(struct boe_panel *bo= e) mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x4f); mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x41); mipi_dsi_dcs_write_seq_multi(&ctx, 0xe7, 0x41); - if (ctx.accum_err) - return ctx.accum_err; =20 - msleep(150); + mipi_dsi_msleep(&ctx, 150); =20 return 0; }; @@ -1385,16 +1365,12 @@ static int starry_qfh032011_53g_init(struct boe_pan= el *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x23); mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0x07); mipi_dsi_dcs_write_seq_multi(&ctx, 0X11); - if (ctx.accum_err) - return ctx.accum_err; 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Sat, 11 May 2024 16:00:29 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 12 May 2024 02:00:21 +0300 Subject: [PATCH v2 4/7] drm/panel: ilitek-ili9882t: use wrapped MIPI DCS functions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240512-dsi-panels-upd-api-v2-4-e31ca14d102e@linaro.org> References: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> In-Reply-To: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> To: Douglas Anderson , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Sumit Semwal , Caleb Connolly , Marijn Suijten , Vinod Koul Cc: Cong Yang , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2547; i=dmitry.baryshkov@linaro.org; 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Reviewed-by: Douglas Anderson Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 48 ++++++-----------------= ---- 1 file changed, 11 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/dr= m/panel/panel-ilitek-ili9882t.c index 58fc1d799371..830d7cfbe857 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c @@ -402,19 +402,15 @@ static int starry_ili9882t_init(struct ili9882t *ili) mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x22); =20 ili9882t_switch_page(&ctx, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_EXIT_SLEEP_MODE); - if (ctx.accum_err) - return ctx.accum_err; + mipi_dsi_dcs_exit_sleep_mode_multi(&ctx); =20 - msleep(120); + mipi_dsi_msleep(&ctx, 120); =20 - mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_SET_DISPLAY_ON); - if (ctx.accum_err) - return ctx.accum_err; + mipi_dsi_dcs_set_display_on_multi(&ctx); =20 - msleep(20); + mipi_dsi_msleep(&ctx, 20); =20 - return 0; + return ctx.accum_err; }; =20 static inline struct ili9882t *to_ili9882t(struct drm_panel *panel) @@ -422,43 +418,21 @@ static inline struct ili9882t *to_ili9882t(struct drm= _panel *panel) return container_of(panel, struct ili9882t, base); } =20 -static int ili9882t_enter_sleep_mode(struct ili9882t *ili) -{ - struct mipi_dsi_device *dsi =3D ili->dsi; - int ret; - - dsi->mode_flags &=3D ~MIPI_DSI_MODE_LPM; - - ret =3D mipi_dsi_dcs_set_display_off(dsi); - if (ret < 0) - return ret; - - ret =3D mipi_dsi_dcs_enter_sleep_mode(dsi); - if (ret < 0) - return ret; - - return 0; -} - static int ili9882t_disable(struct drm_panel *panel) { struct ili9882t *ili =3D to_ili9882t(panel); struct mipi_dsi_multi_context ctx =3D { .dsi =3D ili->dsi }; - int ret; =20 ili9882t_switch_page(&ctx, 0x00); - if (ctx.accum_err) - return ctx.accum_err; =20 - ret =3D ili9882t_enter_sleep_mode(ili); - if (ret < 0) { - dev_err(panel->dev, "failed to set panel off: %d\n", ret); - return ret; - } + ili->dsi->mode_flags &=3D ~MIPI_DSI_MODE_LPM; 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Sat, 11 May 2024 16:00:30 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 12 May 2024 02:00:22 +0300 Subject: [PATCH v2 5/7] drm/panel: innolux-p079zca: use mipi_dsi_dcs_nop_multi() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240512-dsi-panels-upd-api-v2-5-e31ca14d102e@linaro.org> References: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> In-Reply-To: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> To: Douglas Anderson , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Sumit Semwal , Caleb Connolly , Marijn Suijten , Vinod Koul Cc: Cong Yang , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1404; i=dmitry.baryshkov@linaro.org; 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Reviewed-by: Douglas Anderson Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-innolux-p079zca.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c b/drivers/gpu/dr= m/panel/panel-innolux-p079zca.c index ade8bf7491ee..0691a27a0daa 100644 --- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c +++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c @@ -224,21 +224,14 @@ static const struct drm_display_mode innolux_p097pfg_= mode =3D { static void innolux_panel_write_multi(struct mipi_dsi_multi_context *ctx, const void *payload, size_t size) { - struct mipi_dsi_device *dsi =3D ctx->dsi; - struct device *dev =3D &dsi->dev; - mipi_dsi_generic_write_multi(ctx, payload, size); - if (ctx->accum_err) - return; =20 /* * Included by random guessing, because without this * (or at least, some delay), the panel sometimes * didn't appear to pick up the command sequence. */ - ctx->accum_err =3D mipi_dsi_dcs_nop(ctx->dsi); - if (ctx->accum_err) - dev_err(dev, "failed to send DCS nop: %d\n", ctx->accum_err); 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a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Remove conditional code and always use mipi_dsi_dcs_*multi() wrappers to simplify driver's init/exit code. This also includes passing context to the init_sequence() function instead of passing the DSI device. Reviewed-by: Douglas Anderson Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-novatek-nt36672e.c | 597 ++++++++++++---------= ---- 1 file changed, 284 insertions(+), 313 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672e.c b/drivers/gpu/d= rm/panel/panel-novatek-nt36672e.c index 9ce8df455232..e81a70147259 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36672e.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672e.c @@ -33,7 +33,7 @@ struct panel_desc { enum mipi_dsi_pixel_format format; unsigned int lanes; const char *panel_name; - int (*init_sequence)(struct mipi_dsi_device *dsi); + void (*init_sequence)(struct mipi_dsi_multi_context *ctx); }; =20 struct nt36672e_panel { @@ -49,297 +49,293 @@ static inline struct nt36672e_panel *to_nt36672e_pane= l(struct drm_panel *panel) return container_of(panel, struct nt36672e_panel, panel); } =20 -static int nt36672e_1080x2408_60hz_init(struct mipi_dsi_device *dsi) +static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ct= x) { - struct mipi_dsi_multi_context ctx =3D { .dsi =3D dsi }; - - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x89, 0x28, 0x00, 0x08, 0x00, 0x= aa, 0x02, + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0xc0, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0xc1, 0x89, 0x28, 0x00, 0x08, 0x00, 0xa= a, 0x02, 0x0e, 0x00, 0x2b, 0x00, 0x07, 0x0d, 0xb7, 0x0c, 0xb7); =20 - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x1b, 0xa0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x20); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x66); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x38); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x83); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x91); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x95, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x96, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf2, 0x64); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf3, 0x54); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf4, 0x64); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf5, 0x54); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf6, 0x64); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf7, 0x54); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf8, 0x64); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf9, 0x54); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x24); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x0c); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x1d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x2f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x2e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x2d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0b, 0x2c); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0x17); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x12, 0x13); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x13, 0x15); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x14); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0x16); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x17, 0x18); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x1d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x2f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x2e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x2d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x2c); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x17); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x13); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x15); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x14); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x16); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x18); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x1f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0x1f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x4d, 0x14); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x4e, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x4f, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x71, 0x30); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7a, 0x82); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7b, 0x8f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7d, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x82, 0x13); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x31); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x85, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x90, 0x13); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x31); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x93, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x94, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x95, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9c, 0xf4); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9d, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa0, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa2, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa3, 0x02); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa4, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa5, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xc0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xd9, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xe9, 0x02); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x25); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x22); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0xe4); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x66, 0xd8); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x68, 0x50); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6b, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x0d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6e, 0x48); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x72, 0x41); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x73, 0x4a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x74, 0xd0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x77, 0x62); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0x7e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7d, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x15); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x4d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xcf, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xef, 0x20); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf0, 0x84); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x26); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x83, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x85, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x88, 0x05); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8a, 0x1a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8b, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8c, 0x24); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8e, 0x42); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8f, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x90, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x91, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9a, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9b, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9c, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9d, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9e, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x27); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x68); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x81); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x81); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x94); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6e, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6f, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x70, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x71, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x72, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x75, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x76, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x77, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7d, 0x09); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x67); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x23); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x82, 0x09); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x83, 0x67); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x88, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x89, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa5, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa6, 0x23); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa7, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x02); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0xd3); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xeb, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xec, 0x28); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x2a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x91); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x20); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x50); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x70); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0xe0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0xa4); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1a, 0x78); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x23); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1e, 0x3e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x3e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x3e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x28, 0xfd); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x12); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0xe1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2d, 0x0a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x49); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x96); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0xff); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0xde); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x37, 0xf9); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0x45); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0xd9); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x49); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x4a, 0xf0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7a, 0x09); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7b, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0xf0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x83, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0xa4); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x88, 0x78); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x89, 0x23); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8b, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8c, 0x7d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8d, 0x7d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8e, 0x7d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x20); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x= 49, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xc2, 0x1b, 0xa0); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x20); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x66); + mipi_dsi_dcs_write_seq_multi(ctx, 0x06, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x07, 0x38); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2f, 0x83); + mipi_dsi_dcs_write_seq_multi(ctx, 0x69, 0x91); + mipi_dsi_dcs_write_seq_multi(ctx, 0x95, 0xd1); + mipi_dsi_dcs_write_seq_multi(ctx, 0x96, 0xd1); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf2, 0x64); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf3, 0x54); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf4, 0x64); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf5, 0x54); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf6, 0x64); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf7, 0x54); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf8, 0x64); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf9, 0x54); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x24); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x03, 0x0c); + mipi_dsi_dcs_write_seq_multi(ctx, 0x05, 0x1d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x08, 0x2f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x09, 0x2e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0a, 0x2d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0b, 0x2c); + mipi_dsi_dcs_write_seq_multi(ctx, 0x11, 0x17); + mipi_dsi_dcs_write_seq_multi(ctx, 0x12, 0x13); + mipi_dsi_dcs_write_seq_multi(ctx, 0x13, 0x15); + mipi_dsi_dcs_write_seq_multi(ctx, 0x15, 0x14); + mipi_dsi_dcs_write_seq_multi(ctx, 0x16, 0x16); + mipi_dsi_dcs_write_seq_multi(ctx, 0x17, 0x18); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1b, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1d, 0x1d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x20, 0x2f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x2e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x22, 0x2d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x23, 0x2c); + mipi_dsi_dcs_write_seq_multi(ctx, 0x29, 0x17); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2a, 0x13); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2b, 0x15); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2f, 0x14); + mipi_dsi_dcs_write_seq_multi(ctx, 0x30, 0x16); + mipi_dsi_dcs_write_seq_multi(ctx, 0x31, 0x18); + mipi_dsi_dcs_write_seq_multi(ctx, 0x32, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x34, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0x35, 0x1f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x36, 0x1f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x4d, 0x14); + mipi_dsi_dcs_write_seq_multi(ctx, 0x4e, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x4f, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x53, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x71, 0x30); + mipi_dsi_dcs_write_seq_multi(ctx, 0x79, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7a, 0x82); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7b, 0x8f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7d, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x80, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x81, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x82, 0x13); + mipi_dsi_dcs_write_seq_multi(ctx, 0x84, 0x31); + mipi_dsi_dcs_write_seq_multi(ctx, 0x85, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x86, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x87, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x90, 0x13); + mipi_dsi_dcs_write_seq_multi(ctx, 0x92, 0x31); + mipi_dsi_dcs_write_seq_multi(ctx, 0x93, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x94, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x95, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9c, 0xf4); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9d, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa0, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa2, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa3, 0x02); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa4, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa5, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0xc6, 0xc0); + mipi_dsi_dcs_write_seq_multi(ctx, 0xc9, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0xd9, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0xe9, 0x02); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x25); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x18, 0x22); + mipi_dsi_dcs_write_seq_multi(ctx, 0x19, 0xe4); + mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x66, 0xd8); + mipi_dsi_dcs_write_seq_multi(ctx, 0x68, 0x50); + mipi_dsi_dcs_write_seq_multi(ctx, 0x69, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6b, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6d, 0x0d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6e, 0x48); + mipi_dsi_dcs_write_seq_multi(ctx, 0x72, 0x41); + mipi_dsi_dcs_write_seq_multi(ctx, 0x73, 0x4a); + mipi_dsi_dcs_write_seq_multi(ctx, 0x74, 0xd0); + mipi_dsi_dcs_write_seq_multi(ctx, 0x77, 0x62); + mipi_dsi_dcs_write_seq_multi(ctx, 0x79, 0x7e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7d, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7e, 0x15); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7f, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x84, 0x4d); + mipi_dsi_dcs_write_seq_multi(ctx, 0xcf, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0xd6, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0xd7, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0xef, 0x20); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x84); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x26); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x81, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x83, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x84, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0x85, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x86, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0x87, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x88, 0x05); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8a, 0x1a); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8b, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8c, 0x24); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8e, 0x42); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8f, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x90, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x91, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9a, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9b, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9c, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9d, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9e, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x27); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x68); + mipi_dsi_dcs_write_seq_multi(ctx, 0x20, 0x81); + mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x6a); + mipi_dsi_dcs_write_seq_multi(ctx, 0x25, 0x81); + mipi_dsi_dcs_write_seq_multi(ctx, 0x26, 0x94); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6e, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6f, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x70, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x71, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x72, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x75, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x76, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x77, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7d, 0x09); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7e, 0x67); + mipi_dsi_dcs_write_seq_multi(ctx, 0x80, 0x23); + mipi_dsi_dcs_write_seq_multi(ctx, 0x82, 0x09); + mipi_dsi_dcs_write_seq_multi(ctx, 0x83, 0x67); + mipi_dsi_dcs_write_seq_multi(ctx, 0x88, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x89, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa5, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa6, 0x23); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa7, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xb6, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0xe5, 0x02); + mipi_dsi_dcs_write_seq_multi(ctx, 0xe6, 0xd3); + mipi_dsi_dcs_write_seq_multi(ctx, 0xeb, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0xec, 0x28); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x2a); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x00, 0x91); + mipi_dsi_dcs_write_seq_multi(ctx, 0x03, 0x20); + mipi_dsi_dcs_write_seq_multi(ctx, 0x07, 0x50); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0a, 0x70); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0c, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0d, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0f, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x11, 0xe0); + mipi_dsi_dcs_write_seq_multi(ctx, 0x15, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x16, 0xa4); + mipi_dsi_dcs_write_seq_multi(ctx, 0x19, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1a, 0x78); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1b, 0x23); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1d, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1e, 0x3e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1f, 0x3e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x20, 0x3e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x28, 0xfd); + mipi_dsi_dcs_write_seq_multi(ctx, 0x29, 0x12); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2a, 0xe1); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2d, 0x0a); + mipi_dsi_dcs_write_seq_multi(ctx, 0x30, 0x49); + mipi_dsi_dcs_write_seq_multi(ctx, 0x33, 0x96); + mipi_dsi_dcs_write_seq_multi(ctx, 0x34, 0xff); + mipi_dsi_dcs_write_seq_multi(ctx, 0x35, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x36, 0xde); + mipi_dsi_dcs_write_seq_multi(ctx, 0x37, 0xf9); + mipi_dsi_dcs_write_seq_multi(ctx, 0x38, 0x45); + mipi_dsi_dcs_write_seq_multi(ctx, 0x39, 0xd9); + mipi_dsi_dcs_write_seq_multi(ctx, 0x3a, 0x49); + mipi_dsi_dcs_write_seq_multi(ctx, 0x4a, 0xf0); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7a, 0x09); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7b, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7f, 0xf0); + mipi_dsi_dcs_write_seq_multi(ctx, 0x83, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x84, 0xa4); + mipi_dsi_dcs_write_seq_multi(ctx, 0x87, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x88, 0x78); + mipi_dsi_dcs_write_seq_multi(ctx, 0x89, 0x23); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8b, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8c, 0x7d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8d, 0x7d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8e, 0x7d); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x20); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x4= 9, 0x00, 0x6a, 0x00, 0x89, 0x00, 0x9f, 0x00, 0xb6, 0x00, 0xc8); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x= 3a, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x3= a, 0x01, 0x7a, 0x01, 0xa9, 0x01, 0xf2, 0x02, 0x2d, 0x02, 0x2e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02, 0x64, 0x02, 0xa3, 0x02, 0x= ca, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb2, 0x02, 0x64, 0x02, 0xa3, 0x02, 0xc= a, 0x03, 0x00, 0x03, 0x1e, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x03, 0x7d, 0x03, 0x93, 0x03, 0x= ab, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb3, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xa= b, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x= 51, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x5= 1, 0x00, 0x71, 0x00, 0x90, 0x00, 0xa7, 0x00, 0xbf, 0x00, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x00, 0xe2, 0x01, 0x1a, 0x01, 0x= 43, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb5, 0x00, 0xe2, 0x01, 0x1a, 0x01, 0x4= 3, 0x01, 0x83, 0x01, 0xb2, 0x01, 0xfa, 0x02, 0x34, 0x02, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x02, 0x6b, 0x02, 0xa8, 0x02, 0x= d0, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb6, 0x02, 0x6b, 0x02, 0xa8, 0x02, 0xd= 0, 0x03, 0x03, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5b, 0x03, 0x6b); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x03, 0x7e, 0x03, 0x94, 0x03, 0x= ac, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb7, 0x03, 0x7e, 0x03, 0x94, 0x03, 0xa= c, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x= 51, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x5= 1, 0x00, 0x72, 0x00, 0x92, 0x00, 0xa8, 0x00, 0xbf, 0x00, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x00, 0xe2, 0x01, 0x18, 0x01, 0x= 42, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb9, 0x00, 0xe2, 0x01, 0x18, 0x01, 0x4= 2, 0x01, 0x81, 0x01, 0xaf, 0x01, 0xf5, 0x02, 0x2f, 0x02, 0x31); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x02, 0x68, 0x02, 0xa6, 0x02, 0x= cd, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xba, 0x02, 0x68, 0x02, 0xa6, 0x02, 0xc= d, 0x03, 0x01, 0x03, 0x1f, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0x= ab, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xa= b, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x21); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x= 49, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x21); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x4= 9, 0x00, 0x6a, 0x00, 0x89, 0x00, 0x9f, 0x00, 0xb6, 0x00, 0xc8); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x= 3a, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x3= a, 0x01, 0x7a, 0x01, 0xa9, 0x01, 0xf2, 0x02, 0x2d, 0x02, 0x2e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02, 0x64, 0x02, 0xa3, 0x02, 0x= ca, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb2, 0x02, 0x64, 0x02, 0xa3, 0x02, 0xc= a, 0x03, 0x00, 0x03, 0x1e, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x03, 0x7d, 0x03, 0x93, 0x03, 0x= ab, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb3, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xa= b, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x= 51, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x5= 1, 0x00, 0x71, 0x00, 0x90, 0x00, 0xa7, 0x00, 0xbf, 0x00, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x00, 0xe2, 0x01, 0x1a, 0x01, 0x= 43, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb5, 0x00, 0xe2, 0x01, 0x1a, 0x01, 0x4= 3, 0x01, 0x83, 0x01, 0xb2, 0x01, 0xfa, 0x02, 0x34, 0x02, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x02, 0x6b, 0x02, 0xa8, 0x02, 0x= d0, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb6, 0x02, 0x6b, 0x02, 0xa8, 0x02, 0xd= 0, 0x03, 0x03, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5b, 0x03, 0x6b); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x03, 0x7e, 0x03, 0x94, 0x03, 0x= ac, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb7, 0x03, 0x7e, 0x03, 0x94, 0x03, 0xa= c, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x= 51, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x5= 1, 0x00, 0x72, 0x00, 0x92, 0x00, 0xa8, 0x00, 0xbf, 0x00, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x00, 0xe2, 0x01, 0x18, 0x01, 0x= 42, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb9, 0x00, 0xe2, 0x01, 0x18, 0x01, 0x4= 2, 0x01, 0x81, 0x01, 0xaf, 0x01, 0xf5, 0x02, 0x2f, 0x02, 0x31); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x02, 0x68, 0x02, 0xa6, 0x02, 0x= cd, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xba, 0x02, 0x68, 0x02, 0xa6, 0x02, 0xc= d, 0x03, 0x01, 0x03, 0x1f, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0x= ab, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xa= b, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x2c); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0x1f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x1f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6a, 0x14); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6b, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6c, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x54, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x56, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x58, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x59, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0xf0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x5a, 0x00); - - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x51, 0xff); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x24); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x01); - - return ctx.accum_err; + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x2c); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x61, 0x1f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x62, 0x1f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7e, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6a, 0x14); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6b, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6c, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6d, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x53, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x54, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x55, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x56, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x58, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x59, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0xf0); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x5a, 0x00); + + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x51, 0xff); + mipi_dsi_dcs_write_seq_multi(ctx, 0x53, 0x24); + mipi_dsi_dcs_write_seq_multi(ctx, 0x55, 0x01); } =20 static int nt36672e_power_on(struct nt36672e_panel *ctx) @@ -381,68 +377,46 @@ static int nt36672e_power_off(struct nt36672e_panel *= ctx) return ret; } =20 -static int nt36672e_on(struct nt36672e_panel *ctx) +static int nt36672e_on(struct nt36672e_panel *nt36672e) { - struct mipi_dsi_device *dsi =3D ctx->dsi; - const struct panel_desc *desc =3D ctx->desc; - int ret =3D 0; + struct mipi_dsi_multi_context ctx =3D { .dsi =3D nt36672e->dsi }; + const struct panel_desc *desc =3D nt36672e->desc; =20 - dsi->mode_flags |=3D MIPI_DSI_MODE_LPM; + nt36672e->dsi->mode_flags |=3D MIPI_DSI_MODE_LPM; =20 - if (desc->init_sequence) { - ret =3D desc->init_sequence(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "panel init sequence failed: %d\n", ret); - return ret; - } - } + if (desc->init_sequence) + desc->init_sequence(&ctx); =20 - ret =3D mipi_dsi_dcs_exit_sleep_mode(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "Failed to exit sleep mode: %d\n", ret); - return ret; - } - msleep(120); + mipi_dsi_dcs_exit_sleep_mode_multi(&ctx); + mipi_dsi_msleep(&ctx, 120); =20 - ret =3D mipi_dsi_dcs_set_display_on(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "Failed to set display on: %d\n", ret); - return ret; - } - msleep(100); + mipi_dsi_dcs_set_display_on_multi(&ctx); =20 - return 0; + mipi_dsi_msleep(&ctx, 100); + + return ctx.accum_err; } =20 -static int nt36672e_off(struct nt36672e_panel *ctx) +static int nt36672e_off(struct nt36672e_panel *panel) { - struct mipi_dsi_device *dsi =3D ctx->dsi; - int ret =3D 0; + struct mipi_dsi_multi_context ctx =3D { .dsi =3D panel->dsi }; =20 - dsi->mode_flags &=3D ~MIPI_DSI_MODE_LPM; + panel->dsi->mode_flags &=3D ~MIPI_DSI_MODE_LPM; =20 - ret =3D mipi_dsi_dcs_set_display_off(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "Failed to set display off: %d\n", ret); - return ret; - } - msleep(20); + mipi_dsi_dcs_set_display_off_multi(&ctx); + mipi_dsi_msleep(&ctx, 20); =20 - ret =3D mipi_dsi_dcs_enter_sleep_mode(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "Failed to enter sleep mode: %d\n", ret); - return ret; - } - msleep(60); + mipi_dsi_dcs_enter_sleep_mode_multi(&ctx); + mipi_dsi_msleep(&ctx, 60); =20 - return 0; + return ctx.accum_err; } =20 static int nt36672e_panel_prepare(struct drm_panel *panel) { struct nt36672e_panel *ctx =3D to_nt36672e_panel(panel); struct mipi_dsi_device *dsi =3D ctx->dsi; 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Sat, 11 May 2024 16:00:31 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-521f38d3717sm1134222e87.173.2024.05.11.16.00.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 May 2024 16:00:31 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 12 May 2024 02:00:24 +0300 Subject: [PATCH v2 7/7] drm/panel: lg-sw43408: use new streamlined MIPI DSI API Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240512-dsi-panels-upd-api-v2-7-e31ca14d102e@linaro.org> References: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> In-Reply-To: <20240512-dsi-panels-upd-api-v2-0-e31ca14d102e@linaro.org> To: Douglas Anderson , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Sumit Semwal , Caleb Connolly , Marijn Suijten , Vinod Koul Cc: Cong Yang , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5815; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=OgCl745YGNA8tkD2Ib/h4hAsQgMXN7Ouw6Gh4P8Oqr4=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmP/iJ9AtO2NUiQ/shLEjW1FgXeYS1lB99HJoMX gT0ERuhktKJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZj/4iQAKCRCLPIo+Aiko 1bAYB/0em0c6mMAcvfItGDeSx6pM4OR2pgT65OKPxu1eIMWRA/SqpP/q596FmVGhhe1gBFRDdXw IDlpEQpE3qucx1ZM0pQXEULCVLaN52/h60g5xS8WOZASORELPpe+l3tuClkTofsOpnQ0LvnBz51 UrCttNK9iuJMpj97rSHsufpaQHDQsgaFr34fMdBAq2kIAEEVPJPE4uo7vq57RJORyWEZLRNgcxf 2B+MB7OvFIHzfzelPJhTGAKK4KmLnT9/PXiDphOeR4vRVAhQaSeFnZXSC6RsDpMUdM7rFbKAXga EZALKYcIlSJ6iUYXgVLU72da7nQi81w9CjUy0SmFcnlWB/cr X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Use newer mipi_dsi_*_multi() functions in order to simplify and cleanup panel's prepare() and unprepare() functions. Reviewed-by: Douglas Anderson Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 95 +++++++++++++---------------= ---- 1 file changed, 37 insertions(+), 58 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/pan= el/panel-lg-sw43408.c index 67a98ac508f8..f3dcc39670ea 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -40,104 +40,83 @@ static inline struct sw43408_panel *to_panel_info(stru= ct drm_panel *panel) =20 static int sw43408_unprepare(struct drm_panel *panel) { - struct sw43408_panel *ctx =3D to_panel_info(panel); + struct sw43408_panel *sw43408 =3D to_panel_info(panel); + struct mipi_dsi_multi_context ctx =3D { .dsi =3D sw43408->link }; int ret; =20 - ret =3D mipi_dsi_dcs_set_display_off(ctx->link); - if (ret < 0) - dev_err(panel->dev, "set_display_off cmd failed ret =3D %d\n", ret); + mipi_dsi_dcs_set_display_off_multi(&ctx); =20 - ret =3D mipi_dsi_dcs_enter_sleep_mode(ctx->link); - if (ret < 0) - dev_err(panel->dev, "enter_sleep cmd failed ret =3D %d\n", ret); + mipi_dsi_dcs_enter_sleep_mode_multi(&ctx); =20 - msleep(100); + mipi_dsi_msleep(&ctx, 100); =20 - gpiod_set_value(ctx->reset_gpio, 1); + gpiod_set_value(sw43408->reset_gpio, 1); + + ret =3D regulator_bulk_disable(ARRAY_SIZE(sw43408->supplies), sw43408->su= pplies); =20 - return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); + return ret ? : ctx.accum_err; } =20 static int sw43408_program(struct drm_panel *panel) { - struct sw43408_panel *ctx =3D to_panel_info(panel); + struct sw43408_panel *sw43408 =3D to_panel_info(panel); + struct mipi_dsi_multi_context ctx =3D { .dsi =3D sw43408->link }; struct drm_dsc_picture_parameter_set pps; - int ret; =20 - mipi_dsi_dcs_write_seq(ctx->link, MIPI_DCS_SET_GAMMA_CURVE, 0x02); + mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x02); =20 - ret =3D mipi_dsi_dcs_set_tear_on(ctx->link, MIPI_DSI_DCS_TEAR_MODE_VBLANK= ); - if (ret < 0) { - dev_err(panel->dev, "Failed to set tearing: %d\n", ret); - return ret; - } + mipi_dsi_dcs_set_tear_on_multi(&ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); =20 - mipi_dsi_dcs_write_seq(ctx->link, 0x53, 0x0c, 0x30); - mipi_dsi_dcs_write_seq(ctx->link, 0x55, 0x00, 0x70, 0xdf, 0x00, 0x70, 0xd= f); - mipi_dsi_dcs_write_seq(ctx->link, 0xf7, 0x01, 0x49, 0x0c); + mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x0c, 0x30); + mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x00, 0x70, 0xdf, 0x00, 0x70, 0x= df); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xf7, 0x01, 0x49, 0x0c); =20 - ret =3D mipi_dsi_dcs_exit_sleep_mode(ctx->link); - if (ret < 0) { - dev_err(panel->dev, "Failed to exit sleep mode: %d\n", ret); - return ret; - } + mipi_dsi_dcs_exit_sleep_mode_multi(&ctx); =20 - msleep(135); + mipi_dsi_msleep(&ctx, 135); =20 /* COMPRESSION_MODE moved after setting the PPS */ =20 - mipi_dsi_dcs_write_seq(ctx->link, 0xb0, 0xac); - mipi_dsi_dcs_write_seq(ctx->link, 0xe5, + mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0xac); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x00, 0x3a, 0x00, 0x3a, 0x00, 0x0e, 0x10); - mipi_dsi_dcs_write_seq(ctx->link, 0xb5, + mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x75, 0x60, 0x2d, 0x5d, 0x80, 0x00, 0x0a, 0x0b, 0x00, 0x05, 0x0b, 0x00, 0x80, 0x0d, 0x0e, 0x40, 0x00, 0x0c, 0x00, 0x16, 0x00, 0xb8, 0x00, 0x80, 0x0d, 0x0e, 0x40, 0x00, 0x0c, 0x00, 0x16, 0x00, 0xb8, 0x00, 0x81, 0x00, 0x03, 0x03, 0x03, 0x01, 0x01); - msleep(85); - mipi_dsi_dcs_write_seq(ctx->link, 0xcd, + mipi_dsi_msleep(&ctx, 85); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0x00, 0x00, 0x00, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x16, 0x16); - mipi_dsi_dcs_write_seq(ctx->link, 0xcb, 0x80, 0x5c, 0x07, 0x03, 0x28); - mipi_dsi_dcs_write_seq(ctx->link, 0xc0, 0x02, 0x02, 0x0f); - mipi_dsi_dcs_write_seq(ctx->link, 0x55, 0x04, 0x61, 0xdb, 0x04, 0x70, 0xd= b); - mipi_dsi_dcs_write_seq(ctx->link, 0xb0, 0xca); - - ret =3D mipi_dsi_dcs_set_display_on(ctx->link); - if (ret < 0) { - dev_err(panel->dev, "Failed to set display on: %d\n", ret); - return ret; - } + mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x80, 0x5c, 0x07, 0x03, 0x28); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x02, 0x02, 0x0f); + mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x04, 0x61, 0xdb, 0x04, 0x70, 0x= db); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0xca); =20 - msleep(50); + mipi_dsi_dcs_set_display_on_multi(&ctx); =20 - ctx->link->mode_flags &=3D ~MIPI_DSI_MODE_LPM; + mipi_dsi_msleep(&ctx, 50); =20 - drm_dsc_pps_payload_pack(&pps, ctx->link->dsc); - ret =3D mipi_dsi_picture_parameter_set(ctx->link, &pps); - if (ret < 0) { - dev_err(panel->dev, "Failed to set PPS: %d\n", ret); - return ret; - } + sw43408->link->mode_flags &=3D ~MIPI_DSI_MODE_LPM; + + drm_dsc_pps_payload_pack(&pps, sw43408->link->dsc); =20 - ctx->link->mode_flags |=3D MIPI_DSI_MODE_LPM; + mipi_dsi_picture_parameter_set_multi(&ctx, &pps); + + sw43408->link->mode_flags |=3D MIPI_DSI_MODE_LPM; =20 /* * This panel uses PPS selectors with offset: * PPS 1 if pps_identifier is 0 * PPS 2 if pps_identifier is 1 */ - ret =3D mipi_dsi_compression_mode_ext(ctx->link, true, + mipi_dsi_compression_mode_ext_multi(&ctx, true, MIPI_DSI_COMPRESSION_DSC, 1); - if (ret < 0) { - dev_err(panel->dev, "Failed to set compression mode: %d\n", ret); - return ret; - } - - return 0; + return ctx.accum_err; } =20 static int sw43408_prepare(struct drm_panel *panel) --=20 2.39.2