From nobody Sun Dec 14 12:11:03 2025 Received: from mail-yb1-f201.google.com (mail-yb1-f201.google.com [209.85.219.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F11F4D59E for ; Fri, 10 May 2024 00:24:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715300689; cv=none; b=cpS7fWqmyWwd7BzHFrihmjR1OHqf6Y/uWh5qR9ZtXOYjZ2CGbhEJzrZPqoK0saM63ZkcLOPvH9Ni8DwgTd6FX7fu2aWwDJaOyWUIXDfJAtI2mp2J27+bA/bXJSzyQiHhEX8H58sWElRRPaV8TAEJ/JQrFk5JEuqqrXc3bF8zOe0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715300689; c=relaxed/simple; bh=h9T/hWcYd16AoD1la+Akzb6wRgZknIdJh4UH2m1KpFA=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=n8h9uucKJUtMsBxczLBHX2LWqZ53S7IqLMPtj2kCwlhHmwJQ9asgXaEH1GkE+SZMTTSARSZYXleRs5Aud2iQ3YWYhlf/Lba5Wi/pDw5it+XdGobu54kMHxrmKgEIRxina++Ca2ydZgJzxwXTlOyGnfxDQ3yfgJ4cVMvL8pTGMnM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--yabinc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=VAVUeDj/; arc=none smtp.client-ip=209.85.219.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--yabinc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="VAVUeDj/" Received: by mail-yb1-f201.google.com with SMTP id 3f1490d57ef6-de604d35ec0so2512598276.3 for ; Thu, 09 May 2024 17:24:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1715300686; x=1715905486; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=QEhmGuC8oUTZwVi2h6WErUBS5w6ne3vZ9G77u3QpAiI=; b=VAVUeDj/NozbUkhyaeIqM3HbzfJeL8jTI57GPlp/P+07ANy1gne7h2jFkDcHqyG8mz aDk2uML1i3ARBLc7o1ytDKNONM0xh5oocmR6rd53OT6nHKY5KFB7VNtTz9ZcbGz5Ha6n AyNoyWhvSRBqfgcm4cdChry4j6YzbcIQU/fxT+fS6J6AU5YvEMZ/XZar/I+Ho4IJpBm2 D9Rz4KspliYpFgCiivuCVNcBJnMAt1jN5Xp8g3Cb+iOsxLi6oDQxzz1GIjR12Bm/3Dc/ 59gz+aZ9IuFqwbp/PCsw1J5UBcVU7A+6ltktr6BoncafWgSe0EIgDsSlpkdyeUly+ba/ dvow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715300686; x=1715905486; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=QEhmGuC8oUTZwVi2h6WErUBS5w6ne3vZ9G77u3QpAiI=; b=N5VBNGKslYyPSl1QYfiyhth+1CpoQABDGS5GghcZCXy5szi8Di1ZHqFPa21K96+tNC 59EirX4P+413ZMXKp4mrEZV+LcnyY7DbNmGysxSewUW4FM7+MtP06iGV5g8zszLbXIi7 sJptLY1QFC0fhYFUbI5Nctx54d2uExeck/yP5XdS4NikdWr+5xBnX3Oddp49sny8sikK pFliH838pWojj4Ay7nVR9ws1AQE7+Wyrp3LSR57Hw6tnaPAPTdrKwp/2P21kWnHbJdBf BIJDvxarg1W4UYVzCNoTpN/Oc4IskqcqUq2RUY0jFWmgTMfbQd3VolOEGdU7kU9mmAXv 7jkg== X-Forwarded-Encrypted: i=1; AJvYcCWXwUI9FfqCp34nbYU8JTpM/I1T91ZnsjGLABrPf8krMg0YEIoDjvr4wdPNAbYP6fC5FVP9B+jBHGAHzArpmEbWU2vB+/grl6l9uDPb X-Gm-Message-State: AOJu0YxzQ0puZkWYpcR++g1ijLL5fWE0tVIy/8SCZ+kVyj8YNu+SFvig vCtlmlHd+wct+XITo8FPSthDREqtVX3sz2zfix1JrzF4n5kKlNrzAwdt3ao9MKgN+gRhtXRrQrh 7 X-Google-Smtp-Source: AGHT+IEOhxkFEZFd9IOgCTNmtdNHgxHs7/BU0QBCUG8MINyjgRLrnm4Z+DffoCYp+ZKNgxRqYw2k4D3ACuc= X-Received: from yabinc-desktop.mtv.corp.google.com ([2620:15c:211:202:1b7d:8132:c198:e24f]) (user=yabinc job=sendgmr) by 2002:a05:6902:110c:b0:de5:8427:d66e with SMTP id 3f1490d57ef6-dee4f38b7c0mr299253276.11.1715300686192; Thu, 09 May 2024 17:24:46 -0700 (PDT) Date: Thu, 9 May 2024 17:24:22 -0700 In-Reply-To: <20240510002424.1277314-1-yabinc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240510002424.1277314-1-yabinc@google.com> X-Mailer: git-send-email 2.45.0.118.g7fe29c98d7-goog Message-ID: <20240510002424.1277314-2-yabinc@google.com> Subject: [PATCH v3 1/3] perf/core: Save raw sample data conditionally based on sample type From: Yabin Cui To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter Cc: linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org, Yabin Cui Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently, space for raw sample data is always allocated within sample records for both BPF output and tracepoint events. This leads to unused space in sample records when raw sample data is not requested. This patch checks sample type of an event before saving raw sample data in both BPF output and tracepoint event handling logic. Raw sample data will only be saved if explicitly requested, reducing overhead when it is not needed. Fixes: 0a9081cf0a11 ("perf/core: Add perf_sample_save_raw_data() helper") Signed-off-by: Yabin Cui --- arch/s390/kernel/perf_cpum_cf.c | 2 +- arch/s390/kernel/perf_pai_crypto.c | 2 +- arch/s390/kernel/perf_pai_ext.c | 2 +- arch/x86/events/amd/ibs.c | 2 +- include/linux/perf_event.h | 4 ++++ kernel/events/core.c | 35 +++++++++++++++--------------- kernel/trace/bpf_trace.c | 11 +++++----- 7 files changed, 32 insertions(+), 26 deletions(-) diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_c= f.c index 41ed6e0f0a2a..c7fb99cb1e15 100644 --- a/arch/s390/kernel/perf_cpum_cf.c +++ b/arch/s390/kernel/perf_cpum_cf.c @@ -971,7 +971,7 @@ static int cfdiag_push_sample(struct perf_event *event, if (event->attr.sample_type & PERF_SAMPLE_RAW) { raw.frag.size =3D cpuhw->usedss; raw.frag.data =3D cpuhw->stop; - perf_sample_save_raw_data(&data, &raw); + perf_sample_save_raw_data(&data, event, &raw); } =20 overflow =3D perf_event_overflow(event, &data, ®s); diff --git a/arch/s390/kernel/perf_pai_crypto.c b/arch/s390/kernel/perf_pai= _crypto.c index 4ad472d130a3..2fb8aeba4872 100644 --- a/arch/s390/kernel/perf_pai_crypto.c +++ b/arch/s390/kernel/perf_pai_crypto.c @@ -444,7 +444,7 @@ static int paicrypt_push_sample(size_t rawsize, struct = paicrypt_map *cpump, if (event->attr.sample_type & PERF_SAMPLE_RAW) { raw.frag.size =3D rawsize; raw.frag.data =3D cpump->save; - perf_sample_save_raw_data(&data, &raw); + perf_sample_save_raw_data(&data, event, &raw); } =20 overflow =3D perf_event_overflow(event, &data, ®s); diff --git a/arch/s390/kernel/perf_pai_ext.c b/arch/s390/kernel/perf_pai_ex= t.c index a6da7e0cc7a6..b2914df2107a 100644 --- a/arch/s390/kernel/perf_pai_ext.c +++ b/arch/s390/kernel/perf_pai_ext.c @@ -458,7 +458,7 @@ static int paiext_push_sample(size_t rawsize, struct pa= iext_map *cpump, if (event->attr.sample_type & PERF_SAMPLE_RAW) { raw.frag.size =3D rawsize; raw.frag.data =3D cpump->save; - perf_sample_save_raw_data(&data, &raw); + perf_sample_save_raw_data(&data, event, &raw); } =20 overflow =3D perf_event_overflow(event, &data, ®s); diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c index e91970b01d62..c3a2f6f57770 100644 --- a/arch/x86/events/amd/ibs.c +++ b/arch/x86/events/amd/ibs.c @@ -1118,7 +1118,7 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_= ibs, struct pt_regs *iregs) .data =3D ibs_data.data, }, }; - perf_sample_save_raw_data(&data, &raw); + perf_sample_save_raw_data(&data, event, &raw); } =20 if (perf_ibs =3D=3D &perf_ibs_op) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index d2a15c0c6f8a..9fc55193ff99 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -1240,12 +1240,16 @@ static inline void perf_sample_save_callchain(struc= t perf_sample_data *data, } =20 static inline void perf_sample_save_raw_data(struct perf_sample_data *data, + struct perf_event *event, struct perf_raw_record *raw) { struct perf_raw_frag *frag =3D &raw->frag; u32 sum =3D 0; int size; =20 + if (!(event->attr.sample_type & PERF_SAMPLE_RAW)) + return; + do { sum +=3D frag->size; if (perf_raw_frag_last(frag)) diff --git a/kernel/events/core.c b/kernel/events/core.c index 724e6d7e128f..3031cade53bb 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -10120,9 +10120,9 @@ static struct pmu perf_tracepoint =3D { }; =20 static int perf_tp_filter_match(struct perf_event *event, - struct perf_sample_data *data) + struct perf_raw_record *raw) { - void *record =3D data->raw->frag.data; + void *record =3D raw->frag.data; =20 /* only top level events have filters set */ if (event->parent) @@ -10134,7 +10134,7 @@ static int perf_tp_filter_match(struct perf_event *= event, } =20 static int perf_tp_event_match(struct perf_event *event, - struct perf_sample_data *data, + struct perf_raw_record *raw, struct pt_regs *regs) { if (event->hw.state & PERF_HES_STOPPED) @@ -10145,7 +10145,7 @@ static int perf_tp_event_match(struct perf_event *e= vent, if (event->attr.exclude_kernel && !user_mode(regs)) return 0; =20 - if (!perf_tp_filter_match(event, data)) + if (!perf_tp_filter_match(event, raw)) return 0; =20 return 1; @@ -10171,6 +10171,7 @@ EXPORT_SYMBOL_GPL(perf_trace_run_bpf_submit); static void __perf_tp_event_target_task(u64 count, void *record, struct pt_regs *regs, struct perf_sample_data *data, + struct perf_raw_record *raw, struct perf_event *event) { struct trace_entry *entry =3D record; @@ -10180,13 +10181,17 @@ static void __perf_tp_event_target_task(u64 count= , void *record, /* Cannot deliver synchronous signal to other task. */ if (event->attr.sigtrap) return; - if (perf_tp_event_match(event, data, regs)) + if (perf_tp_event_match(event, raw, regs)) { + perf_sample_data_init(data, 0, 0); + perf_sample_save_raw_data(data, event, raw); perf_swevent_event(event, count, data, regs); + } } =20 static void perf_tp_event_target_task(u64 count, void *record, struct pt_regs *regs, struct perf_sample_data *data, + struct perf_raw_record *raw, struct perf_event_context *ctx) { unsigned int cpu =3D smp_processor_id(); @@ -10194,15 +10199,15 @@ static void perf_tp_event_target_task(u64 count, = void *record, struct perf_event *event, *sibling; =20 perf_event_groups_for_cpu_pmu(event, &ctx->pinned_groups, cpu, pmu) { - __perf_tp_event_target_task(count, record, regs, data, event); + __perf_tp_event_target_task(count, record, regs, data, raw, event); for_each_sibling_event(sibling, event) - __perf_tp_event_target_task(count, record, regs, data, sibling); + __perf_tp_event_target_task(count, record, regs, data, raw, sibling); } =20 perf_event_groups_for_cpu_pmu(event, &ctx->flexible_groups, cpu, pmu) { - __perf_tp_event_target_task(count, record, regs, data, event); + __perf_tp_event_target_task(count, record, regs, data, raw, event); for_each_sibling_event(sibling, event) - __perf_tp_event_target_task(count, record, regs, data, sibling); + __perf_tp_event_target_task(count, record, regs, data, raw, sibling); } } =20 @@ -10220,15 +10225,10 @@ void perf_tp_event(u16 event_type, u64 count, voi= d *record, int entry_size, }, }; =20 - perf_sample_data_init(&data, 0, 0); - perf_sample_save_raw_data(&data, &raw); - perf_trace_buf_update(record, event_type); =20 hlist_for_each_entry_rcu(event, head, hlist_entry) { - if (perf_tp_event_match(event, &data, regs)) { - perf_swevent_event(event, count, &data, regs); - + if (perf_tp_event_match(event, &raw, regs)) { /* * Here use the same on-stack perf_sample_data, * some members in data are event-specific and @@ -10238,7 +10238,8 @@ void perf_tp_event(u16 event_type, u64 count, void = *record, int entry_size, * because data->sample_flags is set. */ perf_sample_data_init(&data, 0, 0); - perf_sample_save_raw_data(&data, &raw); + perf_sample_save_raw_data(&data, event, &raw); + perf_swevent_event(event, count, &data, regs); } } =20 @@ -10255,7 +10256,7 @@ void perf_tp_event(u16 event_type, u64 count, void = *record, int entry_size, goto unlock; =20 raw_spin_lock(&ctx->lock); - perf_tp_event_target_task(count, record, regs, &data, ctx); + perf_tp_event_target_task(count, record, regs, &data, &raw, ctx); raw_spin_unlock(&ctx->lock); unlock: rcu_read_unlock(); diff --git a/kernel/trace/bpf_trace.c b/kernel/trace/bpf_trace.c index 9dc605f08a23..23bcf28ccc82 100644 --- a/kernel/trace/bpf_trace.c +++ b/kernel/trace/bpf_trace.c @@ -620,7 +620,8 @@ static const struct bpf_func_proto bpf_perf_event_read_= value_proto =3D { =20 static __always_inline u64 __bpf_perf_event_output(struct pt_regs *regs, struct bpf_map *map, - u64 flags, struct perf_sample_data *sd) + u64 flags, struct perf_raw_record *raw, + struct perf_sample_data *sd) { struct bpf_array *array =3D container_of(map, struct bpf_array, map); unsigned int cpu =3D smp_processor_id(); @@ -645,6 +646,8 @@ __bpf_perf_event_output(struct pt_regs *regs, struct bp= f_map *map, if (unlikely(event->oncpu !=3D cpu)) return -EOPNOTSUPP; =20 + perf_sample_save_raw_data(sd, event, raw); + return perf_event_output(event, sd, regs); } =20 @@ -688,9 +691,8 @@ BPF_CALL_5(bpf_perf_event_output, struct pt_regs *, reg= s, struct bpf_map *, map, } =20 perf_sample_data_init(sd, 0, 0); - perf_sample_save_raw_data(sd, &raw); =20 - err =3D __bpf_perf_event_output(regs, map, flags, sd); + err =3D __bpf_perf_event_output(regs, map, flags, &raw, sd); out: this_cpu_dec(bpf_trace_nest_level); preempt_enable(); @@ -749,9 +751,8 @@ u64 bpf_event_output(struct bpf_map *map, u64 flags, vo= id *meta, u64 meta_size, =20 perf_fetch_caller_regs(regs); perf_sample_data_init(sd, 0, 0); - perf_sample_save_raw_data(sd, &raw); =20 - ret =3D __bpf_perf_event_output(regs, map, flags, sd); + ret =3D __bpf_perf_event_output(regs, map, flags, &raw, sd); out: this_cpu_dec(bpf_event_output_nest_level); preempt_enable(); --=20 2.45.0.118.g7fe29c98d7-goog From nobody Sun Dec 14 12:11:03 2025 Received: from mail-yb1-f201.google.com (mail-yb1-f201.google.com [209.85.219.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 042D84E1D9 for ; Fri, 10 May 2024 00:24:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715300691; cv=none; b=BkESg9DKNrT0UXMJu6RS/ExPpolLuBgbkxFK2IfDeNLDsmPLdFdGMZt/0E3JCvSvoKEPXxLiygqsrTbIb9JE9SrGjqmz34RWh2z8Ep6Wf9BqbEDHd36xzfElwg3Woavd/dgrXmjNKbNiwBDOl9a5/1Zi685p+QAP8JVzwuezP6c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715300691; c=relaxed/simple; bh=xySRyI8fWJdGd1hvqSCkes+7dSi689oW4NVcWrWQsMc=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=An6fgl0bINk7DXDiNYEaFj/Z2p26P2NtWj8Fjfb+i8A8pds1wu3K4s+B67CtlUGJ3Kyohaqtb3qxiRqHLdgouNDiALXRpUKWaDk+az/90va0t5wmAVXCnyFldXlbDgYVQPARrVAtDgnS5c+U0oHYTi19wdycg3DGVKcvuLcbsnc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--yabinc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=BymfKGwF; arc=none smtp.client-ip=209.85.219.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--yabinc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="BymfKGwF" Received: by mail-yb1-f201.google.com with SMTP id 3f1490d57ef6-de54ccab44aso2651747276.3 for ; Thu, 09 May 2024 17:24:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1715300689; x=1715905489; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=v9grz5MJy3ZdpaUQrWKUMUhoIXt+TwKDu1fmP3H2Mh8=; b=BymfKGwFbC1BrDHa5dWfHA2ArKzw2sM9A/hITwqL6MGAExRIVzDFf8BWWw08pSCDUO RvZJ6Fz+1DLNKaV/pusm+iqoCfqzlTnhJd8vRIqdxuuFCjizQsz8Sfis3PIqiSzByBEn 7L26JpIBYiv0oWBsAQJG6Fw5rA6/gi3kx1pnPS0WSXXld1yQU565C8NfZnrsPZGUmjYt VcjKcIdEpx8BgXl3W5V/8atC97MSctnsTHVwngTf8vlLbKcXfAlixwPrHGQR1IwWw1WK rmf7sBdtLGJ/6JMWqmmqF1bR5cNhtTMs9hpG85fjlfattOpuLjl6AU46qQxnP3eR+joK Ea7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715300689; x=1715905489; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=v9grz5MJy3ZdpaUQrWKUMUhoIXt+TwKDu1fmP3H2Mh8=; b=hWDm+Xu68hE3+2r7AFjzijAm6+9tQkmKNLvmtkuI347VKFvHuGlcmTCGVGaD94z/9m IE0QdKNPtXqe0IFN+NQD74FulvAAKNju2VeKOKtD7dMEtcshnWlH1M84riLtajm7HOTg EsAPOn6EXKy/htu5Z1hcS9O6xSPeHdDghNrk/OamHqwD1hV0frv96fKYh+V+1uEp5IPE sov4ngZhpBm6X51OTepzeeZtFpORElBImnrC0zVXvZoeMGw+ZLc6aX208brlvQrMm3Lb /HoOBRPO5dwCsluVGMUuOuRnclpH6pOuBlUe0JfKo81AwwaOKa5OINFFffl2xw24ssVR 1NMQ== X-Forwarded-Encrypted: i=1; AJvYcCXqNwJLpjFyTevUdnW0iwDPz5Fh0CBBADQCz9sXvFDWXfO19ak+hJ00zLtjK+41n92ClG3irvIXS1EanGvrHLYeP6k4CbYCD1NYcaH+ X-Gm-Message-State: AOJu0Yyj09XOFxbWuI5qi4cXiOlfPomf1Ek1HYPDQYdsAbDtr6o3bDDy qTjwaWgSaloA0R0GkCWaSZzRozp+kNhC50xiAUseH4KJYzqokodw9G8BWxUKT287AYhat98l0Bj I X-Google-Smtp-Source: AGHT+IGCjAYEdtX2PjUjsteAeEyyldAln9sCGY44jxFAaAfnM+VcjksYoiNVv9hJlyfSG58JppgPM7UVvv0= X-Received: from yabinc-desktop.mtv.corp.google.com ([2620:15c:211:202:1b7d:8132:c198:e24f]) (user=yabinc job=sendgmr) by 2002:a05:6902:a8b:b0:dc7:7ce9:fb4d with SMTP id 3f1490d57ef6-dee4f322140mr265064276.12.1715300688967; Thu, 09 May 2024 17:24:48 -0700 (PDT) Date: Thu, 9 May 2024 17:24:23 -0700 In-Reply-To: <20240510002424.1277314-1-yabinc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240510002424.1277314-1-yabinc@google.com> X-Mailer: git-send-email 2.45.0.118.g7fe29c98d7-goog Message-ID: <20240510002424.1277314-3-yabinc@google.com> Subject: [PATCH v3 2/3] perf: core: Check sample_type in perf_sample_save_callchain From: Yabin Cui To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter Cc: linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org, Yabin Cui Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Check sample_type in perf_sample_save_callchain() to prevent saving callchain data when it isn't required. Suggested-by: Namhyung Kim Signed-off-by: Yabin Cui --- arch/x86/events/amd/ibs.c | 3 +-- arch/x86/events/intel/ds.c | 6 ++---- include/linux/perf_event.h | 3 +++ 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c index c3a2f6f57770..f02939655b2a 100644 --- a/arch/x86/events/amd/ibs.c +++ b/arch/x86/events/amd/ibs.c @@ -1129,8 +1129,7 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_= ibs, struct pt_regs *iregs) * recorded as part of interrupt regs. Thus we need to use rip from * interrupt regs while unwinding call stack. */ - if (event->attr.sample_type & PERF_SAMPLE_CALLCHAIN) - perf_sample_save_callchain(&data, event, iregs); + perf_sample_save_callchain(&data, event, iregs); =20 throttle =3D perf_event_overflow(event, &data, ®s); out: diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index e010bfed8417..c2b5585aa6d1 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -1655,8 +1655,7 @@ static void setup_pebs_fixed_sample_data(struct perf_= event *event, * previous PMI context or an (I)RET happened between the record and * PMI. */ - if (sample_type & PERF_SAMPLE_CALLCHAIN) - perf_sample_save_callchain(data, event, iregs); + perf_sample_save_callchain(data, event, iregs); =20 /* * We use the interrupt regs as a base because the PEBS record does not @@ -1823,8 +1822,7 @@ static void setup_pebs_adaptive_sample_data(struct pe= rf_event *event, * previous PMI context or an (I)RET happened between the record and * PMI. */ - if (sample_type & PERF_SAMPLE_CALLCHAIN) - perf_sample_save_callchain(data, event, iregs); + perf_sample_save_callchain(data, event, iregs); =20 *regs =3D *iregs; /* The ip in basic is EventingIP */ diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 9fc55193ff99..8617815456b0 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -1232,6 +1232,9 @@ static inline void perf_sample_save_callchain(struct = perf_sample_data *data, { int size =3D 1; =20 + if (!(event->attr.sample_type & PERF_SAMPLE_CALLCHAIN)) + return; + data->callchain =3D perf_callchain(event, regs); size +=3D data->callchain->nr; =20 --=20 2.45.0.118.g7fe29c98d7-goog From nobody Sun Dec 14 12:11:03 2025 Received: from mail-yw1-f201.google.com (mail-yw1-f201.google.com [209.85.128.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2ED950275 for ; Fri, 10 May 2024 00:24:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715300694; cv=none; b=rWlMUQH7/tWCqVaQkTA/SZsulZzafmvt4V1fp/JHl6u2B882RjBMEHTae3QqNoznuZqYrkjIOvxjzNMNdnpRwRGDImNNwYyL5kbWHabSgAKB2MlhpPX0gfboVIXbjx5T82rCM7+3ncnNybaYnQia/zd5lZ7ca0Wonk36h81G8sk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715300694; c=relaxed/simple; bh=cGpULC1B1HXkvRfCSn3TdeH+Xj5EwEpr4DGLnTg+pCQ=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=ZgWIgTqzoZJw0buXYC2h8tVjWpcZrdXAUjalbIn+N9du6r2l/ksF77N5PxEqBAzLtNraobQ3L7Rfs2PS/OPDgqo5pmNFlWlXn4geJzOLe8evSOLhIqZBkovI1QIyI1Mhf2z9Son/2HNWjUjjkF6bSACDGsI824uTredgzUIuHKQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--yabinc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=VO/sDB54; arc=none smtp.client-ip=209.85.128.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--yabinc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="VO/sDB54" Received: by mail-yw1-f201.google.com with SMTP id 00721157ae682-61be23bb01aso28388247b3.2 for ; Thu, 09 May 2024 17:24:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1715300692; x=1715905492; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=ot0TEs4BvD2J9QyiZT5bC39KllHj7+HFnRVXvIw7CTU=; b=VO/sDB54S3qSxJVTmyoabGla9DZoE2c3nPIwrgewoiuNBvaOau+sH0G8BuFGcpEpQO T653MqpMHs7sFSBrgomGTU0DJsPyVccE4wG6ZKzLYCFHR8mVnplA2bBZbpNLlrAQl6F7 Uibqgs0s0vruoPqNx4FKbueKm7DGE9blJO0oXtLBjuBvtSsDmYVzvzYe4fQMF4oYJIGe bNXjzJO6t06FyVPXNdoEdjZroYxXm7Cuh2gYIzFIKAeBMmL8ux8oE8FwIPV3CgD5UiV6 RTqqUDcV/fmgs7JIL7pahZd1vwa+GiMImqsPlNLazX/spy13kMf5TDA8Hc+gk9y3vWVm XH0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715300692; x=1715905492; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ot0TEs4BvD2J9QyiZT5bC39KllHj7+HFnRVXvIw7CTU=; b=EhuRnd1c6HGfVpPkRkg0S99IIZ3KYXr+DBC3RWBUxLwJfsCW2vM2z12dAzvsHoy7IK aRXAT9RYbgjdGM4p/2cozZwHnFQ2Y9WWOQv0hfw10e2dv1Ia/iM3Dln/KhpAIlgOTXR3 /uaYI4Fvfv/1VH6VvMRDul9NeymoFopPeYs6rpTpCDLTQ1rkVpB5KTODVnzH+R2nixjQ 8FRl7ZpgZnKtPc+IWMmvOMjWK8XPr2Yl+bf2ycb/5RU4qUzs+HRP9+o3lLRRsxaIzBJP ergFTqfWRBSVHkd641Qt60Tue+SrPD3l7aBGX0mlKr03zWF5lmpUiBMVMCV6cYpQK2AQ SyQg== X-Forwarded-Encrypted: i=1; AJvYcCVGrkAtNFrfNTg//KtbSQgwDoaEpM8RA2G65SHucpajGRqzWJxM7QAxHLvBLwdnIuCKKtjmM3QeCNNtgENa1esxhSKGkXwHuGJZiFqF X-Gm-Message-State: AOJu0YxbAP9sFChNuboGrUnm5NYdIOpylw7wciFaohjXojmCd0vKfQtE dzCfnmM6FhOF6F5J9VKLQD0EMEGfA6Rj0mE2J3O7MfQKI7RKPsuhn5bds1U8vt7QrOZgvT8PatV + X-Google-Smtp-Source: AGHT+IGtVehGREnSCfDjF50uDOFlHxuUhMLfztYum1ee5p3PcJUXmBGA2TuIoR4t/QC1CWL4ydsyKZkmBx8= X-Received: from yabinc-desktop.mtv.corp.google.com ([2620:15c:211:202:1b7d:8132:c198:e24f]) (user=yabinc job=sendgmr) by 2002:a05:690c:b10:b0:61c:89a4:dd5f with SMTP id 00721157ae682-622afcbec26mr3237517b3.0.1715300692087; Thu, 09 May 2024 17:24:52 -0700 (PDT) Date: Thu, 9 May 2024 17:24:24 -0700 In-Reply-To: <20240510002424.1277314-1-yabinc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240510002424.1277314-1-yabinc@google.com> X-Mailer: git-send-email 2.45.0.118.g7fe29c98d7-goog Message-ID: <20240510002424.1277314-4-yabinc@google.com> Subject: [PATCH v3 3/3] perf: core: Check sample_type in perf_sample_save_brstack From: Yabin Cui To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter Cc: linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org, Yabin Cui Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Check sample_type in perf_sample_save_brstack() to prevent saving branch stack data when it isn't required. Suggested-by: Namhyung Kim Signed-off-by: Yabin Cui --- arch/x86/events/amd/core.c | 3 +-- arch/x86/events/core.c | 3 +-- arch/x86/events/intel/ds.c | 3 +-- include/linux/perf_event.h | 3 +++ 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c index 985ef3b47919..fb9bf3aa1b42 100644 --- a/arch/x86/events/amd/core.c +++ b/arch/x86/events/amd/core.c @@ -967,8 +967,7 @@ static int amd_pmu_v2_handle_irq(struct pt_regs *regs) if (!x86_perf_event_set_period(event)) continue; =20 - if (has_branch_stack(event)) - perf_sample_save_brstack(&data, event, &cpuc->lbr_stack, NULL); + perf_sample_save_brstack(&data, event, &cpuc->lbr_stack, NULL); =20 if (perf_event_overflow(event, &data, regs)) x86_pmu_stop(event, 0); diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index 5b0dd07b1ef1..ff5577315938 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -1702,8 +1702,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs) =20 perf_sample_data_init(&data, 0, event->hw.last_period); =20 - if (has_branch_stack(event)) - perf_sample_save_brstack(&data, event, &cpuc->lbr_stack, NULL); + perf_sample_save_brstack(&data, event, &cpuc->lbr_stack, NULL); =20 if (perf_event_overflow(event, &data, regs)) x86_pmu_stop(event, 0); diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index c2b5585aa6d1..f25236ffa28f 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -1754,8 +1754,7 @@ static void setup_pebs_fixed_sample_data(struct perf_= event *event, if (x86_pmu.intel_cap.pebs_format >=3D 3) setup_pebs_time(event, data, pebs->tsc); =20 - if (has_branch_stack(event)) - perf_sample_save_brstack(data, event, &cpuc->lbr_stack, NULL); + perf_sample_save_brstack(data, event, &cpuc->lbr_stack, NULL); } =20 static void adaptive_pebs_save_regs(struct pt_regs *regs, diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 8617815456b0..8cff96782446 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -1276,6 +1276,9 @@ static inline void perf_sample_save_brstack(struct pe= rf_sample_data *data, { int size =3D sizeof(u64); /* nr */ =20 + if (!has_branch_stack(event)) + return; + if (branch_sample_hw_index(event)) size +=3D sizeof(u64); size +=3D brs->nr * sizeof(struct perf_branch_entry); --=20 2.45.0.118.g7fe29c98d7-goog