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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id dd3-20020a0560001e8300b0034c9f060a14sm15085210wrb.11.2024.05.08.04.37.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 May 2024 04:37:27 -0700 (PDT) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH RESEND v2 3/9] mm: Use common huge_ptep_get() function for riscv/arm64 Date: Wed, 8 May 2024 13:34:13 +0200 Message-Id: <20240508113419.18620-4-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240508113419.18620-1-alexghiti@rivosinc.com> References: <20240508113419.18620-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For that, we need to introduce: - a new config: ARCH_HAS_CONTPTE, - a new arch specific function which returns the number of contiguous PTE in a mapping and its base page size, - a pte_cont() helper, only introduced for riscv since we keep the arm64 naming (contpte) which is more explicit than the riscv's (napot). Signed-off-by: Alexandre Ghiti --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/pgtable.h | 30 +++++++++++++++++ arch/arm64/mm/hugetlbpage.c | 55 ++------------------------------ arch/riscv/Kconfig | 1 + arch/riscv/include/asm/hugetlb.h | 2 +- arch/riscv/include/asm/pgtable.h | 6 ++-- arch/riscv/mm/hugetlbpage.c | 24 -------------- mm/Kconfig | 3 ++ mm/Makefile | 1 + mm/contpte.c | 45 ++++++++++++++++++++++++++ 10 files changed, 88 insertions(+), 80 deletions(-) create mode 100644 mm/contpte.c diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 7b11c98b3e84..ac2f6d906cc3 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -20,6 +20,7 @@ config ARM64 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE select ARCH_HAS_CACHE_LINE_SIZE + select ARCH_HAS_CONTPTE select ARCH_HAS_CURRENT_STACK_POINTER select ARCH_HAS_DEBUG_VIRTUAL select ARCH_HAS_DEBUG_VM_PGTABLE diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index afdd56d26ad7..e30149a128f2 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -1638,6 +1638,36 @@ static inline int ptep_set_access_flags(struct vm_ar= ea_struct *vma, =20 #endif /* CONFIG_ARM64_CONTPTE */ =20 +static inline int arch_contpte_get_num_contig(pte_t *ptep, unsigned long s= ize, + size_t *pgsize) +{ + int contig_ptes =3D 0; + + *pgsize =3D size; + + switch (size) { +#ifndef __PAGETABLE_PMD_FOLDED + case PUD_SIZE: + if (pud_sect_supported()) + contig_ptes =3D 1; + break; +#endif + case PMD_SIZE: + contig_ptes =3D 1; + break; + case CONT_PMD_SIZE: + *pgsize =3D PMD_SIZE; + contig_ptes =3D CONT_PMDS; + break; + case CONT_PTE_SIZE: + *pgsize =3D PAGE_SIZE; + contig_ptes =3D CONT_PTES; + break; + } + + return contig_ptes; +} + #endif /* !__ASSEMBLY__ */ =20 #endif /* __ASM_PGTABLE_H */ diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index 0f0e10bb0a95..9e9c80ec6e74 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -112,57 +112,6 @@ static int find_num_contig(struct mm_struct *mm, unsig= ned long addr, return CONT_PTES; } =20 -static inline int num_contig_ptes(unsigned long size, size_t *pgsize) -{ - int contig_ptes =3D 0; - - *pgsize =3D size; - - switch (size) { -#ifndef __PAGETABLE_PMD_FOLDED - case PUD_SIZE: - if (pud_sect_supported()) - contig_ptes =3D 1; - break; -#endif - case PMD_SIZE: - contig_ptes =3D 1; - break; - case CONT_PMD_SIZE: - *pgsize =3D PMD_SIZE; - contig_ptes =3D CONT_PMDS; - break; - case CONT_PTE_SIZE: - *pgsize =3D PAGE_SIZE; - contig_ptes =3D CONT_PTES; - break; - } - - return contig_ptes; -} - -pte_t huge_ptep_get(pte_t *ptep) -{ - int ncontig, i; - size_t pgsize; - pte_t orig_pte =3D __ptep_get(ptep); - - if (!pte_present(orig_pte) || !pte_cont(orig_pte)) - return orig_pte; - - ncontig =3D num_contig_ptes(page_size(pte_page(orig_pte)), &pgsize); - for (i =3D 0; i < ncontig; i++, ptep++) { - pte_t pte =3D __ptep_get(ptep); - - if (pte_dirty(pte)) - orig_pte =3D pte_mkdirty(orig_pte); - - if (pte_young(pte)) - orig_pte =3D pte_mkyoung(orig_pte); - } - return orig_pte; -} - /* * Changing some bits of contiguous entries requires us to follow a * Break-Before-Make approach, breaking the whole contiguous set @@ -243,7 +192,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned lon= g addr, unsigned long pfn, dpfn; pgprot_t hugeprot; =20 - ncontig =3D num_contig_ptes(sz, &pgsize); + ncontig =3D arch_contpte_get_num_contig(ptep, sz, &pgsize); =20 if (!pte_present(pte)) { for (i =3D 0; i < ncontig; i++, ptep++, addr +=3D pgsize) @@ -390,7 +339,7 @@ void huge_pte_clear(struct mm_struct *mm, unsigned long= addr, int i, ncontig; size_t pgsize; =20 - ncontig =3D num_contig_ptes(sz, &pgsize); + ncontig =3D arch_contpte_get_num_contig(ptep, sz, &pgsize); =20 for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) __pte_clear(mm, addr, ptep); diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 8a0f403432e8..38d93cf44456 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -19,6 +19,7 @@ config RISCV select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE select ARCH_HAS_BINFMT_FLAT + select ARCH_HAS_CONTPTE if RISCV_ISA_SVNAPOT select ARCH_HAS_CURRENT_STACK_POINTER select ARCH_HAS_DEBUG_VIRTUAL if MMU select ARCH_HAS_DEBUG_VM_PGTABLE diff --git a/arch/riscv/include/asm/hugetlb.h b/arch/riscv/include/asm/huge= tlb.h index 22deb7a2a6ec..f195f611722b 100644 --- a/arch/riscv/include/asm/hugetlb.h +++ b/arch/riscv/include/asm/hugetlb.h @@ -49,7 +49,7 @@ pte_t huge_ptep_get(pte_t *ptep); pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags= ); #define arch_make_huge_pte arch_make_huge_pte =20 -#endif /*CONFIG_RISCV_ISA_SVNAPOT*/ +#endif /* CONFIG_RISCV_ISA_SVNAPOT */ =20 #include =20 diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index 268c828f5152..66061002ff36 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -296,6 +296,7 @@ static inline unsigned long pte_napot(pte_t pte) { return pte_val(pte) & _PAGE_NAPOT; } +#define pte_cont pte_napot =20 #define pte_valid_napot(pte) (pte_present(pte) && pte_napot(pte)) =20 @@ -560,7 +561,7 @@ static inline int arch_contpte_get_num_contig(pte_t *pt= ep, unsigned long size, } #endif =20 -static inline pte_t ptep_get(pte_t *ptep) +static inline pte_t __ptep_get(pte_t *ptep) { pte_t pte =3D READ_ONCE(*ptep); =20 @@ -584,7 +585,6 @@ static inline pte_t ptep_get(pte_t *ptep) =20 return pte; } -#define ptep_get ptep_get =20 static inline void set_ptes(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval, unsigned int nr) @@ -686,6 +686,8 @@ static inline int ptep_clear_flush_young(struct vm_area= _struct *vma, return ptep_test_and_clear_young(vma, address, ptep); } =20 +#define ptep_get __ptep_get + #define pgprot_nx pgprot_nx static inline pgprot_t pgprot_nx(pgprot_t _prot) { diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index f042f5c8bdb7..be129f4f1503 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -3,30 +3,6 @@ #include =20 #ifdef CONFIG_RISCV_ISA_SVNAPOT -pte_t huge_ptep_get(pte_t *ptep) -{ - unsigned long pte_num; - int i; - pte_t orig_pte =3D ptep_get(ptep); - - if (!pte_present(orig_pte) || !pte_napot(orig_pte)) - return orig_pte; - - pte_num =3D napot_pte_num(napot_cont_order(orig_pte)); - - for (i =3D 0; i < pte_num; i++, ptep++) { - pte_t pte =3D ptep_get(ptep); - - if (pte_dirty(pte)) - orig_pte =3D pte_mkdirty(orig_pte); - - if (pte_young(pte)) - orig_pte =3D pte_mkyoung(orig_pte); - } - - return orig_pte; -} - pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, diff --git a/mm/Kconfig b/mm/Kconfig index b1448aa81e15..c325003d6552 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -981,6 +981,9 @@ config ARCH_HAS_CPU_CACHE_ALIASING config ARCH_HAS_CACHE_LINE_SIZE bool =20 +config ARCH_HAS_CONTPTE + bool + config ARCH_HAS_CURRENT_STACK_POINTER bool help diff --git a/mm/Makefile b/mm/Makefile index 4abb40b911ec..605ead58403b 100644 --- a/mm/Makefile +++ b/mm/Makefile @@ -89,6 +89,7 @@ obj-$(CONFIG_MIGRATION) +=3D migrate.o obj-$(CONFIG_NUMA) +=3D memory-tiers.o obj-$(CONFIG_DEVICE_MIGRATION) +=3D migrate_device.o obj-$(CONFIG_TRANSPARENT_HUGEPAGE) +=3D huge_memory.o khugepaged.o +obj-$(CONFIG_ARCH_HAS_CONTPTE) +=3D contpte.o obj-$(CONFIG_PAGE_COUNTER) +=3D page_counter.o obj-$(CONFIG_MEMCG) +=3D memcontrol.o vmpressure.o ifdef CONFIG_SWAP diff --git a/mm/contpte.c b/mm/contpte.c new file mode 100644 index 000000000000..e8574051d0b9 --- /dev/null +++ b/mm/contpte.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2024 Rivos Inc. + */ + +#include +#include +#include + +/* + * Any arch that wants to use that needs to define: + * - __ptep_get() + * - pte_cont() + * - arch_contpte_get_num_contig() + */ + +/* + * This file implements the following contpte aware API: + * - huge_ptep_get() + */ + +pte_t huge_ptep_get(pte_t *ptep) +{ + int ncontig, i; + size_t pgsize; + pte_t orig_pte =3D __ptep_get(ptep); + + if (!pte_present(orig_pte) || !pte_cont(orig_pte)) + return orig_pte; + + ncontig =3D arch_contpte_get_num_contig(ptep, + page_size(pte_page(orig_pte)), + &pgsize); + + for (i =3D 0; i < ncontig; i++, ptep++) { + pte_t pte =3D __ptep_get(ptep); + + if (pte_dirty(pte)) + orig_pte =3D pte_mkdirty(orig_pte); + + if (pte_young(pte)) + orig_pte =3D pte_mkyoung(orig_pte); + } + return orig_pte; +} --=20 2.39.2