From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8ECA7E56B for ; Mon, 6 May 2024 13:35:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002508; cv=none; b=daLMWCCLloaWHTVIw9RsegGhn4qdFF6Dk75ZzPQBBho/n0/FxZ05nwi87OsqTg9JrF0y8kBs8oUVhDrsczwezN9UMmOwb8VpCLQWeaT11lNTczywt9DT+cbO5p7rPvZQ7zpVYJvOHflki6+fsXraZvAcgU7i3yPWSqD1J8kwtUg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002508; c=relaxed/simple; bh=2gxAViJr9NJSI0wyF8/7Q/WmZNqJmwnGrC0yrjFayzk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QRTrqI+mnpBU1n7QuyLCgF6DTRB88aV0xqTJxT4LgCGRkm1RreDcPoPETZoplriOm+8uq9lMWMp9qRwszxOC3ZPKyJIO4k1qTS9KiSnnKdpXk5Kg5g85UZqd5B90i4mXUYJFxEEBQaMVIbh+guwUOek5a1U9+4eIRGCapHkwky0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GVbJ0rfY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GVbJ0rfY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D7B95C3277B; Mon, 6 May 2024 13:35:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002508; bh=2gxAViJr9NJSI0wyF8/7Q/WmZNqJmwnGrC0yrjFayzk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=GVbJ0rfY3xs6Ux0UxSoIfjcF29PmoHxtN3SrZJzOiF4gjY6sEQ5ignodSdmCheGi1 CXDdWHGpV7NtdHJeEuDVvMHAFb8xiVlY30Y7lruDFe37+n9bE4e+JYRLJ9xz88nIsR DfumMVuId5PtRdGCcKxv+PGuiZ5jtcqEPjiVb+GeyoIDjefa43RHYbpMHWOHi8kb6s jDu75XS7G6pLuFk+SwyxyqJCxneAM/tiialtVN+aX1fFhLp6Wm4qL+A33iJjFMeyGA VH685LOmQKsjuF3229lcd00iPmIurLhYWyMnC54vhk5wlRCgM8SXUijj5zb1BXX7sg 5DE/nd2ifTc/Q== From: Michael Walle Date: Mon, 06 May 2024 15:34:30 +0200 Subject: [PATCH 01/20] drm/bridge: add dsi_lp11_notify mechanism Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-1-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 Some bridges have very strict power-up reqirements. In this case, the Toshiba TC358775. The reset has to be deasserted while *both* the DSI clock and DSI data lanes are in LP-11 mode. After the reset is relased, the bridge needs the DSI clock to actually be able to process I2C access. This access will configure the DSI side of the bridge during which the DSI data lanes have to be in LP-11 mode. After everything is configured the video stream can finally be enabled. This means: (1) The bridge has to be configured completely in .pre_enable() op (with the clock turned on and data lanes in LP-11 mode, thus .pre_enable_prev_first has to be set). (2) The bridge will enable its output in the .enable() op (3) There must be some mechanism before (1) where the bridge can release its reset while the clock lane is still in LP-11 mode. Unfortunately, (3) is crucial for a correct operation of the bridge. To satisfy this requriment, introduce a new callback .dsi_lp11_notify() which will be called by the DSI host driver. Signed-off-by: Michael Walle --- drivers/gpu/drm/drm_bridge.c | 16 ++++++++++++++++ include/drm/drm_bridge.h | 12 ++++++++++++ 2 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c index 28abe9aa99ca..98cd6558aecb 100644 --- a/drivers/gpu/drm/drm_bridge.c +++ b/drivers/gpu/drm/drm_bridge.c @@ -1339,6 +1339,22 @@ void drm_bridge_hpd_notify(struct drm_bridge *bridge, } EXPORT_SYMBOL_GPL(drm_bridge_hpd_notify); =20 +/** + * drm_bridge_dsi_lp11_notify - notify clock/data lanes LP-11 mode + * @bridge: bridge control structure + * + * DSI host drivers shall call this function while the clock and data lanes + * are still in LP-11 mode. + * + * This function shall be called in a context that can sleep. + */ +void drm_bridge_dsi_lp11_notify(struct drm_bridge *bridge) +{ + if (bridge->funcs->dsi_lp11_notify) + bridge->funcs->dsi_lp11_notify(bridge); +} +EXPORT_SYMBOL_GPL(drm_bridge_dsi_lp11_notify); + #ifdef CONFIG_OF /** * of_drm_find_bridge - find the bridge corresponding to the device node in diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h index 4baca0d9107b..4ef61274e0a8 100644 --- a/include/drm/drm_bridge.h +++ b/include/drm/drm_bridge.h @@ -630,6 +630,17 @@ struct drm_bridge_funcs { */ void (*hpd_disable)(struct drm_bridge *bridge); =20 + /** + * dsi_lp11_notify: + * + * Will be called by the DSI host driver while both the DSI clock + * lane as well as the DSI data lanes are in LP-11 mode. Some bridges + * need this state while releasing the reset, for example. + * Not all DSI host drivers will support this. Therefore, the DSI + * bridge driver must not rely on this op to be called. + */ + void (*dsi_lp11_notify)(struct drm_bridge *bridge); + /** * @debugfs_init: * @@ -898,6 +909,7 @@ void drm_bridge_hpd_enable(struct drm_bridge *bridge, void drm_bridge_hpd_disable(struct drm_bridge *bridge); void drm_bridge_hpd_notify(struct drm_bridge *bridge, enum drm_connector_status status); +void drm_bridge_dsi_lp11_notify(struct drm_bridge *bridge); =20 #ifdef CONFIG_DRM_PANEL_BRIDGE bool drm_bridge_is_panel(const struct drm_bridge *bridge); --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F1207FBA5 for ; Mon, 6 May 2024 13:35:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002513; cv=none; b=Hg/hZYgCEFXwxRGT+/UKjC6ZO54bGCB1WYnMsEtxVSR6DwA1NX8tAhaBjZUX6qDqgDJ1y+hAXb4KlYxsIqRrfg/81sHyVAWN0GEMNmtYIwH4OczQWrPXCjkU8uIEsLe4UEkvzDF5QL6ashI19iHQLRF46YfVAfgF6TTw9liQYkg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002513; c=relaxed/simple; bh=pK9ICrlhU4yI7C8UmfAMhDpOxq05RC8K7IM/L/yquWw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YFI9qaZZjflupaqsNyj0sAPV8fdJqm7KGrnvr0fykmfOZUwpf6EuAGbmlahyh3Vz062NeSbEBWSBOiiKkPmuXmdnlWPG1EKBfpnwyEXUlyH6hCgo/dp/L3lblMIOSsLhDtbTrZ0yPfmOxqz93gjcfJD2X6WRGdVDdb7lSG3rOSU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kD47ngL8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kD47ngL8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B7DC2C116B1; Mon, 6 May 2024 13:35:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002513; bh=pK9ICrlhU4yI7C8UmfAMhDpOxq05RC8K7IM/L/yquWw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=kD47ngL8uom7ANO5DcjrAAVmsG/a74GHNet69KvrccOpmOl+iw4znkaN5ZTvBBOtn KEH5rlnCJbms83AhqwyyASbLLAekbP61TQQsLpg/hpD69G2D/8T7Q3/yZCZcFl2u4p 37nfSL+WDB9rMSWujjU2hcXW+NTJg6iCGrCfJgpD9IhRCwOGBs3scufG5lSUnzc0d7 UHyOzgfIBNcGd9vWR4YkB9oygn2/2iHBfxxD8jxluCoVhezMvA40NmN2UXBv2AHJy+ ZcrDgHDdbvzWruLtC2LRRrq3NZv/Alc3WV4Ypbjt2ACSPWr1CdSKLaBNlnLqi1F0Ke eEKv2/eLNYJZA== From: Michael Walle Date: Mon, 06 May 2024 15:34:31 +0200 Subject: [PATCH 02/20] drm/mediatek: dsi: provide LP-11 mode during .pre_enable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-2-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 As per specification in drivers/gpu/drm/drm_bridge.c the data lanes should be in LP-11 mode after .pre_enable() has been run. HS mode of the data lanes are enabled with mtk_dsi_start(). Therefore, move that call to the .enable() callback. Signed-off-by: Michael Walle --- drivers/gpu/drm/mediatek/mtk_dsi.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/= mtk_dsi.c index c255559cc56e..ed45c9cc3137 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -711,8 +711,6 @@ static void mtk_output_dsi_enable(struct mtk_dsi *dsi) mtk_dsi_set_mode(dsi); mtk_dsi_clk_hs_mode(dsi, 1); =20 - mtk_dsi_start(dsi); - dsi->enabled =3D true; } =20 @@ -759,7 +757,7 @@ static void mtk_dsi_bridge_atomic_enable(struct drm_bri= dge *bridge, if (dsi->refcount =3D=3D 0) return; =20 - mtk_output_dsi_enable(dsi); + mtk_dsi_start(dsi); } =20 static void mtk_dsi_bridge_atomic_pre_enable(struct drm_bridge *bridge, @@ -771,6 +769,9 @@ static void mtk_dsi_bridge_atomic_pre_enable(struct drm= _bridge *bridge, ret =3D mtk_dsi_poweron(dsi); if (ret < 0) DRM_ERROR("failed to power on dsi\n"); + + /* Enter LP-11 state */ + mtk_output_dsi_enable(dsi); } =20 static void mtk_dsi_bridge_atomic_post_disable(struct drm_bridge *bridge, --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 724098005C for ; Mon, 6 May 2024 13:35:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002518; cv=none; b=JK/sfe4WukzAD9k2sUhQQJj8QFeBw/Ieg99em7Bc/DHklxBZlVMxZMcmHb7KxJREw+fK76C1kqNER0MqmJmZh6BgGMjpopU8RM5/lBczekWAcjMRzwU+csoARCJmfuhPv4IlbjDc9QoS3XMgAawoG8X2SXVTWAT07dYdW/sSQos= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002518; c=relaxed/simple; bh=TuYMERR0RaUaMlVi9q6zNXvlpim/SMByOC7RHr5bFKA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=G4Y3SKeTi59bUWHziU9Zf4Ttr2qrWLXhc3AOPX48rUPGl6tYVFCHx6wyNffO/1H9zCtT3pULyVmLaILlkf+RWsC1U3Smtzq/DjJG55iqOFWgC1iue3e/lrURRmwo4wCzAaiXHuU+79ALXdkK4fOISi8dFxZLhtpiO8QdSLykLlo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PFKvbref; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PFKvbref" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 97E0BC3277B; Mon, 6 May 2024 13:35:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002518; bh=TuYMERR0RaUaMlVi9q6zNXvlpim/SMByOC7RHr5bFKA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=PFKvbrefjvVIf53ItfzYZvHVza+Ja0BR+Vd7BHiSXEA1gtTj09HbUVXMNyYUMffFR /Wp4yNUxMD8kCBWwzKQpWQL4T3Y1mWiGvXFjBH9WDLET+qYEAWK7PtxrFjhQbixWQ6 oOE3PIhRQFuXvdLywvfIOk4Mp9D/DKUsRd0qFNyYPec+lVs1DljLS74AIuLqldYBA9 deu6o8W1gp9xjfDwqskRyyX50TBHOEwcMQLVNJUfPrMxdl5KJffx3jeaz+/H/egyHv VoDfgA+MewIY+jixWlLFUWUMd74PAm5lZFYCZ8MAjAzwC4SeFjosrNDTgoZopKvqhZ ySULCnuFnPlmw== From: Michael Walle Date: Mon, 06 May 2024 15:34:32 +0200 Subject: [PATCH 03/20] drm/mediatek: dsi: add support for .dsi_lp11_notity() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-3-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 drm_bridge_dsi_lp11_notify() shall be called while both the clock and data lanes are still in LP-11 mode. Add the callback. Signed-off-by: Michael Walle --- drivers/gpu/drm/mediatek/mtk_dsi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/= mtk_dsi.c index ed45c9cc3137..d4a5a2bd591a 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -709,6 +709,7 @@ static void mtk_output_dsi_enable(struct mtk_dsi *dsi) =20 mtk_dsi_lane_ready(dsi); mtk_dsi_set_mode(dsi); + drm_bridge_dsi_lp11_notify(dsi->next_bridge); mtk_dsi_clk_hs_mode(dsi, 1); =20 dsi->enabled =3D true; --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4DF287C6C6 for ; Mon, 6 May 2024 13:35:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002523; cv=none; b=PKqzuaiFwHtIByUpzd0V7r40jMzHnGD1r2yvLiTrNOABMWk6o3MJdtBdoriVCSy1ZvarfXbKXFUVWMD+PwGHxDl6cHC7+sSOh86uaic9GERj/00Yh9zTmka4lz2XomPMl1B7HGOyFSciLxNykp0HCWtsq3yZgx3cOTd4TFhugXQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002523; c=relaxed/simple; bh=yYJipGADf8UJHcchwZluJd8e0AxButwRdoUdpxl7l5Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JTZMZ2POU6KLwCC1b4alZ83zq/LCK0+gattgim2aUCgTZqGoe4gdJ1CDESfW67Xh+L9+7Bdpjcogn9vOXLZPHz23yo4ARKChnba2KjeRnHo+Q+yD6SyZTyUsXlOdSpBn+GPrB9cL30O1quDF7xNQgVilDZDf1aVXBAvj84pWULE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=aoVRIpuM; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="aoVRIpuM" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 775B7C116B1; Mon, 6 May 2024 13:35:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002522; bh=yYJipGADf8UJHcchwZluJd8e0AxButwRdoUdpxl7l5Q=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=aoVRIpuMXfmKxTrrGGCBOz/nNDclfDeb3r8oq/8cGNaMUauqFc6TvCTxMWYoqLp/E a4nWfgjh6HayGaegeyZ98S6GpU4KldaRIloHqEfuIt7hKnaxXCQh1qF4/D8cXGg+Nd Zd4DBbnx2msAtHLmPP0jQB3wgtHs6Ox0ln9bE9ibwLUWM0UzkJxM92q+7yF9jvUCDu 14WOuZ6O5oGE3ga71J92BHv509CN80KR2qf/qAxWygZ1xZAe8PEigeFxBGBMDIn8vw IMaTlAZq0ZF6YXWfO0SFI/u0PvUIQ9a3VQyzwALosJthO29zjoAQG3sSUnGVnbQ/7J awDu2v5DOzH3A== From: Michael Walle Date: Mon, 06 May 2024 15:34:33 +0200 Subject: [PATCH 04/20] drm/bridge: tc358775: fix regulator supply id Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-4-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 The regulator id is given without the "-supply" postfix. With that fixed, the driver will look up the correct regulator from the device tree. Fixes: b26975593b17 ("display/drm/bridge: TC358775 DSI/LVDS driver") Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index 3b7cc3be2ccd..980f71ea5a6a 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -680,14 +680,14 @@ static int tc_probe(struct i2c_client *client) if (ret) return ret; =20 - tc->vddio =3D devm_regulator_get(dev, "vddio-supply"); + tc->vddio =3D devm_regulator_get(dev, "vddio"); if (IS_ERR(tc->vddio)) { ret =3D PTR_ERR(tc->vddio); dev_err(dev, "vddio-supply not found\n"); return ret; } =20 - tc->vdd =3D devm_regulator_get(dev, "vdd-supply"); + tc->vdd =3D devm_regulator_get(dev, "vdd"); if (IS_ERR(tc->vdd)) { ret =3D PTR_ERR(tc->vdd); dev_err(dev, "vdd-supply not found\n"); --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D4D978C68 for ; Mon, 6 May 2024 13:35:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002528; cv=none; b=hOpuzKTUXwGUxhGto3ixCU6p4xKvq2VawLp5HnWXkhTTESFGF+Taj74aZCGp2sQ9mgwAnoaUxQAAdhbd/SvxbPmhUId+00wKYwkpHOtcSwtKZ4UtmIRPRZwlXXm3eF6e4cD0p9LXSOd0QQReG9+s5tnA0hF5Lw1s5cce00Qufsg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002528; c=relaxed/simple; bh=VjxeNKYDFVNa7bVWlPBb3FkbK1nSMTj0nhXJcYaVwIc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HSDEk4aveJpiKHTSRXVJ4XuQAXumdh08wQIyIqfsTnWOpahyui76UpPrmLUOLkv6gGGvplR4FIteUUiqLuLWqxscYgsL41/7GhplwvuimdCbma4V6CLMGtzCsM3ZeN1Y82NXIVrCLMrWwNs2ViOFmGkrHv++LbKOCC4Vb7/DQck= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nHNFPtEn; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nHNFPtEn" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 56D7EC3277B; Mon, 6 May 2024 13:35:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002527; bh=VjxeNKYDFVNa7bVWlPBb3FkbK1nSMTj0nhXJcYaVwIc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=nHNFPtEnN3DVovJIBZ8EXSpxncOzcTVLRw3OInR2qD9SW4Pm67duBMCPv7Q3Q6QWH juRnQIPbSSpg8gldlPDW4Odb4mDx/13lvV8Ysvk0EOk2HZl4JGJH9w5GKTfgmSXPWU LvpWVIGdEYLk+OcBURS1Vk9s+E5wLWsNogrkMppg9wsqrARmRiRISdmUFWb3AyWRYj 2A5nZTil8CCd/WMzeVVgBMLd21jL64TBKx0F1K6mewxMxjSS0TPtuSocvJobJR+ifn Qwr9NYW28ddIPfCNlIHS02bMPknXUFNqc+e8YaNLqdtHx9fOrZ8snWCEkl9Gd43rEG PTABT1wdl9rvQ== From: Michael Walle Date: Mon, 06 May 2024 15:34:34 +0200 Subject: [PATCH 05/20] drm/bridge: tc358775: add crtc modes fixup Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-5-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 The bridge has some limitations regarding the horizontal display timings. In particular, the pulse width has to be at least 8 pixels and all horizontal timings have to be a multiple of two pixels, except for the front porch which is ignored by the bridge anyway. To accommodate that, add pixels to the pulse width and the back porch until these requirements are satisfied. The added pixels are then substracted from the front porch so we don't actually change the pixel clock (or framerate). Fixes: b26975593b17 ("display/drm/bridge: TC358775 DSI/LVDS driver") Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index 980f71ea5a6a..720c0d63fd6a 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -502,6 +502,37 @@ static void tc_bridge_enable(struct drm_bridge *bridge) d2l_write(tc->i2c, LVCFG, val); } =20 +/* + * According to the datasheet, the horizontal back porch, front porch and = sync + * length must be a multiple of 2 and the minimal horizontal pulse width i= s 8. + * To workaround this, we modify the back porch and the sync pulse width by + * adding enough pixels. These pixels will then be substracted from the fr= ont + * porch which is ignored by the bridge. Hopefully, this marginal modified + * timing is tolerated by the panel. The alternative is either a black scr= een + * (if the sync pulse width is too short or a shifted picture if the lengt= hs + * are not even). + */ +static bool tc_mode_fixup(struct drm_bridge *bridge, + const struct drm_display_mode *mode, + struct drm_display_mode *adj) +{ + u16 hsync_len, hback_porch; + + hback_porch =3D adj->htotal - adj->hsync_end; + if (hback_porch & 1) { + adj->hsync_end -=3D 1; + adj->hsync_start -=3D 1; + } + + hsync_len =3D adj->hsync_end - adj->hsync_start; + if (hsync_len < 8) + adj->hsync_start -=3D 8 - hsync_len; + else if (hsync_len & 1) + adj->hsync_start -=3D 1; + + return adj->hsync_start >=3D adj->hdisplay; +} + static enum drm_mode_status tc_mode_valid(struct drm_bridge *bridge, const struct drm_display_info *info, @@ -603,6 +634,7 @@ static const struct drm_bridge_funcs tc_bridge_funcs = =3D { .attach =3D tc_bridge_attach, .pre_enable =3D tc_bridge_pre_enable, .enable =3D tc_bridge_enable, + .mode_fixup =3D tc_mode_fixup, .mode_valid =3D tc_mode_valid, .post_disable =3D tc_bridge_post_disable, }; --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2104B811FE for ; Mon, 6 May 2024 13:35:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002533; cv=none; b=rYJiPjCyFUZVA/kw5KI3TGUkr0Hn6k4gydeQv/uDLM4vC/EJ6C94poA69sdID3PxnTmrvD0907/HbzAblXVdQG4GuHeQvcF7FtoihuzAr6TX8VTGyLIUrsDufTf4o/lZK0T+qRJ0cGdv/2JIWhd/Mrd3pc1FqDJkCs355yWB+EQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002533; c=relaxed/simple; bh=46hAq1PCM2INpFGrPzb+MElX1JVQQ10d/aQq2p0zy48=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=L9Wwro/mFSmpqZrhA3/D70EBf8zOYSzV1sA7nY50H+m4I0SSZ+6oygjOpD0wR+HhFaYFmOWkTMQi0PXkELM01cPh5vTRmWRzlXvyYNVIWVY4mSpbKKe1wXgXiD36DM1OuM/t9hETUA/lX4X9xK0rf00BnwbNosao193i4oygNbo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HhS1pLRn; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HhS1pLRn" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 38788C116B1; Mon, 6 May 2024 13:35:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002532; bh=46hAq1PCM2INpFGrPzb+MElX1JVQQ10d/aQq2p0zy48=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=HhS1pLRn3qUNaKrsNVT+K3AvOvWmUzJ0dJTt14Q3gc7LX6ZSjiLZhmPzq9sacIq5P /RuAtzhq0ZYAnOqzx2hTZ/yk+AZsaWrRdnFmw2WsVQRNx3FfrS5mSPRv6rk9XxiZrf a9GXaqorKyymQxJ6ML4AW9XWEWW3GSYFu6mVTkvH806yeep8NpVXVyJWtQFuWUdo3f 97KnrhIsWEpmtjcirMjoc1QspIcLEK6NcDmc9JJjfEpY+FH591lsfQeFzko/lZq4az Jy+6R4jHiSUjuLmQyzHEG+b3lO/XOTDNpdwIHugcjbOIDpggKMW20VEnEYzgY4gvb1 4hlAD6+2n6Yqw== From: Michael Walle Date: Mon, 06 May 2024 15:34:35 +0200 Subject: [PATCH 06/20] drm/bridge: tc358775: redefine LV_MX() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-6-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 Drop the FLD_VAL macro, just use bit shifts. This is a preparation patch to switch to regmap and to remove the FLD_VAL(). While at it, reformat the LV_x enum. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 36 ++++++------------------------------ 1 file changed, 6 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index 720c0d63fd6a..7ae86e8d4c72 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -124,39 +124,15 @@ #define LV_MX1619 0x0490 /* Bit 16 to 19 */ #define LV_MX2023 0x0494 /* Bit 20 to 23 */ #define LV_MX2427 0x0498 /* Bit 24 to 27 */ -#define LV_MX(b0, b1, b2, b3) (FLD_VAL(b0, 4, 0) | FLD_VAL(b1, 12, 8) | \ - FLD_VAL(b2, 20, 16) | FLD_VAL(b3, 28, 24)) +#define LV_MX(b0, b1, b2, b3) \ + (((b3) << 24) | ((b2) << 16) | ((b1) << 8) | (b0)) =20 /* Input bit numbers used in mux registers */ enum { - LVI_R0, - LVI_R1, - LVI_R2, - LVI_R3, - LVI_R4, - LVI_R5, - LVI_R6, - LVI_R7, - LVI_G0, - LVI_G1, - LVI_G2, - LVI_G3, - LVI_G4, - LVI_G5, - LVI_G6, - LVI_G7, - LVI_B0, - LVI_B1, - LVI_B2, - LVI_B3, - LVI_B4, - LVI_B5, - LVI_B6, - LVI_B7, - LVI_HS, - LVI_VS, - LVI_DE, - LVI_L0 + LVI_R0, LVI_R1, LVI_R2, LVI_R3, LVI_R4, LVI_R5, LVI_R6, LVI_R7, + LVI_G0, LVI_G1, LVI_G2, LVI_G3, LVI_G4, LVI_G5, LVI_G6, LVI_G7, + LVI_B0, LVI_B1, LVI_B2, LVI_B3, LVI_B4, LVI_B5, LVI_B6, LVI_B7, + LVI_HS, LVI_VS, LVI_DE, LVI_L0 }; =20 #define LVCFG 0x049C /* LVDS Configuration */ --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F24381AB6 for ; Mon, 6 May 2024 13:35:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002538; cv=none; b=Rv7mw5OC4UwSb5MHnK3m7N5lWjYXzku4veKKw2jsuuef2EJqeq3GEOoaYm9n9+TbREh9ifCcq8xKADHlTwS0CrixXJ2KXsV3TravnqEmnT9UsZ6sgPJGMi/TpGlfJIKBz5Y/jS17+32sG3zZFNhcPmapr3yLdYtnztELF0NgC44= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002538; c=relaxed/simple; bh=U6Bf7YERTTp7pbKyaw/KQvlawb1lIEL8sDO7oaHQpZQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ju+UnX3NoYYhqRnwPeb9to7LGnY8Q2UUgP0F2ycusgj7DBag2NCTCBz5x1mHpaolgmW8Hx3MMOUqgC0AsY0q9T42QivhRqhoGKrc8cF/+JBRwj6f5prWHIqnlTCGeLbgSrQ9yJ3xM9DxU8KNWQYth90Dx1j/CApxhQLCiRGR96U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=m2dHoQmP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="m2dHoQmP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 164F2C4AF67; Mon, 6 May 2024 13:35:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002537; bh=U6Bf7YERTTp7pbKyaw/KQvlawb1lIEL8sDO7oaHQpZQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=m2dHoQmP7x5wG3IIBLtnmmQDyx9SqxLrTj4xJculLfFkPUhYanD4Mec7MaiTXFuie OZemQmAHTYr3wRlOphe8AYM8dPZ6xcCYnEltEfXZF4dW8pKm84mCH1CpZzxRPLNwtE riLmbUg8L0uRlJ35mL0raZ8fw2GOjNn8ev/fASj7JI4cLVx7A4RQ4dpji3RoyOyJdv dse37L+DdeXYMvDGg2PcU/rb6/jd+0nJPAxEiUPanNU23f4KjCXzBtfJ18hiULHKFL owwn2bbc2SohpQnQ2lTuscKXRRvhlktUMJPdTjqKPxZctEih5joTgkZfrOkRHaEo+4 s+rz/aGcPin5g== From: Michael Walle Date: Mon, 06 May 2024 15:34:36 +0200 Subject: [PATCH 07/20] drm/bridge: tc358775: use regmap instead of open coded access functions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-7-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 The DSI bridge also supports access via DSI in-band reads and writes. Prepare the driver for that by converting all the access functions to regmap. This also have the advantage that it will make tracing and debugging easier and we can use all the bit manipulation helpers from regmap. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 150 +++++++++++++++++-----------------= ---- 1 file changed, 68 insertions(+), 82 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index 7ae86e8d4c72..b7f15164e655 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include =20 @@ -238,7 +239,7 @@ enum tc3587x5_type { }; =20 struct tc_data { - struct i2c_client *i2c; + struct regmap *regmap; struct device *dev; =20 struct drm_bridge bridge; @@ -309,42 +310,6 @@ static void tc_bridge_post_disable(struct drm_bridge *= bridge) usleep_range(10000, 11000); } =20 -static void d2l_read(struct i2c_client *i2c, u16 addr, u32 *val) -{ - int ret; - u8 buf_addr[2]; - - put_unaligned_be16(addr, buf_addr); - ret =3D i2c_master_send(i2c, buf_addr, sizeof(buf_addr)); - if (ret < 0) - goto fail; - - ret =3D i2c_master_recv(i2c, (u8 *)val, sizeof(*val)); - if (ret < 0) - goto fail; - - pr_debug("d2l: I2C : addr:%04x value:%08x\n", addr, *val); - return; - -fail: - dev_err(&i2c->dev, "Error %d reading from subaddress 0x%x\n", - ret, addr); -} - -static void d2l_write(struct i2c_client *i2c, u16 addr, u32 val) -{ - u8 data[6]; - int ret; - - put_unaligned_be16(addr, data); - put_unaligned_le32(val, data + 2); - - ret =3D i2c_master_send(i2c, data, ARRAY_SIZE(data)); - if (ret < 0) - dev_err(&i2c->dev, "Error %d writing to subaddress 0x%x\n", - ret, addr); -} - /* helper function to access bus_formats */ static struct drm_connector *get_connector(struct drm_encoder *encoder) { @@ -358,12 +323,33 @@ static struct drm_connector *get_connector(struct drm= _encoder *encoder) return NULL; } =20 +static const struct reg_sequence tc_lvmux_vesa24[] =3D { + { LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3) }, + { LV_MX0407, LV_MX(LVI_R4, LVI_R7, LVI_R5, LVI_G0) }, + { LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_G6, LVI_G7) }, + { LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0) }, + { LV_MX1619, LV_MX(LVI_B6, LVI_B7, LVI_B1, LVI_B2) }, + { LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0) }, + { LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R6) }, +}; + +/* JEIDA-24/JEIDA-18 have the same mapping */ +static const struct reg_sequence tc_lvmux_jeida18_24[] =3D { + { LV_MX0003, LV_MX(LVI_R2, LVI_R3, LVI_R4, LVI_R5) }, + { LV_MX0407, LV_MX(LVI_R6, LVI_R1, LVI_R7, LVI_G2) }, + { LV_MX0811, LV_MX(LVI_G3, LVI_G4, LVI_G0, LVI_G1) }, + { LV_MX1215, LV_MX(LVI_G5, LVI_G6, LVI_G7, LVI_B2) }, + { LV_MX1619, LV_MX(LVI_B0, LVI_B1, LVI_B3, LVI_B4) }, + { LV_MX2023, LV_MX(LVI_B5, LVI_B6, LVI_B7, LVI_L0) }, + { LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R0) }, +}; + static void tc_bridge_enable(struct drm_bridge *bridge) { struct tc_data *tc =3D bridge_to_tc(bridge); u32 hback_porch, hsync_len, hfront_porch, hactive, htime1, htime2; u32 vback_porch, vsync_len, vfront_porch, vactive, vtime1, vtime2; - u32 val =3D 0; + unsigned int val =3D 0; u16 dsiclk, clkdiv, byteclk, t1, t2, t3, vsdelay; struct drm_display_mode *mode; struct drm_connector *connector =3D get_connector(bridge->encoder); @@ -386,28 +372,29 @@ static void tc_bridge_enable(struct drm_bridge *bridg= e) htime2 =3D (hfront_porch << 16) + hactive; vtime2 =3D (vfront_porch << 16) + vactive; =20 - d2l_read(tc->i2c, IDREG, &val); + regmap_read(tc->regmap, IDREG, &val); =20 dev_info(tc->dev, "DSI2LVDS Chip ID.%02x Revision ID. %02x **\n", (val >> 8) & 0xFF, val & 0xFF); =20 - d2l_write(tc->i2c, SYSRST, SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM | - SYS_RST_LCD | SYS_RST_I2CM); + regmap_write(tc->regmap, SYSRST, + SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM | SYS_RST_LCD | + SYS_RST_I2CM); usleep_range(30000, 40000); =20 - d2l_write(tc->i2c, PPI_TX_RX_TA, TTA_GET | TTA_SURE); - d2l_write(tc->i2c, PPI_LPTXTIMECNT, LPX_PERIOD); - d2l_write(tc->i2c, PPI_D0S_CLRSIPOCOUNT, 3); - d2l_write(tc->i2c, PPI_D1S_CLRSIPOCOUNT, 3); - d2l_write(tc->i2c, PPI_D2S_CLRSIPOCOUNT, 3); - d2l_write(tc->i2c, PPI_D3S_CLRSIPOCOUNT, 3); + regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE); + regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD); + regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, 3); + regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, 3); + regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, 3); + regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, 3); =20 val =3D ((L0EN << tc->num_dsi_lanes) - L0EN) | DSI_CLEN_BIT; - d2l_write(tc->i2c, PPI_LANEENABLE, val); - d2l_write(tc->i2c, DSI_LANEENABLE, val); + regmap_write(tc->regmap, PPI_LANEENABLE, val); + regmap_write(tc->regmap, DSI_LANEENABLE, val); =20 - d2l_write(tc->i2c, PPI_STARTPPI, PPI_START_FUNCTION); - d2l_write(tc->i2c, DSI_STARTDSI, DSI_RX_START); + regmap_write(tc->regmap, PPI_STARTPPI, PPI_START_FUNCTION); + regmap_write(tc->regmap, DSI_STARTDSI, DSI_RX_START); =20 /* Video event mode vs pulse mode bit, does not exist for tc358775 */ if (tc->type =3D=3D TC358765) @@ -431,42 +418,28 @@ static void tc_bridge_enable(struct drm_bridge *bridg= e) vsdelay =3D (clkdiv * (t1 + t3) / byteclk) - hback_porch - hsync_len - ha= ctive; =20 val |=3D TC358775_VPCTRL_VSDELAY(vsdelay); - d2l_write(tc->i2c, VPCTRL, val); + regmap_write(tc->regmap, VPCTRL, val); =20 - d2l_write(tc->i2c, HTIM1, htime1); - d2l_write(tc->i2c, VTIM1, vtime1); - d2l_write(tc->i2c, HTIM2, htime2); - d2l_write(tc->i2c, VTIM2, vtime2); + regmap_write(tc->regmap, HTIM1, htime1); + regmap_write(tc->regmap, VTIM1, vtime1); + regmap_write(tc->regmap, HTIM2, htime2); + regmap_write(tc->regmap, VTIM2, vtime2); =20 - d2l_write(tc->i2c, VFUEN, VFUEN_EN); - d2l_write(tc->i2c, SYSRST, SYS_RST_LCD); - d2l_write(tc->i2c, LVPHY0, LV_PHY0_PRBS_ON(4) | LV_PHY0_ND(6)); + regmap_write(tc->regmap, VFUEN, VFUEN_EN); + regmap_write(tc->regmap, SYSRST, SYS_RST_LCD); + regmap_write(tc->regmap, LVPHY0, LV_PHY0_PRBS_ON(4) | LV_PHY0_ND(6)); =20 dev_dbg(tc->dev, "bus_formats %04x bpc %d\n", connector->display_info.bus_formats[0], tc->bpc); - if (connector->display_info.bus_formats[0] =3D=3D - MEDIA_BUS_FMT_RGB888_1X7X4_SPWG) { - /* VESA-24 */ - d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3)); - d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_R7, LVI_R5, LVI_G0)); - d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_G6, LVI_G7)); - d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0)); - d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_B6, LVI_B7, LVI_B1, LVI_B2)); - d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0)); - d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R6)); - } else { - /* JEIDA-18 and JEIDA-24 */ - d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R2, LVI_R3, LVI_R4, LVI_R5)); - d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R6, LVI_R1, LVI_R7, LVI_G2)); - d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G3, LVI_G4, LVI_G0, LVI_G1)); - d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G5, LVI_G6, LVI_G7, LVI_B2)); - d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_B0, LVI_B1, LVI_B3, LVI_B4)); - d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B5, LVI_B6, LVI_B7, LVI_L0)); - d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R0)); - } + if (connector->display_info.bus_formats[0] =3D=3D MEDIA_BUS_FMT_RGB888_1X= 7X4_SPWG) + regmap_multi_reg_write(tc->regmap, tc_lvmux_vesa24, + ARRAY_SIZE(tc_lvmux_vesa24)); + else + regmap_multi_reg_write(tc->regmap, tc_lvmux_jeida18_24, + ARRAY_SIZE(tc_lvmux_jeida18_24)); =20 - d2l_write(tc->i2c, VFUEN, VFUEN_EN); + regmap_write(tc->regmap, VFUEN, VFUEN_EN); =20 val =3D LVCFG_LVEN_BIT; if (tc->lvds_link =3D=3D DUAL_LINK) { @@ -475,7 +448,7 @@ static void tc_bridge_enable(struct drm_bridge *bridge) } else { val |=3D TC358775_LVCFG_PCLKDIV(DIVIDE_BY_3); } - d2l_write(tc->i2c, LVCFG, val); + regmap_write(tc->regmap, LVCFG, val); } =20 /* @@ -617,7 +590,7 @@ static const struct drm_bridge_funcs tc_bridge_funcs = =3D { =20 static int tc_attach_host(struct tc_data *tc) { - struct device *dev =3D &tc->i2c->dev; + struct device *dev =3D tc->dev; struct mipi_dsi_host *host; struct mipi_dsi_device *dsi; int ret; @@ -665,6 +638,14 @@ static int tc_attach_host(struct tc_data *tc) return 0; } =20 +static const struct regmap_config tc358775_regmap_config =3D { + .reg_bits =3D 16, + .val_bits =3D 32, + .max_register =3D 0xffff, + .reg_format_endian =3D REGMAP_ENDIAN_BIG, + .val_format_endian =3D REGMAP_ENDIAN_LITTLE, +}; + static int tc_probe(struct i2c_client *client) { struct device *dev =3D &client->dev; @@ -679,6 +660,11 @@ static int tc_probe(struct i2c_client *client) tc->i2c =3D client; tc->type =3D (enum tc3587x5_type)(unsigned long)of_device_get_match_data(= dev); =20 + tc->regmap =3D devm_regmap_init_i2c(client, &tc358775_regmap_config); + if (IS_ERR(tc->regmap)) + return dev_err_probe(dev, PTR_ERR(tc->regmap), + "regmap i2c init failed\n"); + tc->panel_bridge =3D devm_drm_of_get_bridge(dev, dev->of_node, TC358775_LVDS_OUT0, 0); if (IS_ERR(tc->panel_bridge)) --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80F6582486 for ; Mon, 6 May 2024 13:35:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002542; cv=none; b=qoJ6OHQoTyNYdMCJC4PC0O2huMMSsYpKlMZWYjPCdz6rGTp339/xRWG/ykAuoqHS6wjqr1OeGXESapSYeZkiOy3Xrw6u7Jm+xMmdJvLbV6MBFHa5+KZHTbhAvFDKL1C09nRPn1QJagcxQKH1tb+I5YeKq2EBul657RqI2B2Oo4o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002542; c=relaxed/simple; bh=On4XVAth8phH/tpwuPnVAjW8rZ3xEljXuSTJvjxVCxA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=beUUaIhFHWyMJReVCMSqYcUKb0fOOyIdgU/qcKfOs2Vt7Pfal9TleSiwDZwaUEsyuWTVHcxrGIo99kBf+7LFQc3WcHxp5A4ATRTJQc4yO1SG6fPYfg1srnU3IzY1DMIRINo4WQxXnH2Dbkdgdr2YYWdaTvhSSQGyluX8IqacSjs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Ikbmr446; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Ikbmr446" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EC444C116B1; Mon, 6 May 2024 13:35:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002542; bh=On4XVAth8phH/tpwuPnVAjW8rZ3xEljXuSTJvjxVCxA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Ikbmr446+4FNMnf+X2Ixk0yrmfaW3BrQGq12yjTcqCoCnSMkfSMw79qQvU1rgZfqu JcZnBDtaLaFpqmQqg4UdyeA5sK5j3exP0iGyduTW+eyccA9s4j2R2u7Lm954PYjFJ1 Q+l9MRMFtFOtcpDQ8ztJ8OYkO3Ce1eEN/UUkyu6VIt2vdXkRs8dxE10Y7teetNDRns cdh+7BrTVQUTngjQ2ZR5sArhQPeeXTR/doaIIdckPjZqmAcuvwIr3bYhciLCreXU9j 6zdG+E+/fBgrr4+SEsziVEUOj+pHa3QSTlHgUxUB4CL6ONgrBQh8PAJVMZlOYWzcoi BbhbiM5RK5trg== From: Michael Walle Date: Mon, 06 May 2024 15:34:37 +0200 Subject: [PATCH 08/20] drm/bridge: tc358775: remove error message if regulator is missing Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-8-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 A missing regulator node will automatically be replaced by a dummy. Thus regulators are optional anyway. Remove the error message. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index b7f15164e655..54aea58a3406 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -675,18 +675,12 @@ static int tc_probe(struct i2c_client *client) return ret; =20 tc->vddio =3D devm_regulator_get(dev, "vddio"); - if (IS_ERR(tc->vddio)) { - ret =3D PTR_ERR(tc->vddio); - dev_err(dev, "vddio-supply not found\n"); - return ret; - } + if (IS_ERR(tc->vddio)) + return PTR_ERR(tc->vddio); =20 tc->vdd =3D devm_regulator_get(dev, "vdd"); - if (IS_ERR(tc->vdd)) { - ret =3D PTR_ERR(tc->vdd); - dev_err(dev, "vdd-supply not found\n"); - return ret; - } + if (IS_ERR(tc->vdd)) + return PTR_ERR(tc->vdd); =20 tc->stby_gpio =3D devm_gpiod_get_optional(dev, "stby", GPIOD_OUT_HIGH); if (IS_ERR(tc->stby_gpio)) --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC43C78C89 for ; Mon, 6 May 2024 13:35:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002547; cv=none; b=COWxCp/Oji4HNfAVtv3E6C0CL3fZlPxkoBZ9cPXX3T4oP1B6q0CrJw8z5LSoZXxtOk5cRusQ1OW/vGM3UI9vNg7LynZeuqWgC8F7xNIA9AkxNZa3JX5YQUlxSYXp/Yx8z9jW6cLyXwJTXQA9AQBCi7lbHON+oavQJTwV8dwUDNE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002547; c=relaxed/simple; bh=gBI1ftlJZK9GLIPJr/NbCBA/Qls8YZkI0rH9liGw82E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TjN/wzv7y6+WMqIoq03Gs0RaotAGVqLxqQK9dSI6Owr3bFgxz7TX7NmJu4le8mGuEaYQfoccN6ZUdF04hnuRnqJeJ5snKsgbQmMJqlEc20BsmNy7Eavo5qmO1jfibuwIaiPJjitmpKt7xoKtqI1a05h+u8Uuy+25k+I98Ltp2NE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=h9hLaZa9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="h9hLaZa9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CB2EAC4AF67; Mon, 6 May 2024 13:35:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002547; bh=gBI1ftlJZK9GLIPJr/NbCBA/Qls8YZkI0rH9liGw82E=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=h9hLaZa9H6GjxzIZRfYYsRrPiaEmUBLgk6uaHxdbdFwp22Q8cgdEsaIYiY/Rf9Ypn lKfCsi5ROojUiHyhphcOKtuGgMn09uF3w7sGI7DHHmw2wJfmOSWNqILS6JyTqtR9mI vTuU+4CE27bz6NZqk7YLmD41xVHbRzFLlUmbvDv8txUgLoEyF8D9AvcZ7zPiVB+ui8 TvBIrBVQR0u5CFL8Bwl8nowBUbU/Ns+7KxHFwvblEdcotqt5Gym8KN1BTbu6g1+FR8 AGjo26xCkv+3PXBt4SaWMbcRwgdKOz6aL0v5qHB8opihXv97Ht6PM7oKtG2bMOFK4c cxXwl1Tzm7rXg== From: Michael Walle Date: Mon, 06 May 2024 15:34:38 +0200 Subject: [PATCH 09/20] drm/bridge: tc358775: remove complex vsdelay calculation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-9-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 To cite the datasheet on VSDELAY: During DSI link speed is slower than that of LVDS link=E2=80=99s, data ne= eds to be buffer within 775XBG before outputting to prevent data from underflow. Register field VPCTRL[VSDELAY] is used to for this purpose This driver assumes that the DSI link speed is the pixel clock (as does every DSI bridge driver), after all the LVDS clock is derived from the DSI clock. Thus we know for a fact, that the DSI link is not slower than the LVDS side. Just use the (sane) default value of the bridge and drop the complicated calculation here. While at it, replace the TC358775_VPCTRL_MSF() and TC358775_VPCTRL_OPXLFMT() inline functions by the usual macros for a bit flag. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 49 +++++++----------------------------= ---- 1 file changed, 8 insertions(+), 41 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index 54aea58a3406..a9d731e87970 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -109,7 +109,9 @@ #define RDPKTLN 0x0404 /* Command Read Packet Length */ =20 #define VPCTRL 0x0450 /* Video Path Control */ -#define EVTMODE BIT(5) /* Video event mode enable, tc35876x only */ +#define VPCTRL_MSF BIT(0) +#define VPCTRL_OPXLFMT BIT(8) +#define VPCTRL_EVTMODE BIT(5) /* Video event mode enable, tc35876x only */ #define HTIM1 0x0454 /* Horizontal Timing Control 1 */ #define HTIM2 0x0458 /* Horizontal Timing Control 2 */ #define VTIM1 0x045C /* Vertical Timing Control 1 */ @@ -187,30 +189,6 @@ enum { =20 #define L0EN BIT(1) =20 -#define TC358775_VPCTRL_VSDELAY__MASK 0x3FF00000 -#define TC358775_VPCTRL_VSDELAY__SHIFT 20 -static inline u32 TC358775_VPCTRL_VSDELAY(uint32_t val) -{ - return ((val) << TC358775_VPCTRL_VSDELAY__SHIFT) & - TC358775_VPCTRL_VSDELAY__MASK; -} - -#define TC358775_VPCTRL_OPXLFMT__MASK 0x00000100 -#define TC358775_VPCTRL_OPXLFMT__SHIFT 8 -static inline u32 TC358775_VPCTRL_OPXLFMT(uint32_t val) -{ - return ((val) << TC358775_VPCTRL_OPXLFMT__SHIFT) & - TC358775_VPCTRL_OPXLFMT__MASK; -} - -#define TC358775_VPCTRL_MSF__MASK 0x00000001 -#define TC358775_VPCTRL_MSF__SHIFT 0 -static inline u32 TC358775_VPCTRL_MSF(uint32_t val) -{ - return ((val) << TC358775_VPCTRL_MSF__SHIFT) & - TC358775_VPCTRL_MSF__MASK; -} - #define TC358775_LVCFG_PCLKDIV__MASK 0x000000f0 #define TC358775_LVCFG_PCLKDIV__SHIFT 4 static inline u32 TC358775_LVCFG_PCLKDIV(uint32_t val) @@ -350,7 +328,6 @@ static void tc_bridge_enable(struct drm_bridge *bridge) u32 hback_porch, hsync_len, hfront_porch, hactive, htime1, htime2; u32 vback_porch, vsync_len, vfront_porch, vactive, vtime1, vtime2; unsigned int val =3D 0; - u16 dsiclk, clkdiv, byteclk, t1, t2, t3, vsdelay; struct drm_display_mode *mode; struct drm_connector *connector =3D get_connector(bridge->encoder); =20 @@ -398,27 +375,17 @@ static void tc_bridge_enable(struct drm_bridge *bridg= e) =20 /* Video event mode vs pulse mode bit, does not exist for tc358775 */ if (tc->type =3D=3D TC358765) - val =3D EVTMODE; + val =3D VPCTRL_EVTMODE; else val =3D 0; =20 if (tc->bpc =3D=3D 8) - val |=3D TC358775_VPCTRL_OPXLFMT(1); + val |=3D VPCTRL_OPXLFMT; else /* bpc =3D 6; */ - val |=3D TC358775_VPCTRL_MSF(1); - - dsiclk =3D mode->crtc_clock * 3 * tc->bpc / tc->num_dsi_lanes / 1000; - clkdiv =3D dsiclk / (tc->lvds_link =3D=3D DUAL_LINK ? DIVIDE_BY_6 : DIVID= E_BY_3); - byteclk =3D dsiclk / 4; - t1 =3D hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes; - t2 =3D ((100000 / clkdiv)) * (hactive + hback_porch + hsync_len + hfront_= porch) / 1000; - t3 =3D ((t2 * byteclk) / 100) - (hactive * (tc->bpc * 3 / 8) / - tc->num_dsi_lanes); - - vsdelay =3D (clkdiv * (t1 + t3) / byteclk) - hback_porch - hsync_len - ha= ctive; + val |=3D VPCTRL_MSF; =20 - val |=3D TC358775_VPCTRL_VSDELAY(vsdelay); - regmap_write(tc->regmap, VPCTRL, val); + regmap_update_bits(tc->regmap, VPCTRL, val, + VPCTRL_OPXLFMT | VPCTRL_MSF | VPCTRL_EVTMODE); =20 regmap_write(tc->regmap, HTIM1, htime1); regmap_write(tc->regmap, VTIM1, vtime1); --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4024C79B9D for ; Mon, 6 May 2024 13:35:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002552; cv=none; b=UEaMLwBiUgr4MWeI2qQogJ0Jn7Ma7HtTMnua5kxRxJf+7kaT27XHhvj7xRWutf4+PMgMHYNkUsieHYYTI/u28JpigXoJOIyG9V45pkemTtV1egwIgeH8JzQOxCEdCGpIWnymsuoSgnWugc/oio23Id3HnXUlsmy+QllSOKfpMSE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002552; c=relaxed/simple; bh=WxRrG6WTFlRQfn6WWcefR6HHCbkvvHD6Cc1lLV/qbGE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=b9QkpXlpJAI5GN/pm3/gz/hn/rBmrYZriCpnBqm3jZBocuoeJDQ1ZRTXi4037riUbBU01NhTxlGKN0ZZa5dj4y562VDKyE3BRx8Erhas9lXcgyHbiEpaX7rN/pXW4f23lKuk61cVdB0wo6HW28ZBCxQ5dapkGl1fCRfojnkDfEY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fkIFGsQv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fkIFGsQv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AC6E7C4DDE0; Mon, 6 May 2024 13:35:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002552; bh=WxRrG6WTFlRQfn6WWcefR6HHCbkvvHD6Cc1lLV/qbGE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fkIFGsQvkv1zts7XnHArWvq5f6naVeYQf+gyv4hIjws7yh55elTEiD8E/gZClAhKt 2Nm8vAV4FymXXd+glXnlSr9Wi4znWxmiXt0ju4tdA60Zf/sl9QcxuMD6XMzogZ0i+f XZekXyKMV8g+eGYA8o2AxeORRn1LY73iuelV5XTvS8qB9VhsOyNcdYRR1VI7F31Bqy 61wBlpLyw6poCnKygq72ifnnqGRa2Y9LtUlhMr6OB6IDF7522UfUhiu07Dc907F4GA LrfmNplDZxSkhYiQGJjHvN4Rf3vmZd1re2RAEgCYpFFCwgSkRTME6JNwvTXNNQaen+ +vPi2Xo0NRgZQ== From: Michael Walle Date: Mon, 06 May 2024 15:34:39 +0200 Subject: [PATCH 10/20] drm/bridge: tc358775: simplify lvds_link property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-10-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 The LVDS link can either be a single link or a dual link. No need for a u8. Replace it with a bool "lvds_dual_link". Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index a9d731e87970..be2175571b99 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -231,7 +231,7 @@ struct tc_data { struct regulator *vddio; struct gpio_desc *reset_gpio; struct gpio_desc *stby_gpio; - u8 lvds_link; /* single-link or dual-link */ + bool lvds_dual_link; u8 bpc; =20 enum tc3587x5_type type; @@ -409,7 +409,7 @@ static void tc_bridge_enable(struct drm_bridge *bridge) regmap_write(tc->regmap, VFUEN, VFUEN_EN); =20 val =3D LVCFG_LVEN_BIT; - if (tc->lvds_link =3D=3D DUAL_LINK) { + if (tc->lvds_dual_link) { val |=3D TC358775_LVCFG_LVDLINK(1); val |=3D TC358775_LVCFG_PCLKDIV(DIVIDE_BY_6); } else { @@ -460,8 +460,8 @@ tc_mode_valid(struct drm_bridge *bridge, * Maximum pixel clock speed 135MHz for single-link * 270MHz for dual-link */ - if ((mode->clock > 135000 && tc->lvds_link =3D=3D SINGLE_LINK) || - (mode->clock > 270000 && tc->lvds_link =3D=3D DUAL_LINK)) + if ((mode->clock > 135000 && !tc->lvds_dual_link) || + (mode->clock > 270000 && tc->lvds_dual_link)) return MODE_CLOCK_HIGH; =20 switch (info->bus_formats[0]) { @@ -516,7 +516,6 @@ static int tc358775_parse_dt(struct device_node *np, st= ruct tc_data *tc) =20 of_node_put(tc->host_node); =20 - tc->lvds_link =3D SINGLE_LINK; endpoint =3D of_graph_get_endpoint_by_regs(tc->dev->of_node, TC358775_LVDS_OUT1, -1); if (endpoint) { @@ -525,13 +524,14 @@ static int tc358775_parse_dt(struct device_node *np, = struct tc_data *tc) =20 if (remote) { if (of_device_is_available(remote)) - tc->lvds_link =3D DUAL_LINK; + tc->lvds_dual_link =3D true; of_node_put(remote); } } =20 dev_dbg(tc->dev, "no.of dsi lanes: %d\n", tc->num_dsi_lanes); - dev_dbg(tc->dev, "operating in %d-link mode\n", tc->lvds_link); + dev_dbg(tc->dev, "operating in %s-link mode\n", + tc->lvds_dual_link ? "dual" : "single"); =20 return 0; } --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B8CF79B9D for ; Mon, 6 May 2024 13:35:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002557; cv=none; b=HQsetPDlAmnI1d1gu1vL8GlJsBuQxqjefScDOuDf0pxrF/laqvVRQ7R3tXcehSVsUmgrEGLYdpKzwjI7M7e2qdkAelptsKoHk8Rq6qurwHCepQ7cUdlwbpfsMPMKH8evKsRrg4kImXX1SVFk+a7pz1xTpNa+HXZGAheX1kUayTk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002557; c=relaxed/simple; bh=0kDtbAaVTUzCfU0u7ieyZBAWWC/9d6iWWtENhJGOYbs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=U6NOKHTYwEaMjGIlphv2Y3D3j1DS7V8CdF/69n4XSiBtZQWibb1ogfPqQChzG+oa4yuZrzWdO/kbEVBfwWPswFOZ1o24wa4/AxqzeDyYfZk+f5+CvvgahFq5yKy5MAbUU3pjYijMTM+vFV6cLHpBYmKsNwuiIs6BtSGv31mX2SQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lR9oKcUP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lR9oKcUP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8B47FC4DDE1; Mon, 6 May 2024 13:35:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002557; bh=0kDtbAaVTUzCfU0u7ieyZBAWWC/9d6iWWtENhJGOYbs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=lR9oKcUPpndQp18qBV2mivcjy5kCKkBF2vXx/0ArM+BTUOKgA1xP3vAJGn+Flb0eT ykzkprANmvCZsVEeLfqtVIhJWrmhZMrEH++iJMmN9TEzWSR4IbXrpJfYycMRFQHrRm P0iURHTBT2I627ep7jAhQsCgQ4qXcpNqb1FhnDHOduu5LVnf/CG1h+UEsmH72UMjDl wm+mTtr80qXdKbW2c4xhJoglyiYi5fnBirDDMqCgXJseEKdDyCYeHv4QvIusbD847m MPQuOzC5k93U5fsv0gDViI1ej/aRkesOWMzvxK4CA/lXlbXxxTsshhNpJcDOk3enw7 ukHmYtM8RpLQQ== From: Michael Walle Date: Mon, 06 May 2024 15:34:40 +0200 Subject: [PATCH 11/20] drm/bridge: tc358775: reformat weird indentation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-11-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 Reformat the indentation of the mipi_dsi_device_info initialization. While at it, move it to the top of the function. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index be2175571b99..e6d1f0c686ac 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -557,14 +557,15 @@ static const struct drm_bridge_funcs tc_bridge_funcs = =3D { =20 static int tc_attach_host(struct tc_data *tc) { + const struct mipi_dsi_device_info info =3D { + .type =3D "tc358775", + .channel =3D 0, + .node =3D NULL, + }; struct device *dev =3D tc->dev; struct mipi_dsi_host *host; struct mipi_dsi_device *dsi; int ret; - const struct mipi_dsi_device_info info =3D { .type =3D "tc358775", - .channel =3D 0, - .node =3D NULL, - }; =20 host =3D of_find_mipi_dsi_host_by_node(tc->host_node); if (!host) --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F0F37E0EA for ; Mon, 6 May 2024 13:36:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002562; cv=none; b=ium2Pzi5eS0Yr6fOKQo05bFrwlJ73WTmm3IFikxaW6IXE0Iq94vQchjARGM9H+unEHrG3qMS1nE3NY3FiX90rBdntn8RiEPC2zgZ9VFxLc0CCMyp8wVlAFOa2b8ZwyCU04g33Afk/Vkb8bX7Il74gOYoBACXemoEjoxIHL0r8AE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002562; c=relaxed/simple; bh=YmpOGEQU+z5JeHvt+cgcHdm9hosKLft7UIh+6MtYGhg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=r4kd7by/fqzLw6DFIL7spPQA6qnrJgn3ybl2rmd+z2qfvU2ceeO2E3ZaSxSMBkIglWDWAOm794UhE1pFdHBiNlZ0XszDC4Shwd8jUD5FmziTNQSSQtw1M3fVk78cfeYfuOC+2I1p0G2KqTtj315y60m47cLaHngQFwBMTHjMSts= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=a3ct+NdR; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="a3ct+NdR" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C6837C4DDE5; Mon, 6 May 2024 13:35:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002562; bh=YmpOGEQU+z5JeHvt+cgcHdm9hosKLft7UIh+6MtYGhg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=a3ct+NdR+5aJutYApenouWYx06bW4/90sUE6T0mSnF6DwppBal8R6H5WFjpl8EsN1 1R9euYYTnHrPB4mjxmjXVXXnQH/PWXYf/SO4FWYmNrImmlOwVPU8y6oRUtC2gzRgo8 WoKZdyUMoON1o3K+TT4biGHTWYtq0AEq0O2xl/CegLTNzmSd31jTX6eXHbZEgRyUMg me2+z/jwu3HzdRYjEMSOBa16g5eU0wScs8L1ykrQsJfeIe8NBVHWMnUoViR58GWqgi bpDDT5NBgrk8WAX9VI/u+vzi2K0W+JtwWWz66R5aC/hWQCRhBCTL7euBpsJydX5Mxr Nb5fgv6ijkMuQ== From: Michael Walle Date: Mon, 06 May 2024 15:34:41 +0200 Subject: [PATCH 12/20] drm/bridge: tc358775: correctly configure LVDS clock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-12-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 The driver assumes a DSI link with four lanes for now and has the LVDS clock divider hardcoded to either 3 or 6. Take the number of lanes into account, too. Also, explicitly set the clock source to the DSI clock. While at it, replace the TC358775_LVCFG_PCLKDIV() and TC358775_LVCFG_LVDLINK() inline functions style by the more common linux bitfields functions. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 48 +++++++++++++++++------------------= ---- 1 file changed, 21 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index e6d1f0c686ac..eea41054c6fa 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -139,6 +139,12 @@ enum { }; =20 #define LVCFG 0x049C /* LVDS Configuration */ +#define LVCFG_LVEN BIT(0) +#define LVCFG_LVDLINK BIT(1) +#define LVCFG_PCLKDIV GENMASK(7, 4) +#define LVCFG_PCLKSEL GENMASK(11, 10) +#define PCLKSEL_HSRCK 0 /* DSI clock */ + #define LVPHY0 0x04A0 /* LVDS PHY 0 */ #define LV_PHY0_RST(v) FLD_VAL(v, 22, 22) /* PHY reset */ #define LV_PHY0_IS(v) FLD_VAL(v, 15, 14) @@ -183,28 +189,8 @@ enum { #define DEBUG01 0x05A4 /* LVDS Data */ =20 #define DSI_CLEN_BIT BIT(0) -#define DIVIDE_BY_3 3 /* PCLK=3DDCLK/3 */ -#define DIVIDE_BY_6 6 /* PCLK=3DDCLK/6 */ -#define LVCFG_LVEN_BIT BIT(0) - #define L0EN BIT(1) =20 -#define TC358775_LVCFG_PCLKDIV__MASK 0x000000f0 -#define TC358775_LVCFG_PCLKDIV__SHIFT 4 -static inline u32 TC358775_LVCFG_PCLKDIV(uint32_t val) -{ - return ((val) << TC358775_LVCFG_PCLKDIV__SHIFT) & - TC358775_LVCFG_PCLKDIV__MASK; -} - -#define TC358775_LVCFG_LVDLINK__MASK 0x00000002 -#define TC358775_LVCFG_LVDLINK__SHIFT 1 -static inline u32 TC358775_LVCFG_LVDLINK(uint32_t val) -{ - return ((val) << TC358775_LVCFG_LVDLINK__SHIFT) & - TC358775_LVCFG_LVDLINK__MASK; -} - enum tc358775_ports { TC358775_DSI_IN, TC358775_LVDS_OUT0, @@ -327,6 +313,8 @@ static void tc_bridge_enable(struct drm_bridge *bridge) struct tc_data *tc =3D bridge_to_tc(bridge); u32 hback_porch, hsync_len, hfront_porch, hactive, htime1, htime2; u32 vback_porch, vsync_len, vfront_porch, vactive, vtime1, vtime2; + int bpp =3D mipi_dsi_pixel_format_to_bpp(tc->dsi->format); + int clkdiv; unsigned int val =3D 0; struct drm_display_mode *mode; struct drm_connector *connector =3D get_connector(bridge->encoder); @@ -408,14 +396,20 @@ static void tc_bridge_enable(struct drm_bridge *bridg= e) =20 regmap_write(tc->regmap, VFUEN, VFUEN_EN); =20 - val =3D LVCFG_LVEN_BIT; - if (tc->lvds_dual_link) { - val |=3D TC358775_LVCFG_LVDLINK(1); - val |=3D TC358775_LVCFG_PCLKDIV(DIVIDE_BY_6); - } else { - val |=3D TC358775_LVCFG_PCLKDIV(DIVIDE_BY_3); - } + /* Configure LVDS clock */ + clkdiv =3D bpp / tc->num_dsi_lanes; + if (!tc->lvds_dual_link) + clkdiv /=3D 2; + + val =3D u32_encode_bits(clkdiv, LVCFG_PCLKDIV); + val |=3D u32_encode_bits(PCLKSEL_HSRCK, LVCFG_PCLKSEL); + if (tc->lvds_dual_link) + val |=3D LVCFG_LVDLINK; + regmap_write(tc->regmap, LVCFG, val); + + /* Finally, enable the LVDS transmitter */ + regmap_write(tc->regmap, LVCFG, val | LVCFG_LVEN); } =20 /* --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36DA87E576 for ; Mon, 6 May 2024 13:36:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002567; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002567; bh=U++vjZErufFCzBdu3b4IcIRynyBzsebPGzPRgF2N9j8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=bVFhg8v8Sjt3je+jx9V+ucQn1tO2VT3Sn8/8uR0jztaop6jADw4URV/VItTkMWpVv yXLl84B1pUIEw50a6eOsJLAgZIvDrPe9QHRXHvVHEXlIYv+pm+2BYfZ7iI6fYt7sbO iWC/zqCo5fkt/DuKjbYsoSIpvrB2sHw+xjajZmc/ftQFCt5g9kFzE9uAsuylRWYJtI P6tZVOhXy8UyTvfOW5HWv9N/t7uM+E2la+YsJqxmef5jbn11skzxpN6rkHFkYs6Wq3 /f5RRbBPljplEG39SKnz0EOWndsiaXNwokcouyhZrSFxLQDY6aHUj8dSPsv56DxrU7 Dne4rwX77cUjQ== From: Michael Walle Date: Mon, 06 May 2024 15:34:42 +0200 Subject: [PATCH 13/20] drm/bridge: tc358775: split the init code Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-13-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 Split the initialization code in tc_bridge_enable() into specific functions. This is a preparation for further code cleanup and fixes. No functional change. While at it, rename tc_bridge_enable() to the more specific tc358775_bridge_enable(). Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 106 ++++++++++++++++++++++++----------= ---- 1 file changed, 66 insertions(+), 40 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index eea41054c6fa..4ec059531c5f 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -308,18 +308,30 @@ static const struct reg_sequence tc_lvmux_jeida18_24[= ] =3D { { LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R0) }, }; =20 -static void tc_bridge_enable(struct drm_bridge *bridge) +static void tc358775_configure_dsi(struct tc_data *tc) +{ + unsigned int val; + + regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE); + regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD); + regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, 3); + regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, 3); + regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, 3); + regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, 3); + + val =3D ((L0EN << tc->num_dsi_lanes) - L0EN) | DSI_CLEN_BIT; + regmap_write(tc->regmap, PPI_LANEENABLE, val); + regmap_write(tc->regmap, DSI_LANEENABLE, val); + + regmap_write(tc->regmap, PPI_STARTPPI, PPI_START_FUNCTION); + regmap_write(tc->regmap, DSI_STARTDSI, DSI_RX_START); +} + +static void tc358775_configure_lvds_timings(struct tc_data *tc, + struct drm_display_mode *mode) { - struct tc_data *tc =3D bridge_to_tc(bridge); u32 hback_porch, hsync_len, hfront_porch, hactive, htime1, htime2; u32 vback_porch, vsync_len, vfront_porch, vactive, vtime1, vtime2; - int bpp =3D mipi_dsi_pixel_format_to_bpp(tc->dsi->format); - int clkdiv; - unsigned int val =3D 0; - struct drm_display_mode *mode; - struct drm_connector *connector =3D get_connector(bridge->encoder); - - mode =3D &bridge->encoder->crtc->state->adjusted_mode; =20 hback_porch =3D mode->htotal - mode->hsync_end; hsync_len =3D mode->hsync_end - mode->hsync_start; @@ -337,30 +349,6 @@ static void tc_bridge_enable(struct drm_bridge *bridge) htime2 =3D (hfront_porch << 16) + hactive; vtime2 =3D (vfront_porch << 16) + vactive; =20 - regmap_read(tc->regmap, IDREG, &val); - - dev_info(tc->dev, "DSI2LVDS Chip ID.%02x Revision ID. %02x **\n", - (val >> 8) & 0xFF, val & 0xFF); - - regmap_write(tc->regmap, SYSRST, - SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM | SYS_RST_LCD | - SYS_RST_I2CM); - usleep_range(30000, 40000); - - regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE); - regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD); - regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, 3); - regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, 3); - regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, 3); - regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, 3); - - val =3D ((L0EN << tc->num_dsi_lanes) - L0EN) | DSI_CLEN_BIT; - regmap_write(tc->regmap, PPI_LANEENABLE, val); - regmap_write(tc->regmap, DSI_LANEENABLE, val); - - regmap_write(tc->regmap, PPI_STARTPPI, PPI_START_FUNCTION); - regmap_write(tc->regmap, DSI_STARTDSI, DSI_RX_START); - /* Video event mode vs pulse mode bit, does not exist for tc358775 */ if (tc->type =3D=3D TC358765) val =3D VPCTRL_EVTMODE; @@ -381,20 +369,31 @@ static void tc_bridge_enable(struct drm_bridge *bridg= e) regmap_write(tc->regmap, VTIM2, vtime2); =20 regmap_write(tc->regmap, VFUEN, VFUEN_EN); +} + +static void tc358775_configure_pll(struct tc_data *tc, int pixelclk) +{ regmap_write(tc->regmap, SYSRST, SYS_RST_LCD); regmap_write(tc->regmap, LVPHY0, LV_PHY0_PRBS_ON(4) | LV_PHY0_ND(6)); +} =20 - dev_dbg(tc->dev, "bus_formats %04x bpc %d\n", - connector->display_info.bus_formats[0], - tc->bpc); - if (connector->display_info.bus_formats[0] =3D=3D MEDIA_BUS_FMT_RGB888_1X= 7X4_SPWG) +static void tc358775_configure_color_mapping(struct tc_data *tc, u32 fmt) +{ + dev_dbg(tc->dev, "bus_formats %04x bpc %d\n", fmt, tc->bpc); + + if (fmt =3D=3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG) regmap_multi_reg_write(tc->regmap, tc_lvmux_vesa24, ARRAY_SIZE(tc_lvmux_vesa24)); else regmap_multi_reg_write(tc->regmap, tc_lvmux_jeida18_24, ARRAY_SIZE(tc_lvmux_jeida18_24)); +} =20 - regmap_write(tc->regmap, VFUEN, VFUEN_EN); +static void tc358775_configure_lvds_clock(struct tc_data *tc) +{ + int bpp =3D mipi_dsi_pixel_format_to_bpp(tc->dsi->format); + unsigned int val; + int clkdiv; =20 /* Configure LVDS clock */ clkdiv =3D bpp / tc->num_dsi_lanes; @@ -407,9 +406,36 @@ static void tc_bridge_enable(struct drm_bridge *bridge) val |=3D LVCFG_LVDLINK; =20 regmap_write(tc->regmap, LVCFG, val); +} + +static void tc358775_bridge_enable(struct drm_bridge *bridge) +{ + struct tc_data *tc =3D bridge_to_tc(bridge); + unsigned int val =3D 0; + struct drm_display_mode *mode; + struct drm_connector *connector =3D get_connector(bridge->encoder); + + mode =3D &bridge->encoder->crtc->state->adjusted_mode; + + regmap_read(tc->regmap, IDREG, &val); + + dev_info(tc->dev, "DSI2LVDS Chip ID.%02x Revision ID. %02x **\n", + (val >> 8) & 0xFF, val & 0xFF); + + regmap_write(tc->regmap, SYSRST, + SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM | SYS_RST_LCD | + SYS_RST_I2CM); + usleep_range(30000, 40000); + + tc358775_configure_dsi(tc); + tc358775_configure_lvds_timings(tc, mode); + tc358775_configure_pll(tc, mode->crtc_clock); + tc358775_configure_color_mapping(tc, connector->display_info.bus_formats[= 0]); + regmap_write(tc->regmap, VFUEN, VFUEN_EN); + tc358775_configure_lvds_clock(tc); =20 /* Finally, enable the LVDS transmitter */ - regmap_write(tc->regmap, LVCFG, val | LVCFG_LVEN); + regmap_update_bits(tc->regmap, LVCFG, LVCFG_LVEN, LVCFG_LVEN); } =20 /* @@ -543,7 +569,7 @@ static int tc_bridge_attach(struct drm_bridge *bridge, static const struct drm_bridge_funcs tc_bridge_funcs =3D { .attach =3D tc_bridge_attach, .pre_enable =3D tc_bridge_pre_enable, - .enable =3D tc_bridge_enable, + .enable =3D tc358775_bridge_enable, .mode_fixup =3D tc_mode_fixup, .mode_valid =3D tc_mode_valid, .post_disable =3D tc_bridge_post_disable, --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 226537E79F for ; Mon, 6 May 2024 13:36:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 6 May 2024 13:36:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002572; bh=2qrwEGgpJfR6a/ANS2qyau3152FW/n1Efs/NSwqyfq0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fKoAURvJwU7PQ7A60+LC3D9rbSoxh2IprTicgx6iHdgw3xbzOSx2GCVLTVCbZ8djJ H9QxnH6/50KnMgSdXODGrFTgXNaVh9GCX11xdLqtPLL0iGtFXOL3dSlsLoulF5vDF3 ZEmnFSoveKIZMx4szbIqoGWCBIDh9KHXRTpqaisLILlO3XoCb7AEfM/nw7QQlD8Uhe ZWqLFtr4EhSi+HBShK4RKdoEAeZNdCSECkUVRdry/lyn7nV0AlWtNJT0sxJ98/W8dc 4BbBk9pO1I5pGtzn3vjfJ4DYAAjyDVGkAhO5dZCJ2xPkjdUB3dniX81Xw5BffzQXjX n7Yyvgt4OaJPw== From: Michael Walle Date: Mon, 06 May 2024 15:34:43 +0200 Subject: [PATCH 14/20] drm/bridge: tc358775: configure PLL depending on the LVDS clock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-14-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 The PLL setting was hardcoded to a LVDS clock between 60MHz and 135MHz. This adds support for slower frequencies. Also, rework the reset sequence to match the initialization sequence provided by the vendor. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 50 ++++++++++++++++++++++++++++++++---= ---- 1 file changed, 42 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index 4ec059531c5f..e3fba7ac71ec 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -30,8 +30,6 @@ #include #include =20 -#define FLD_VAL(val, start, end) FIELD_PREP(GENMASK(start, end), val) - /* Registers */ =20 /* DSI D-PHY Layer Registers */ @@ -146,10 +144,10 @@ enum { #define PCLKSEL_HSRCK 0 /* DSI clock */ =20 #define LVPHY0 0x04A0 /* LVDS PHY 0 */ -#define LV_PHY0_RST(v) FLD_VAL(v, 22, 22) /* PHY reset */ -#define LV_PHY0_IS(v) FLD_VAL(v, 15, 14) -#define LV_PHY0_ND(v) FLD_VAL(v, 4, 0) /* Frequency range select= */ -#define LV_PHY0_PRBS_ON(v) FLD_VAL(v, 20, 16) /* Clock/Data Flag pins= */ +#define LVPHY0_LV_ND GENMASK(4, 0) +#define LVPHY0_LV_FS GENMASK(6, 5) +#define LVPHY0_LV_IS GENMASK(15, 14) /* charge pump current */ +#define LVPHY0_LV_RST BIT(22) =20 #define LVPHY1 0x04A4 /* LVDS PHY 1 */ #define SYSSTAT 0x0500 /* System Status */ @@ -223,6 +221,14 @@ struct tc_data { enum tc3587x5_type type; }; =20 +struct tc358775_pll_settings { + unsigned int min_khz; + unsigned int max_khz; + u8 fs; + u8 nd; + u8 is; +}; + static inline struct tc_data *bridge_to_tc(struct drm_bridge *b) { return container_of(b, struct tc_data, bridge); @@ -371,10 +377,38 @@ static void tc358775_configure_lvds_timings(struct tc= _data *tc, regmap_write(tc->regmap, VFUEN, VFUEN_EN); } =20 -static void tc358775_configure_pll(struct tc_data *tc, int pixelclk) +static const struct tc358775_pll_settings tc358775_pll_settings[] =3D { + { 25000, 30000, 2, 27, 1 }, + { 30000, 60000, 1, 13, 1 }, + { 60000, 135000, 0, 6, 1 }, + {} +}; + +static void tc358775_configure_pll(struct tc_data *tc, unsigned int pixelc= lk) { + const struct tc358775_pll_settings *settings; + unsigned int val; + + if (tc->lvds_dual_link) + pixelclk /=3D 2; + + for (settings =3D tc358775_pll_settings; settings->min_khz; settings++) + if (pixelclk > settings->min_khz && + pixelclk < settings->max_khz) + break; + + if (!settings->min_khz) + return; + + val =3D u32_encode_bits(settings->fs, LVPHY0_LV_FS); + val |=3D u32_encode_bits(settings->nd, LVPHY0_LV_ND); + val |=3D u32_encode_bits(settings->is, LVPHY0_LV_IS); + + regmap_write(tc->regmap, LVPHY0, val | LVPHY0_LV_RST); + usleep_range(100, 150); + regmap_write(tc->regmap, LVPHY0, val); + regmap_write(tc->regmap, SYSRST, SYS_RST_LCD); - regmap_write(tc->regmap, LVPHY0, LV_PHY0_PRBS_ON(4) | LV_PHY0_ND(6)); } =20 static void tc358775_configure_color_mapping(struct tc_data *tc, u32 fmt) --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA9FD7E590 for ; Mon, 6 May 2024 13:36:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Mon, 6 May 2024 13:36:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002576; bh=t32YVBoUFvxxQC9832AhjslFW+xryk5tC8Zkli2Jjbk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fXCiQTLNBW1QCbwM7CA/NjrZt96tU22qx432VWneCzxNbb+h6R9ts6xbg+AZULVjd QvxeG3U8al57+bnJxGuLJwXx2M9ALysruModd3d6cigU04CYQYiJ2ubYIpasrIwAx6 5SYK0uVcJBVY20IB/vG3nwXoHtMpWNZdqOIjT4xCn/DdoI7pmUoadUM596UpFDnX9r oqlyFj/rA3QFjb0m0EhTHVcunpddivBJDmJsJsORD8iCvhfFUuEywBKucFme8QNKfP jLEiW7p0Ynizwy9ux3agCH8KktVkN4Wn9UQuYegwOXLO3pZXuBaxaPY8dMTr9qpcQT cheJ0Vaq/mw0A== From: Michael Walle Date: Mon, 06 May 2024 15:34:44 +0200 Subject: [PATCH 15/20] drm/bridge: tc358775: dynamically configure DSI link settings Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-15-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 Instead of hardcoding the settings for just one (unknown) particular frequency and lane setting, compute the DSI link parameters using the handy phy_mipi_dphy_get_default_config() helper function. The DSI_START and DSI_BUSY registers were removed in version 0.6 of the datasheet. It seems that it applies to a different bridge and was just a leftover. Remove the DSI_START handling and the (unused) DSI_BUSY macro. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/Kconfig | 1 + drivers/gpu/drm/bridge/tc358775.c | 58 +++++++++++++++++++++++------------= ---- 2 files changed, 35 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index c621be1a99a8..ed018d6f1da3 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -349,6 +349,7 @@ config DRM_TOSHIBA_TC358775 select REGMAP_I2C select DRM_PANEL select DRM_MIPI_DSI + select GENERIC_PHY_MIPI_DPHY help Toshiba TC358775 DSI/LVDS bridge chip driver. =20 diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index e3fba7ac71ec..33a97ddba7b5 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -19,6 +19,7 @@ #include #include #include +#include =20 #include =20 @@ -49,12 +50,14 @@ =20 /* DSI PPI Layer Registers */ #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */ -#define PPI_START_FUNCTION 1 +#define PPI_STARTPPI_STARTPPI BIT(0) =20 #define PPI_BUSYPPI 0x0108 #define PPI_LINEINITCNT 0x0110 /* Line Initialization Wait Counter */ #define PPI_LPTXTIMECNT 0x0114 #define PPI_LANEENABLE 0x0134 /* Enables each lane at the PPI layer. */ +#define LANEENABLE_CLEN BIT(0) +#define LANEENABLE_L0EN BIT(1) #define PPI_TX_RX_TA 0x013C /* DSI Bus Turn Around timing parameters */ =20 /* Analog timer function enable */ @@ -89,10 +92,7 @@ #define PPI_CLRSIPO 0x01E4 /* Clear SIPO values, Slave mode use only.= */ #define HSTIMEOUT 0x01F0 /* HS Rx Time Out Counter */ #define HSTIMEOUTENABLE 0x01F4 /* Enable HS Rx Time Out Counter */ -#define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX function */ -#define DSI_RX_START 1 =20 -#define DSI_BUSYDSI 0x0208 #define DSI_LANEENABLE 0x0210 /* Enables each lane at the Protocol layer= . */ #define DSI_LANESTATUS0 0x0214 /* Displays lane is in HS RX mode. */ #define DSI_LANESTATUS1 0x0218 /* Displays lane is in ULPS or STOP state = */ @@ -174,21 +174,12 @@ enum { /* Chip ID and Revision ID Register */ #define IDREG 0x0580 =20 -#define LPX_PERIOD 4 -#define TTA_GET 0x40000 -#define TTA_SURE 6 -#define SINGLE_LINK 1 -#define DUAL_LINK 2 - #define TC358775XBG_ID 0x00007500 =20 /* Debug Registers */ #define DEBUG00 0x05A0 /* Debug */ #define DEBUG01 0x05A4 /* LVDS Data */ =20 -#define DSI_CLEN_BIT BIT(0) -#define L0EN BIT(1) - enum tc358775_ports { TC358775_DSI_IN, TC358775_LVDS_OUT0, @@ -314,23 +305,42 @@ static const struct reg_sequence tc_lvmux_jeida18_24[= ] =3D { { LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R0) }, }; =20 -static void tc358775_configure_dsi(struct tc_data *tc) +/* All the DSI timing is counted by the HS byte clock internally */ +static uint32_t tc358775_ps_to_cnt(unsigned long long ps, + struct phy_configure_opts_mipi_dphy *cfg) { + unsigned long hs_byte_clk =3D cfg->hs_clk_rate / 8; + + return DIV_ROUND_UP(ps * hs_byte_clk, PSEC_PER_SEC); +} + +static void tc358775_configure_dsi(struct tc_data *tc, unsigned int pixelc= lk) +{ + int bpp =3D mipi_dsi_pixel_format_to_bpp(tc->dsi->format); + struct phy_configure_opts_mipi_dphy cfg; unsigned int val; =20 - regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE); - regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD); - regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, 3); - regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, 3); - regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, 3); - regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, 3); + phy_mipi_dphy_get_default_config(pixelclk * 1000, bpp, + tc->num_dsi_lanes, &cfg); + + regmap_write(tc->regmap, PPI_TX_RX_TA, + (tc358775_ps_to_cnt(cfg.ta_get, &cfg) << 16) | + tc358775_ps_to_cnt(cfg.ta_sure, &cfg)); + regmap_write(tc->regmap, PPI_LPTXTIMECNT, + tc358775_ps_to_cnt(cfg.lpx, &cfg)); + + val =3D tc358775_ps_to_cnt(cfg.hs_settle, &cfg); + regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, val); + regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, val); + regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, val); + regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, val); =20 - val =3D ((L0EN << tc->num_dsi_lanes) - L0EN) | DSI_CLEN_BIT; + val =3D LANEENABLE_CLEN; + val |=3D (LANEENABLE_L0EN << tc->num_dsi_lanes) - LANEENABLE_L0EN; regmap_write(tc->regmap, PPI_LANEENABLE, val); regmap_write(tc->regmap, DSI_LANEENABLE, val); =20 - regmap_write(tc->regmap, PPI_STARTPPI, PPI_START_FUNCTION); - regmap_write(tc->regmap, DSI_STARTDSI, DSI_RX_START); + regmap_write(tc->regmap, PPI_STARTPPI, PPI_STARTPPI_STARTPPI); } =20 static void tc358775_configure_lvds_timings(struct tc_data *tc, @@ -461,7 +471,7 @@ static void tc358775_bridge_enable(struct drm_bridge *b= ridge) SYS_RST_I2CM); usleep_range(30000, 40000); =20 - tc358775_configure_dsi(tc); + tc358775_configure_dsi(tc, mode->crtc_clock); tc358775_configure_lvds_timings(tc, mode); tc358775_configure_pll(tc, mode->crtc_clock); tc358775_configure_color_mapping(tc, connector->display_info.bus_formats[= 0]); --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B60C7F476 for ; Mon, 6 May 2024 13:36:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002582; cv=none; b=DxDXULyDbWzcG01TCFBplLWadVrYdtdSkLbmwL3PX3aTjy5PJEDurGwTErLe0Iu6PRBRYWQAUDvVETkhep6CdM0rc29yTDQZY1rLZNCs+GLf+QV1BWYB202654jvLojtR+uKcLA8SYlw9iun9Rr+RiKGHIiCc30T+i/gzsWdTgE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-16-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 Provide bitfield macros for the individual fields in the LVDS timing registers and get rid of the magic values. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 52 +++++++++++++++++++++++++----------= ---- 1 file changed, 33 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index 33a97ddba7b5..c50554ec4b28 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -111,11 +111,19 @@ #define VPCTRL_OPXLFMT BIT(8) #define VPCTRL_EVTMODE BIT(5) /* Video event mode enable, tc35876x only */ #define HTIM1 0x0454 /* Horizontal Timing Control 1 */ +#define HTIM1_HPW GENMASK(8, 0) +#define HTIM1_HBPR GENMASK(24, 16) #define HTIM2 0x0458 /* Horizontal Timing Control 2 */ +#define HTIM2_HACT GENMASK(10, 0) +#define HTIM2_HFPR GENMASK(24, 16) #define VTIM1 0x045C /* Vertical Timing Control 1 */ +#define VTIM1_VPW GENMASK(7, 0) +#define VTIM1_VBPR GENMASK(23, 16) #define VTIM2 0x0460 /* Vertical Timing Control 2 */ +#define VTIM2_VACT GENMASK(10, 0) +#define VTIM2_VFPR GENMASK(23, 16) #define VFUEN 0x0464 /* Video Frame Timing Update Enable */ -#define VFUEN_EN BIT(0) /* Upload Enable */ +#define VFUEN_VFUEN BIT(0) /* Upload Enable */ =20 /* Mux Input Select for LVDS LINK Input */ #define LV_MX0003 0x0480 /* Bit 0 to 3 */ @@ -346,24 +354,19 @@ static void tc358775_configure_dsi(struct tc_data *tc= , unsigned int pixelclk) static void tc358775_configure_lvds_timings(struct tc_data *tc, struct drm_display_mode *mode) { - u32 hback_porch, hsync_len, hfront_porch, hactive, htime1, htime2; - u32 vback_porch, vsync_len, vfront_porch, vactive, vtime1, vtime2; + u32 hback_porch, hsync_len, hfront_porch, hactive; + u32 vback_porch, vsync_len, vfront_porch, vactive; + unsigned int val; =20 hback_porch =3D mode->htotal - mode->hsync_end; hsync_len =3D mode->hsync_end - mode->hsync_start; + hactive =3D mode->hdisplay; + hfront_porch =3D mode->hsync_start - mode->hdisplay; + vback_porch =3D mode->vtotal - mode->vsync_end; vsync_len =3D mode->vsync_end - mode->vsync_start; - - htime1 =3D (hback_porch << 16) + hsync_len; - vtime1 =3D (vback_porch << 16) + vsync_len; - - hfront_porch =3D mode->hsync_start - mode->hdisplay; - hactive =3D mode->hdisplay; - vfront_porch =3D mode->vsync_start - mode->vdisplay; vactive =3D mode->vdisplay; - - htime2 =3D (hfront_porch << 16) + hactive; - vtime2 =3D (vfront_porch << 16) + vactive; + vfront_porch =3D mode->vsync_start - mode->vdisplay; =20 /* Video event mode vs pulse mode bit, does not exist for tc358775 */ if (tc->type =3D=3D TC358765) @@ -379,12 +382,23 @@ static void tc358775_configure_lvds_timings(struct tc= _data *tc, regmap_update_bits(tc->regmap, VPCTRL, val, VPCTRL_OPXLFMT | VPCTRL_MSF | VPCTRL_EVTMODE); =20 - regmap_write(tc->regmap, HTIM1, htime1); - regmap_write(tc->regmap, VTIM1, vtime1); - regmap_write(tc->regmap, HTIM2, htime2); - regmap_write(tc->regmap, VTIM2, vtime2); + val =3D u32_encode_bits(hsync_len, HTIM1_HPW); + val |=3D u32_encode_bits(hback_porch, HTIM1_HBPR); + regmap_write(tc->regmap, HTIM1, val); + + val =3D u32_encode_bits(hactive, HTIM2_HACT); + val |=3D u32_encode_bits(hfront_porch, HTIM2_HFPR); + regmap_write(tc->regmap, HTIM2, val); + + val =3D u32_encode_bits(vsync_len, VTIM1_VPW); + val |=3D u32_encode_bits(vback_porch, VTIM1_VBPR); + regmap_write(tc->regmap, VTIM1, val); + + val =3D u32_encode_bits(vactive, VTIM2_VACT); + val |=3D u32_encode_bits(vfront_porch, VTIM2_VFPR); + regmap_write(tc->regmap, VTIM2, val); =20 - regmap_write(tc->regmap, VFUEN, VFUEN_EN); + regmap_write(tc->regmap, VFUEN, VFUEN_VFUEN); } =20 static const struct tc358775_pll_settings tc358775_pll_settings[] =3D { @@ -475,7 +489,7 @@ static void tc358775_bridge_enable(struct drm_bridge *b= ridge) tc358775_configure_lvds_timings(tc, mode); tc358775_configure_pll(tc, mode->crtc_clock); tc358775_configure_color_mapping(tc, connector->display_info.bus_formats[= 0]); - regmap_write(tc->regmap, VFUEN, VFUEN_EN); + regmap_write(tc->regmap, VFUEN, VFUEN_VFUEN); tc358775_configure_lvds_clock(tc); =20 /* Finally, enable the LVDS transmitter */ --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 173258594C for ; Mon, 6 May 2024 13:36:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002587; cv=none; b=I+cJWQhCeGofpXtgP7NjSS9w+LJdrquYDztRW9yVpO6cPxfRPPPsJ6qY7FJgK1egQcZLLUD3ZRHAqQ26n1OeVzzkwgIRJNNbO3I52ym6Hw2KvPrGeM9ewkWlC5yZrPYoE3PqhhlHPzWQYixWvgwbR4cX+eOPrOeCATMOcN8vy48= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002587; c=relaxed/simple; bh=Hm8IbzH7o86qGsPyzm5DKDFy+pWLYyONwjVqfO4C4rg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BSHSAMt5cXrr5QX0Bv72qpKabv2u7OO41dG3vvhBJywBWcsEgxniKcIC5ZI3YNQExUUw+3s+FVIW0P/9zAF9Dj64veQAaO1Y1YGMxkXEoKtESl9g8w8gJEcirlRJiX6USR+5LSLP77pUDgWSznvzqjW00Xocq/A9wwkyx133rE4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=c9s/WUkz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="c9s/WUkz" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 26C2BC4AF68; Mon, 6 May 2024 13:36:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002586; bh=Hm8IbzH7o86qGsPyzm5DKDFy+pWLYyONwjVqfO4C4rg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=c9s/WUkzLe0/Gv60ykQuMYisA+qfLshxmw/LYojmokJi/IFRzXPXz3p7WTjXqTUcu 9cO9wxDiJJ7V/gNHD316aargzM6HJ5kQz5tLFxy4b09QtHmY9CGScsnCBH9raaqgg1 ovFY1Lzdq3L8wtWXvB9u6txLzMzgSj7OAApgNpQ7MjR4Q+gv5VBsFB0jo/myaNQ5ep yyg8txlfAv6PT6aHaUh56acPXe/OiSPLwqS6+rv6rmUM7jbdnhK1aCssHYK1R/wfF7 AhMejO6EnmKXCMlB3MpkvgKwRNXoZhDi9d52bnu5PEsjffWVTT3Bf5rKI+RhyPmL8P iWTPegQ6Oqw3g== From: Michael Walle Date: Mon, 06 May 2024 15:34:46 +0200 Subject: [PATCH 17/20] drm/bridge: tc358775: move bridge power up/down into functions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-17-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 Move the bridge power-up and power-down handling into own functions. This is a preparation patch to fix the power-up sequencing of the bridge. No functional change. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index c50554ec4b28..d5b3d691d2c1 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -215,6 +215,7 @@ struct tc_data { struct gpio_desc *reset_gpio; struct gpio_desc *stby_gpio; bool lvds_dual_link; + bool powered; u8 bpc; =20 enum tc3587x5_type type; @@ -233,9 +234,8 @@ static inline struct tc_data *bridge_to_tc(struct drm_b= ridge *b) return container_of(b, struct tc_data, bridge); } =20 -static void tc_bridge_pre_enable(struct drm_bridge *bridge) +static void tc358775_power_up(struct tc_data *tc) { - struct tc_data *tc =3D bridge_to_tc(bridge); struct device *dev =3D &tc->dsi->dev; int ret; =20 @@ -256,9 +256,8 @@ static void tc_bridge_pre_enable(struct drm_bridge *bri= dge) usleep_range(10, 20); } =20 -static void tc_bridge_post_disable(struct drm_bridge *bridge) +static void tc358775_power_down(struct tc_data *tc) { - struct tc_data *tc =3D bridge_to_tc(bridge); struct device *dev =3D &tc->dsi->dev; int ret; =20 @@ -279,6 +278,20 @@ static void tc_bridge_post_disable(struct drm_bridge *= bridge) usleep_range(10000, 11000); } =20 +static void tc_bridge_pre_enable(struct drm_bridge *bridge) +{ + struct tc_data *tc =3D bridge_to_tc(bridge); + + tc358775_power_up(tc); +} + +static void tc_bridge_post_disable(struct drm_bridge *bridge) +{ + struct tc_data *tc =3D bridge_to_tc(bridge); + + tc358775_power_down(tc); +} + /* helper function to access bus_formats */ static struct drm_connector *get_connector(struct drm_encoder *encoder) { --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB5CE86AC8 for ; Mon, 6 May 2024 13:36:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002591; cv=none; b=V3IM+frDkKvCAXc/Ralgwbc9YznmC20SzfFxRsu/GYAq2yOrtaL+C3ydWalrHSY28fqSZFXSlA7uJPtiATXAujlmsBJ6od5JfispBhrnkLVtOpA5DEc8IEreZwKXVQyQ/bJYfLWdI5zyVejRnRDi601W4gFOmVF441nQJQo08R4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002591; c=relaxed/simple; bh=CdCWrZhe83V0sESOJK7U77pyux4Xw5LMdp8ycoT3WUE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MK6EMgYZyifq78rvZP4qbvUjwVh4rDnCVKOPTWF3MZG4wlpPv+oEB2DQBfZjEELsinxZ2uqd+ia1OAGc8K/oIRR7dqi1DZN8eCv+H+ZsJxMh8BcLYq97Qb/R1877bM11Kgn/rZpJBHftYBCYGcwfySLFlSNZUg/IIEfAq2KVszg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=MQlzbcin; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="MQlzbcin" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 062EAC116B1; Mon, 6 May 2024 13:36:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002591; bh=CdCWrZhe83V0sESOJK7U77pyux4Xw5LMdp8ycoT3WUE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=MQlzbcin9J88aETS0zLDb0nvobS3wtLI2Y4BBLQYro4df7gUI0X62eehQlcKCMs9K WzNcODU+CgRa7rRgSlZR2PuZy/juDvvKr2lyV7KBnids0vcCKxinOR55C1pha6uQZy pqhtmhvqQ3aNOvtmJLcr7CO0vbwcd9m5eT1d1rccugbqf89CHBIJmAdTtGhnqwrCSC gxtn3C9GumjieD7KwgVLmf/H/GEYj6kGebzI6Dt52QbdqE8wyjHv8AwnQ4QdFdcdhg Gai+zjxlTch4LRJBulxLPBOxb6dED1DZOygysJFpsJ5sS4d0sWRi8dBJl54Mw7abqd pUu86gTg+hSrg== From: Michael Walle Date: Mon, 06 May 2024 15:34:47 +0200 Subject: [PATCH 18/20] drm/bridge: tc358775: fix the power-up/down delays Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-18-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 Implement the delays according to Figure 8-10 and 8-11 of the datasheet. In particular, the datasheet states that the *maximum* time between enabling the VDDIO and VDD is 10ms. Currently, as implemented this is always violated. Of course, this is only a best effort because we cannot be sure enabling of the two regulators will be that fast. The time between releasing the stby GPIO and releasing the reset GPIO must be at least 10us and not 10ms as it was before this patch. After reset is released, there must be at least a delay of 200us until the first HS clock is received. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index d5b3d691d2c1..99dbbb1fee78 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -242,18 +242,16 @@ static void tc358775_power_up(struct tc_data *tc) ret =3D regulator_enable(tc->vddio); if (ret < 0) dev_err(dev, "regulator vddio enable failed, %d\n", ret); - usleep_range(10000, 11000); =20 ret =3D regulator_enable(tc->vdd); if (ret < 0) dev_err(dev, "regulator vdd enable failed, %d\n", ret); - usleep_range(10000, 11000); =20 gpiod_set_value(tc->stby_gpio, 0); - usleep_range(10000, 11000); + usleep_range(10, 20); =20 gpiod_set_value(tc->reset_gpio, 0); - usleep_range(10, 20); + usleep_range(200, 250); } =20 static void tc358775_power_down(struct tc_data *tc) @@ -265,17 +263,14 @@ static void tc358775_power_down(struct tc_data *tc) usleep_range(10, 20); =20 gpiod_set_value(tc->stby_gpio, 1); - usleep_range(10000, 11000); =20 ret =3D regulator_disable(tc->vdd); if (ret < 0) dev_err(dev, "regulator vdd disable failed, %d\n", ret); - usleep_range(10000, 11000); =20 ret =3D regulator_disable(tc->vddio); if (ret < 0) dev_err(dev, "regulator vddio disable failed, %d\n", ret); - usleep_range(10000, 11000); } =20 static void tc_bridge_pre_enable(struct drm_bridge *bridge) --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B971D12AACE for ; Mon, 6 May 2024 13:36:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002596; cv=none; b=RkVWtz+6pZwMAIV/HVMi0mcxyOrzQekLDwmz/jIh3tR6ZSIdwL4zwmVBZtvYL1MEydcF9k8G/Tw1VqETvCMuAlmq/H79YZDqynNFxEV7X6973Qp5o8dtPNtATxMbj6h4aOJBLSP0MYvPRzu0g6Hs3wWVztotsD9JnuLU1V1SkVw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715002596; c=relaxed/simple; bh=7pxQETmnu6FGrgnJHaKGqthAffDCBJczpSl2HJqrSW8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QeSiZMIxcegNKVFZ7yL+7h8D5UbrBVLKjg3x0qzIMg0hBznTLxX+lMo3eB9d5vCPnLGe8HH6pgYB68hZIJFgA/GIdzLl8MzcjUPqYyb21ZvWkBGeIXuU60/SIXzDM2MClLy53N5Y/N46DXL9sSbJcP71BiJ8AYvLI42kHSLv3vk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fOxWWLGo; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fOxWWLGo" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D8ABDC3277B; Mon, 6 May 2024 13:36:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002596; bh=7pxQETmnu6FGrgnJHaKGqthAffDCBJczpSl2HJqrSW8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fOxWWLGouwuxi+wtZp8YtrRVkgU+b1Md5gkgRMvCNTI0WHqGG64jKKjij/9oaKJ3s bLoUZW4xYs9HGkNT1sOgk2kdRXx0nh+SNgIWMfWC241S7gj0ytO3pLM2I87IqpkEtM shFabsZBvgkh26S5AbFO07or1s4cpPiBWcGQ5yKzq3ih8/k5d1jh88mC/OlWep+IIo 9Rxy9MFQNYGcpksZ/LJSCFboECeTJjGpHDhepQNR8NjByobFeCI+hZqPnt9QGkOtYz XflAsaH3gwmnQfTlJUACPm5BIsGOXS5WfDKQwy/IeeXeFJhdIwM3MoZ8+ukMGCqVUI j9n7oMj01/c1w== From: Michael Walle Date: Mon, 06 May 2024 15:34:48 +0200 Subject: [PATCH 19/20] drm/bridge: tc358775: fix power-up sequencing Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-19-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 The reset line of this bridge must be released while the DSI data lanes and DSI clock lane are in LP-11 mode. After that the DSI clock has to be turned on, which is a requirement to have I2C work. To achieve this, use the new .lp11_notify() callback where the reset line is released. Set .pre_enable_prev_first to make sure, there is a valid DSI clock during the .pre_enabe() op. In .pre_enable() the bridge will be fully configured but the LVDS transmitter will remain disabled. It will eventually be enabled in the .enable() op. With the correct initialization sequence we don't need the additional reset, nor the additional write to VFUEN. With that fixed, the init sequence is exactly how the vendor is requiring it. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 62 +++++++++++++++++++++++------------= ---- 1 file changed, 37 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index 99dbbb1fee78..31f89b7d5a3a 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -239,6 +239,9 @@ static void tc358775_power_up(struct tc_data *tc) struct device *dev =3D &tc->dsi->dev; int ret; =20 + if (tc->powered) + return; + ret =3D regulator_enable(tc->vddio); if (ret < 0) dev_err(dev, "regulator vddio enable failed, %d\n", ret); @@ -252,6 +255,8 @@ static void tc358775_power_up(struct tc_data *tc) =20 gpiod_set_value(tc->reset_gpio, 0); usleep_range(200, 250); + + tc->powered =3D true; } =20 static void tc358775_power_down(struct tc_data *tc) @@ -271,20 +276,8 @@ static void tc358775_power_down(struct tc_data *tc) ret =3D regulator_disable(tc->vddio); if (ret < 0) dev_err(dev, "regulator vddio disable failed, %d\n", ret); -} =20 -static void tc_bridge_pre_enable(struct drm_bridge *bridge) -{ - struct tc_data *tc =3D bridge_to_tc(bridge); - - tc358775_power_up(tc); -} - -static void tc_bridge_post_disable(struct drm_bridge *bridge) -{ - struct tc_data *tc =3D bridge_to_tc(bridge); - - tc358775_power_down(tc); + tc->powered =3D false; } =20 /* helper function to access bus_formats */ @@ -474,12 +467,25 @@ static void tc358775_configure_lvds_clock(struct tc_d= ata *tc) regmap_write(tc->regmap, LVCFG, val); } =20 -static void tc358775_bridge_enable(struct drm_bridge *bridge) +static void tc358775_dsi_lp11_notify(struct drm_bridge *bridge) { struct tc_data *tc =3D bridge_to_tc(bridge); - unsigned int val =3D 0; - struct drm_display_mode *mode; + + tc358775_power_up(tc); +} + +static void tc358775_bridge_pre_enable(struct drm_bridge *bridge) +{ struct drm_connector *connector =3D get_connector(bridge->encoder); + struct tc_data *tc =3D bridge_to_tc(bridge); + struct drm_display_mode *mode; + unsigned int val =3D 0; + + /* + * Legacy behavior, make sure this bridge is powered even if + * drm_bridge_dsi_lp11_notify() isn't called by the DSI host + */ + tc358775_power_up(tc); =20 mode =3D &bridge->encoder->crtc->state->adjusted_mode; =20 @@ -488,22 +494,27 @@ static void tc358775_bridge_enable(struct drm_bridge = *bridge) dev_info(tc->dev, "DSI2LVDS Chip ID.%02x Revision ID. %02x **\n", (val >> 8) & 0xFF, val & 0xFF); =20 - regmap_write(tc->regmap, SYSRST, - SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM | SYS_RST_LCD | - SYS_RST_I2CM); - usleep_range(30000, 40000); - tc358775_configure_dsi(tc, mode->crtc_clock); tc358775_configure_lvds_timings(tc, mode); tc358775_configure_pll(tc, mode->crtc_clock); tc358775_configure_color_mapping(tc, connector->display_info.bus_formats[= 0]); - regmap_write(tc->regmap, VFUEN, VFUEN_VFUEN); tc358775_configure_lvds_clock(tc); +} + +static void tc358775_bridge_enable(struct drm_bridge *bridge) +{ + struct tc_data *tc =3D bridge_to_tc(bridge); =20 - /* Finally, enable the LVDS transmitter */ regmap_update_bits(tc->regmap, LVCFG, LVCFG_LVEN, LVCFG_LVEN); } =20 +static void tc358775_bridge_post_disable(struct drm_bridge *bridge) +{ + struct tc_data *tc =3D bridge_to_tc(bridge); + + tc358775_power_down(tc); +} + /* * According to the datasheet, the horizontal back porch, front porch and = sync * length must be a multiple of 2 and the minimal horizontal pulse width i= s 8. @@ -634,11 +645,12 @@ static int tc_bridge_attach(struct drm_bridge *bridge, =20 static const struct drm_bridge_funcs tc_bridge_funcs =3D { .attach =3D tc_bridge_attach, - .pre_enable =3D tc_bridge_pre_enable, + .dsi_lp11_notify =3D tc358775_dsi_lp11_notify, + .pre_enable =3D tc358775_bridge_pre_enable, .enable =3D tc358775_bridge_enable, + .post_disable =3D tc358775_bridge_post_disable, .mode_fixup =3D tc_mode_fixup, .mode_valid =3D tc_mode_valid, - .post_disable =3D tc_bridge_post_disable, }; =20 static int tc_attach_host(struct tc_data *tc) --=20 2.39.2 From nobody Thu Sep 19 19:36:32 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A33ED7BB0F for ; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="DqI6QqBA" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B6D83C4AF63; Mon, 6 May 2024 13:36:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715002601; bh=paegLAtAIiOzY5eKQeauNPYuwsGxSeeUGgOBWr0kV1o=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=DqI6QqBAEh0SLMoX6jxGMlYEF7hX2qBs28XSz8VMiI1jujVuLsNYoAqiEcAspAaz4 Zyp+ea/4k4F9fQg4bs2/DWeuY4Yc/FWTDEInQn8XN1MgHgpeGwF8VYsX1NeIcs6ivM xQ3sJb4SWDoKdOYIC80ppCzDUcx7HYU8Ig8tmph0+spRJzQziEZeyuPuySnCn3hxJS OEMPgZx4Bejm8cLNBMRfkb/Oyfu+1rxtZYXfsR82ol9U4DF4tPlZsBEWbTCONNoGq+ +bLz1C7cSHzISiOvmcR+xzL93l5nKPDCoOcpVQgg1xR0NePq2Uj5hlocb3aP95yCM4 eZGn1TO44UzPQ== From: Michael Walle Date: Mon, 06 May 2024 15:34:49 +0200 Subject: [PATCH 20/20] drm/bridge: tc358775: use devm_drm_bridge_add() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-tc358775-fix-powerup-v1-20-545dcf00b8dd@kernel.org> References: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> In-Reply-To: <20240506-tc358775-fix-powerup-v1-0-545dcf00b8dd@kernel.org> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Sam Ravnborg , Vinay Simha BN , Tony Lindgren Cc: Daniel Semkowicz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.4 Use the device resource managed version of drm_bridge_add(). This simplifies the error handling and we can get rid of tc_remove_bridge(). Also, add a check for the return code. Signed-off-by: Michael Walle --- drivers/gpu/drm/bridge/tc358775.c | 21 ++++----------------- 1 file changed, 4 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc3= 58775.c index 31f89b7d5a3a..1d2547e4c4e3 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -762,26 +762,14 @@ static int tc_probe(struct i2c_client *client) tc->bridge.funcs =3D &tc_bridge_funcs; tc->bridge.of_node =3D dev->of_node; tc->bridge.pre_enable_prev_first =3D true; - drm_bridge_add(&tc->bridge); =20 - i2c_set_clientdata(client, tc); - - ret =3D tc_attach_host(tc); + ret =3D devm_drm_bridge_add(tc->dev, &tc->bridge); if (ret) - goto err_bridge_remove; - - return 0; - -err_bridge_remove: - drm_bridge_remove(&tc->bridge); - return ret; -} + return ret; =20 -static void tc_remove(struct i2c_client *client) -{ - struct tc_data *tc =3D i2c_get_clientdata(client); + i2c_set_clientdata(client, tc); =20 - drm_bridge_remove(&tc->bridge); + return tc_attach_host(tc); } =20 static const struct i2c_device_id tc358775_i2c_ids[] =3D { @@ -805,7 +793,6 @@ static struct i2c_driver tc358775_driver =3D { }, .id_table =3D tc358775_i2c_ids, .probe =3D tc_probe, - .remove =3D tc_remove, }; module_i2c_driver(tc358775_driver); =20 --=20 2.39.2