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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240506-compile_kernel_with_extensions-v1-8-5c25c134c097@rivosinc.com> References: <20240506-compile_kernel_with_extensions-v1-0-5c25c134c097@rivosinc.com> In-Reply-To: <20240506-compile_kernel_with_extensions-v1-0-5c25c134c097@rivosinc.com> To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Song Liu , Xi Wang , =?utf-8?q?Bj=C3=B6rn_T=C3=B6pel?= , =?utf-8?q?Cl=C3=A9ment_L=C3=A9ger?= Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Charlie Jenkins X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1715046158; l=3086; i=charlie@rivosinc.com; s=20231120; h=from:subject:message-id; bh=VSGPqebqjCkV+Jce+IU74T8AjKJ/iHF/vPW/Bia4uwk=; b=PDnuVsyyK0HUPATpcCiqShVPqzG7qsmDrxcNZxQQptU20Eb8nLdqbPfj2AbCgNK4RPsM26oGZ gmZwE2MylTPC4jC6xpkZtKachs4HLLUOAvrnLkA+xKmCeSbzFLq0q8f X-Developer-Key: i=charlie@rivosinc.com; a=ed25519; pk=t4RSWpMV1q5lf/NWIeR9z58bcje60/dbtxxmoSfBEcs= Zbs can optimize kernel instruction sequences. Add a config option PLATFORM_SUPPORTS_RISCV_ISA_ZBS that allows arbitrary Zbs instruction sequences to be emitted by the compiler. Signed-off-by: Charlie Jenkins --- arch/riscv/Kconfig.isa | 51 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ arch/riscv/Makefile | 1 + 2 files changed, 52 insertions(+) diff --git a/arch/riscv/Kconfig.isa b/arch/riscv/Kconfig.isa index b7399f236bba..60ae1bf71c70 100644 --- a/arch/riscv/Kconfig.isa +++ b/arch/riscv/Kconfig.isa @@ -340,3 +340,54 @@ config PLATFORM_SUPPORTS_RISCV_ISA_ZBC systems that do not support the Zbc extension. =20 endchoice + +config TOOLCHAIN_HAS_ZBS + bool + default y + depends on !64BIT || $(cc-option,-mabi=3Dlp64 -march=3Drv64ima_zbs) + depends on !32BIT || $(cc-option,-mabi=3Dilp32 -march=3Drv32ima_zbs) + depends on LLD_VERSION >=3D 150000 || LD_VERSION >=3D 23900 + depends on AS_HAS_OPTION_ARCH + +config RISCV_ISA_ZBS + bool + +choice + prompt "Zbs extension for bit manipulation instructions support" + default PLATFORM_MAY_SUPPORT_RISCV_ISA_ZBS + help + This selects the level of support for Zbs instructions to be + built into the Linux Kernel. This does not impact whether Zbs + instructions are allowed to be emitted by user-space code. + + The Zbs extension provides instructions to accelerate carry-less + multiplication. + +config PROHIBIT_RISCV_ISA_ZBS + bool "Prohibit Zbs instruction sequences" + depends on NONPORTABLE + help + Regardless of if the platform supports Zbs instructions, + prohibit the kernel from emitting Zbs instructions. + +config PLATFORM_MAY_SUPPORT_RISCV_ISA_ZBS + bool "Allow Zbs instruction sequences if supported" + depends on TOOLCHAIN_HAS_ZBS + depends on RISCV_ALTERNATIVE + select RISCV_ISA_ZBS + help + Add support for enabling optimisations in the kernel when the + Zbs extension is detected at boot. + +config PLATFORM_SUPPORTS_RISCV_ISA_ZBS + bool "Emit Zbs instructions when building Linux" + depends on TOOLCHAIN_HAS_ZBS + depends on NONPORTABLE + select RISCV_ISA_ZBS + help + Adds "zbs" to the ISA subsets that the toolchain is allowed to emit + when building Linux, which results in Zbs instructions in the + Linux binary. This option produces a kernel that will not run on + systems that do not support the Zbs extension. + +endchoice diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 30be0fec976a..7519b68c3bd5 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -70,6 +70,7 @@ riscv-march-$(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_V) :=3D = $(riscv-march-y)v riscv-march-$(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_ZBA) :=3D $(riscv-march-y= )_zba riscv-march-$(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_ZBB) :=3D $(riscv-march-y= )_zbb riscv-march-$(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_ZBC) :=3D $(riscv-march-y= )_zbc +riscv-march-$(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_ZBS) :=3D $(riscv-march-y= )_zbs =20 ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC KBUILD_CFLAGS +=3D -Wa,-misa-spec=3D2.2 --=20 2.44.0