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Lin" , Fei Shao , Sean Paul , Jason Chen , , , , , Hsiao Chien Sung Subject: [PATCH v7 12/18] drm/mediatek: Support "Pre-multiplied" blending in Mixer Date: Thu, 2 May 2024 18:38:42 +0800 Message-ID: <20240502103848.5845-13-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240502103848.5845-1-shawn.sung@mediatek.com> References: <20240502103848.5845-1-shawn.sung@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Hsiao Chien Sung Support "Pre-multiplied" alpha blending mode in Mixer. Before this patch, only the coverage mode is supported. Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_ethdr.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediate= k/mtk_ethdr.c index 5283e0993ed65..4f043be21ee36 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -5,6 +5,7 @@ =20 #include #include +#include #include #include #include @@ -35,6 +36,7 @@ #define MIX_SRC_L0_EN BIT(0) #define MIX_L_SRC_CON(n) (0x28 + 0x18 * (n)) #define NON_PREMULTI_SOURCE (2 << 12) +#define PREMULTI_SOURCE (3 << 12) #define MIX_L_SRC_SIZE(n) (0x30 + 0x18 * (n)) #define MIX_L_SRC_OFFSET(n) (0x34 + 0x18 * (n)) #define MIX_FUNC_DCM0 0x120 @@ -153,7 +155,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigne= d int idx, struct mtk_plane_pending_state *pending =3D &state->pending; unsigned int offset =3D (pending->x & 1) << 31 | pending->y << 16 | pendi= ng->x; unsigned int align_width =3D ALIGN_DOWN(pending->width, 2); - unsigned int alpha_con =3D 0; + unsigned int mix_con =3D 0; bool replace_src_a =3D false; =20 dev_dbg(dev, "%s+ idx:%d", __func__, idx); @@ -171,8 +173,12 @@ void mtk_ethdr_layer_config(struct device *dev, unsign= ed int idx, return; } =20 - if (state->base.fb && state->base.fb->format->has_alpha) - alpha_con =3D MIXER_ALPHA_AEN | MIXER_ALPHA; + mix_con |=3D MIXER_ALPHA_AEN | (state->base.alpha & MIXER_ALPHA); + + if (state->base.pixel_blend_mode !=3D DRM_MODE_BLEND_COVERAGE) + mix_con |=3D PREMULTI_SOURCE; + else + mix_con |=3D NON_PREMULTI_SOURCE; =20 if (state->base.fb && !state->base.fb->format->has_alpha) { /* @@ -189,8 +195,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigne= d int idx, mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq= _base, mixer->regs, MIX_L_SRC_SIZE(idx)); mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC= _OFFSET(idx)); - mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, M= IX_L_SRC_CON(idx), - 0x1ff); + mtk_ddp_write(cmdq_pkt, mix_con, &mixer->cmdq_base, mixer->regs, MIX_L_SR= C_CON(idx)); mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MI= X_SRC_CON, BIT(idx)); } --=20 2.18.0