From nobody Thu Dec 18 07:33:52 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8401E224F2; Thu, 2 May 2024 06:00:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714629614; cv=none; b=gQun2ZmXeew5thr/XJtJfmCrcCWIZfcWpUyyiO12fdMXdIqOLIqHIHnN0X7eog3jJEKsAr9uGL5ewaPgJReCY7VPPZ0ltnwsnwlpPoG9OZcT9IJTY/gUksaG66nftOaG4CzsflCp1R5bjHdKv2jXfbI+KhCLIz3I5IFOoU6Y1dc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714629614; c=relaxed/simple; bh=SSyYuDfAIqFwr0E0S0Wr/ukwLpvby2PoPSUWIQ8hahY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tlX4QOvqQw8HKhLAeg6HopJoEjJ7lIE9yZL+4Qx3nHclZJMe/jyKKFt+oz3xLRc0PbNOMDVtpZmo9IR/LUkGnNJuuwwU2DIetmJfymxblaog8mNFTM5mfejcsBAmmiyuj3tdmmV8hxBOvhBU1cKlYxAGsgx1+OBWLFHy2IRP+Uk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=BldDkGuw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="BldDkGuw" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 09099C4AF49; Thu, 2 May 2024 06:00:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714629614; bh=SSyYuDfAIqFwr0E0S0Wr/ukwLpvby2PoPSUWIQ8hahY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BldDkGuwbfyaEA5Fxssr4aaABm0kVEWzAu8kv5Y2r8J/bvNwhvx4Eohi0O0wCcWr7 Dtymvpr3xI1XO7qki2JuNYMcT0ZNEXPjjHUsrbIy78bcXpxSZ+iOInr8TXXAbMddEU sF31DmxWeRjlsUMZRsfB34LvJhgnUW/uGaCS5w1jieRnUUgs1kImZyjRYdH1j4gR2S U9TZwG+xFL8WNKLspg0nyWUY1luxvEWs9sK41dj/4GUR/hysVKVsTznxDzxA8ZO5AI 3Xx1h4E1T6pyABWHxQ7XP920YTnJSUQxM6mKrUsKlkM4GQv4r7Y82kqxEcIl+VUW3+ GFLhzH0US3UsQ== From: Namhyung Kim To: Arnaldo Carvalho de Melo , Ian Rogers , Kan Liang Cc: Jiri Olsa , Adrian Hunter , Peter Zijlstra , Ingo Molnar , LKML , linux-perf-users@vger.kernel.org Subject: [PATCH 3/6] perf annotate-data: Handle direct global variable access Date: Wed, 1 May 2024 23:00:08 -0700 Message-ID: <20240502060011.1838090-4-namhyung@kernel.org> X-Mailer: git-send-email 2.45.0.rc1.225.g2a3ae87e7f-goog In-Reply-To: <20240502060011.1838090-1-namhyung@kernel.org> References: <20240502060011.1838090-1-namhyung@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Like per-cpu base offset array, sometimes it accesses the global variable directly using the offset. Allow this type of instructions as long as it finds a global variable for the address. movslq %edi, %rcx mov -0x7dc94ae0(,%rcx,8), %rcx <<<--- here As %rcx has a valid type (i.e. array index) from the first instruction, it will be checked by the first case in check_matching_type(). But as it's not a pointer type, the match will fail. But in this case, it should check if it accesses the kernel global array variable. Signed-off-by: Namhyung Kim --- tools/perf/util/annotate-data.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/tools/perf/util/annotate-data.c b/tools/perf/util/annotate-dat= a.c index 4dd0911904f2..f1e52a531563 100644 --- a/tools/perf/util/annotate-data.c +++ b/tools/perf/util/annotate-data.c @@ -1256,14 +1256,19 @@ static int check_matching_type(struct type_state *s= tate, if (state->regs[reg].ok && state->regs[reg].kind =3D=3D TSR_KIND_TYPE) { int tag =3D dwarf_tag(&state->regs[reg].type); =20 - pr_debug_dtp("\n"); - /* * Normal registers should hold a pointer (or array) to * dereference a memory location. */ - if (tag !=3D DW_TAG_pointer_type && tag !=3D DW_TAG_array_type) + if (tag !=3D DW_TAG_pointer_type && tag !=3D DW_TAG_array_type) { + if (dloc->op->offset < 0 && reg !=3D state->stack_reg) + goto check_kernel; + + pr_debug_dtp("\n"); return -1; + } + + pr_debug_dtp("\n"); =20 /* Remove the pointer and get the target type */ if (die_get_real_type(&state->regs[reg].type, type_die) =3D=3D NULL) @@ -1376,12 +1381,14 @@ static int check_matching_type(struct type_state *s= tate, return -1; } =20 - if (map__dso(dloc->ms->map)->kernel && arch__is(dloc->arch, "x86")) { +check_kernel: + if (map__dso(dloc->ms->map)->kernel) { u64 addr; int offset; =20 /* Direct this-cpu access like "%gs:0x34740" */ - if (dloc->op->segment =3D=3D INSN_SEG_X86_GS && dloc->op->imm) { + if (dloc->op->segment =3D=3D INSN_SEG_X86_GS && dloc->op->imm && + arch__is(dloc->arch, "x86")) { pr_debug_dtp(" this-cpu var\n"); =20 addr =3D dloc->op->offset; @@ -1394,17 +1401,13 @@ static int check_matching_type(struct type_state *s= tate, return -1; } =20 - /* Access to per-cpu base like "-0x7dcf0500(,%rdx,8)" */ + /* Access to global variable like "-0x7dcf0500(,%rdx,8)" */ if (dloc->op->offset < 0 && reg !=3D state->stack_reg) { - const char *var_name =3D NULL; - addr =3D (s64) dloc->op->offset; =20 - if (get_global_var_info(dloc, addr, &var_name, &offset) && - !strcmp(var_name, "__per_cpu_offset") && offset =3D=3D 0 && - get_global_var_type(cu_die, dloc, dloc->ip, addr, + if (get_global_var_type(cu_die, dloc, dloc->ip, addr, &offset, type_die)) { - pr_debug_dtp(" percpu base\n"); + pr_debug_dtp(" global var\n"); =20 dloc->type_offset =3D offset; return 1; --=20 2.45.0.rc1.225.g2a3ae87e7f-goog