From nobody Thu Dec 18 07:28:48 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24122168AE2; Wed, 1 May 2024 23:21:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714605695; cv=none; b=MXE8Nv7vfxIyegR5ZHusBQY4j0vgoaIDtWcnv+LPkdWgbALWwyMbty/vpTisnZ1j/+qUW0t9XCYYsxR9935tkIJWWixWhqsMOdZIU4GHs6vvWU55UNuxLhf6qvKaRLxSL+Ndo0waVUgWKz2lSXwKzpCPYwpx659GLQh+OPeVHWc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714605695; c=relaxed/simple; bh=PjIIBgLr+DWstHxKJAAho0J12+hAPDhHwNbpvgl5zCA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QjDIyEcmVF6RuQPpkSWzskZu89SdNOa3+lf0kKVEoU/TcEWNR9LX0gs2i55EB1I2e5FErYXdO1KHrZWBEl3CctPGCyZpHLyU7bqbMlXk2OEtirAtDLfTYOvfeyAHn3BRNKKm3/HfVtmIFmctSIhIWhqvvw4E7bEERLN3POh+SSY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SAD4W3nm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SAD4W3nm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BCEB1C113CC; Wed, 1 May 2024 23:21:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714605694; bh=PjIIBgLr+DWstHxKJAAho0J12+hAPDhHwNbpvgl5zCA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SAD4W3nmymLlQ101Ufjj+TJsSyo//tQXuHtAPRSXD79p+3bQip6eWH5pV5fOQCRsr 8OUisyyw6+oraEt33gcn80SGacU/H+CzZUXe5PvHQLtTwBLa4Yb3hF1R2+7oPAAnmT m/KvKpe2FjkeZfNn83zirKlEJFk0wRHcrg/VB4VshlmHD7dmg9Vg9lpWcFRa9nRlJf HsjTuCmgDSWBqQ8UrkHSK5U+gJ7jNvOiLfWz3Ye8hBm4bzGGXRujhNakHeQPOy/vML /2sfqun0/G98sv9wBCVtqcx13pZxtThyjnhROMAPORxWrqeSMEH5d/MLDaXwd8T95m DPHpfej2Inl/A== Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id 671A6CE12E9; Wed, 1 May 2024 16:21:34 -0700 (PDT) From: "Paul E. McKenney" To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, kernel-team@meta.com, mingo@kernel.org Cc: stern@rowland.harvard.edu, parri.andrea@gmail.com, will@kernel.org, peterz@infradead.org, boqun.feng@gmail.com, npiggin@gmail.com, dhowells@redhat.com, j.alglave@ucl.ac.uk, luc.maranget@inria.fr, akiyks@gmail.com, "Paul E. McKenney" , Frederic Weisbecker , Daniel Lustig , Joel Fernandes , Mark Rutland , Jonathan Corbet , linux-doc@vger.kernel.org Subject: [PATCH memory-model 2/4] Documentation/litmus-tests: Demonstrate unordered failing cmpxchg Date: Wed, 1 May 2024 16:21:30 -0700 Message-Id: <20240501232132.1785861-2-paulmck@kernel.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <42a43181-a431-44bd-8aff-6b305f8111ba@paulmck-laptop> References: <42a43181-a431-44bd-8aff-6b305f8111ba@paulmck-laptop> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This commit adds four litmus tests showing that a failing cmpxchg() operation is unordered unless followed by an smp_mb__after_atomic() operation. Suggested-by: Frederic Weisbecker Signed-off-by: Paul E. McKenney Cc: Alan Stern Cc: Will Deacon Cc: Peter Zijlstra Cc: Boqun Feng Cc: Nicholas Piggin Cc: David Howells Cc: Jade Alglave Cc: Luc Maranget Cc: "Paul E. McKenney" Cc: Akira Yokosawa Cc: Daniel Lustig Cc: Joel Fernandes Cc: Mark Rutland Cc: Jonathan Corbet Cc: Cc: --- Documentation/litmus-tests/README | 16 +++++++++ .../atomic/cmpxchg-fail-ordered-1.litmus | 34 +++++++++++++++++++ .../atomic/cmpxchg-fail-ordered-2.litmus | 30 ++++++++++++++++ .../atomic/cmpxchg-fail-unordered-1.litmus | 33 ++++++++++++++++++ .../atomic/cmpxchg-fail-unordered-2.litmus | 30 ++++++++++++++++ 5 files changed, 143 insertions(+) create mode 100644 Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-= 1.litmus create mode 100644 Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-= 2.litmus create mode 100644 Documentation/litmus-tests/atomic/cmpxchg-fail-unordere= d-1.litmus create mode 100644 Documentation/litmus-tests/atomic/cmpxchg-fail-unordere= d-2.litmus diff --git a/Documentation/litmus-tests/README b/Documentation/litmus-tests= /README index 26ca56df02125..6c666f3422ea3 100644 --- a/Documentation/litmus-tests/README +++ b/Documentation/litmus-tests/README @@ -21,6 +21,22 @@ Atomic-RMW-ops-are-atomic-WRT-atomic_set.litmus Test that atomic_set() cannot break the atomicity of atomic RMWs. NOTE: Require herd7 7.56 or later which supports "(void)expr". =20 +cmpxchg-fail-ordered-1.litmus + Demonstrate that a failing cmpxchg() operation acts as a full barrier + when followed by smp_mb__after_atomic(). + +cmpxchg-fail-ordered-2.litmus + Demonstrate that a failing cmpxchg() operation acts as an acquire + operation when followed by smp_mb__after_atomic(). + +cmpxchg-fail-unordered-1.litmus + Demonstrate that a failing cmpxchg() operation does not act as a + full barrier. + +cmpxchg-fail-unordered-2.litmus + Demonstrate that a failing cmpxchg() operation does not act as an + acquire operation. + =20 locking (/locking directory) ---------------------------- diff --git a/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-1.litmu= s b/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-1.litmus new file mode 100644 index 0000000000000..3df1d140b189b --- /dev/null +++ b/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-1.litmus @@ -0,0 +1,34 @@ +C cmpxchg-fail-ordered-1 + +(* + * Result: Never + * + * Demonstrate that a failing cmpxchg() operation will act as a full + * barrier when followed by smp_mb__after_atomic(). + *) + +{} + +P0(int *x, int *y, int *z) +{ + int r0; + int r1; + + WRITE_ONCE(*x, 1); + r1 =3D cmpxchg(z, 1, 0); + smp_mb__after_atomic(); + r0 =3D READ_ONCE(*y); +} + +P1(int *x, int *y, int *z) +{ + int r0; + + WRITE_ONCE(*y, 1); + r1 =3D cmpxchg(z, 1, 0); + smp_mb__after_atomic(); + r0 =3D READ_ONCE(*x); +} + +locations[0:r1;1:r1] +exists (0:r0=3D0 /\ 1:r0=3D0) diff --git a/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-2.litmu= s b/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-2.litmus new file mode 100644 index 0000000000000..54146044a16f6 --- /dev/null +++ b/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-2.litmus @@ -0,0 +1,30 @@ +C cmpxchg-fail-ordered-2 + +(* + * Result: Never + * + * Demonstrate use of smp_mb__after_atomic() to make a failing cmpxchg + * operation have acquire ordering. + *) + +{} + +P0(int *x, int *y) +{ + int r0; + int r1; + + WRITE_ONCE(*x, 1); + r1 =3D cmpxchg(y, 0, 1); +} + +P1(int *x, int *y) +{ + int r0; + + r1 =3D cmpxchg(y, 0, 1); + smp_mb__after_atomic(); + r2 =3D READ_ONCE(*x); +} + +exists (0:r1=3D0 /\ 1:r1=3D1 /\ 1:r2=3D0) diff --git a/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-1.lit= mus b/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-1.litmus new file mode 100644 index 0000000000000..a727ce23b1a6e --- /dev/null +++ b/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-1.litmus @@ -0,0 +1,33 @@ +C cmpxchg-fail-unordered-1 + +(* + * Result: Sometimes + * + * Demonstrate that a failing cmpxchg() operation does not act as a + * full barrier. (In contrast, a successful cmpxchg() does act as a + * full barrier.) + *) + +{} + +P0(int *x, int *y, int *z) +{ + int r0; + int r1; + + WRITE_ONCE(*x, 1); + r1 =3D cmpxchg(z, 1, 0); + r0 =3D READ_ONCE(*y); +} + +P1(int *x, int *y, int *z) +{ + int r0; + + WRITE_ONCE(*y, 1); + r1 =3D cmpxchg(z, 1, 0); + r0 =3D READ_ONCE(*x); +} + +locations[0:r1;1:r1] +exists (0:r0=3D0 /\ 1:r0=3D0) diff --git a/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-2.lit= mus b/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-2.litmus new file mode 100644 index 0000000000000..a245bac55b578 --- /dev/null +++ b/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-2.litmus @@ -0,0 +1,30 @@ +C cmpxchg-fail-unordered-2 + +(* + * Result: Sometimes + * + * Demonstrate that a failing cmpxchg() operation does not act as either + * an acquire release operation. (In contrast, a successful cmpxchg() + * does act as both an acquire and a release operation.) + *) + +{} + +P0(int *x, int *y) +{ + int r0; + int r1; + + WRITE_ONCE(*x, 1); + r1 =3D cmpxchg(y, 0, 1); +} + +P1(int *x, int *y) +{ + int r0; + + r1 =3D cmpxchg(y, 0, 1); + r2 =3D READ_ONCE(*x); +} + +exists (0:r1=3D0 /\ 1:r1=3D1 /\ 1:r2=3D0) --=20 2.40.1