From nobody Thu Dec 18 07:29:18 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDDB8168AEB; Wed, 1 May 2024 23:01:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714604493; cv=none; b=EaGS9UOhlOXApKgn9+2oZ5R6iLGkOeV8JBVPT9clDrAW0ZuK4ngA7DYJwJKj430voTNuZxTwmT5lesqoD/ewqYZmHiiPPBwKicEQtvRJpTkQNhwSlUIHQUbMnmOeOZSesKYKLCUNe//fSl4I+MIG2Sp7gymprkG8fjkz376LnIc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714604493; c=relaxed/simple; bh=SsfSYlvMJfbrFJhxWSLRoEWcjcncMnxVxwE9E1US2+0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dPwjrva52oRs2FawzjvVgOWpg9aS6+I4qv6z2ywuEAI/mfD3DUdDrpI5K7m3rMwbbA9KBstIWhZ0FbhvBpar1zijsUZ+Yq1XX5VL3QpeFBj0GKKlJpm6lQY/LXdt8O5TAJFcM3CazauKcCFoAwTr4yudS5HEtwsiUCWvYVzIW6o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=V9pm7RI3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="V9pm7RI3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9A4A2C4AF5F; Wed, 1 May 2024 23:01:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714604492; bh=SsfSYlvMJfbrFJhxWSLRoEWcjcncMnxVxwE9E1US2+0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=V9pm7RI313isYajaxU6MI4BtAEKwQYVKZpihtD6pDfAyLsbTlYMwrzDphvrx4uDqL ouVZ62brQPFvjq/vyub/X6/1rRTblnD+A6lCjJcZ4kz8J9NrxHN/gvSaAxgrbRoUWK EIGtR/OWw60jIByxODo+T7frJzRzgSvIdO09H+YlvB2j1sJMe3v0dtRq0TsISor+M2 uOIU9jypAZqS9REjSY1iqVzoN41WLmWw9hRRW7frIbOFc3c3lmaA3Pzj48K8Wrqijs QyaI7ki+x45dqAgw19g5nDy/dSBbC/IM1trFtyCXIfb5dBoWuSnPhwGh29Xrmg/F/L saURCZYoT6Cpg== Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id E0ACDCE2A4C; Wed, 1 May 2024 16:01:31 -0700 (PDT) From: "Paul E. McKenney" To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Cc: elver@google.com, akpm@linux-foundation.org, tglx@linutronix.de, peterz@infradead.org, dianders@chromium.org, pmladek@suse.com, arnd@arndb.de, torvalds@linux-foundation.org, kernel-team@meta.com, "Paul E. McKenney" , Yujie Liu , Andi Shyti , Geert Uytterhoeven Subject: [PATCH v2 cmpxchg 13/13] xtensa: Emulate one-byte cmpxchg Date: Wed, 1 May 2024 16:01:30 -0700 Message-Id: <20240501230130.1111603-13-paulmck@kernel.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on xtensa. [ paulmck: Apply kernel test robot feedback. ] [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] [ Apply Geert Uytterhoeven feedback. ] Signed-off-by: Paul E. McKenney Tested-by: Yujie Liu Cc: Andi Shyti Cc: Geert Uytterhoeven Cc: Arnd Bergmann Cc: "Peter Zijlstra (Intel)" --- arch/xtensa/Kconfig | 1 + arch/xtensa/include/asm/cmpxchg.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index f200a4ec044e6..d3db28f2f8110 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -14,6 +14,7 @@ config XTENSA select ARCH_HAS_DMA_SET_UNCACHED if MMU select ARCH_HAS_STRNCPY_FROM_USER if !KASAN select ARCH_HAS_STRNLEN_USER + select ARCH_NEED_CMPXCHG_1_EMU select ARCH_USE_MEMTEST select ARCH_USE_QUEUED_RWLOCKS select ARCH_USE_QUEUED_SPINLOCKS diff --git a/arch/xtensa/include/asm/cmpxchg.h b/arch/xtensa/include/asm/cm= pxchg.h index 675a11ea8de76..95e33a913962d 100644 --- a/arch/xtensa/include/asm/cmpxchg.h +++ b/arch/xtensa/include/asm/cmpxchg.h @@ -15,6 +15,7 @@ =20 #include #include +#include =20 /* * cmpxchg @@ -74,6 +75,7 @@ static __inline__ unsigned long __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int si= ze) { switch (size) { + case 1: return cmpxchg_emu_u8(ptr, old, new); case 4: return __cmpxchg_u32(ptr, old, new); default: __cmpxchg_called_with_bad_pointer(); return old; --=20 2.40.1