From nobody Thu Dec 18 07:11:26 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F208D168AEE; Wed, 1 May 2024 23:01:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714604493; cv=none; b=F3EJAG2MJqDhE68IcXYIYxH8IFQbOMLg6rCGfn/bZATs+rksJqRBoqg971iyLmXq1FtJnuzjmPwP8CQEWgG4UQpW3XRhqqMc74wda7+HP6kg8Cg+7zIrsw5QyJ9QkBxvpUnxe8ztWnI6ihc2e1CABi+Hwuj3/XrEFxc8AfAfpLI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714604493; c=relaxed/simple; bh=WKYKHYI+0R9pnBOWkWIHPz6LwRVJ8kFwJ9YA0/qhV2w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=V3q8zQEmnvfAaflKN4vRdalhuRr4zHYSrvI6X6G97j4Fwx6aUlIudmfKcUMMqYqUCmAiGcERsGg/Q3eRIhMOU+kYczVmmuvgkWdHSk8x8a/1x+nBBgqf0xVceEFDorWjrXfoEcMUQJatz2H+vrjFFNCzPxJ59RNrqCF8uEvJCbc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dkWvtQ6I; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dkWvtQ6I" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 98781C4AF53; Wed, 1 May 2024 23:01:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714604492; bh=WKYKHYI+0R9pnBOWkWIHPz6LwRVJ8kFwJ9YA0/qhV2w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dkWvtQ6ImaDQCpaRW/GM9Kxzl0aMNvM9bdSFLU8tjP3IWqGR94n9mzXRMHpo/vVOg mRUw4scDFHfgYIlsKRdUSg6sInyTZ5IaA9+LDGZUtQev4+wh4bkZ7zPARSE3KsOIwh fN0WTi/qhrENELvVALKC3tNx1KI/JlCvBW268k8W+O5v1UbuLrOoySYEpEExLn0+iP 4a6kepf53caGhWEzeqvAaAH+azO6u6lF45KeQ/BcJzJsbKnkdTGoaW2uaS0oDpGrBb J6AJFvndPWBPuOFmc2GFTGW4wZks5AWHN+kPL9lsT8tPCs5aWon5m62Qh6k8zrv5T7 nAMNrZzVCuA2w== Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id D9D84CE28A8; Wed, 1 May 2024 16:01:31 -0700 (PDT) From: "Paul E. McKenney" To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Cc: elver@google.com, akpm@linux-foundation.org, tglx@linutronix.de, peterz@infradead.org, dianders@chromium.org, pmladek@suse.com, arnd@arndb.de, torvalds@linux-foundation.org, kernel-team@meta.com, "Paul E. McKenney" , Yujie Liu , Guo Ren , linux-csky@vger.kernel.org Subject: [PATCH v2 cmpxchg 11/13] csky: Emulate one-byte cmpxchg Date: Wed, 1 May 2024 16:01:28 -0700 Message-Id: <20240501230130.1111603-11-paulmck@kernel.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on csky. [ paulmck: Apply kernel test robot feedback. ] [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] Co-developed-by: Yujie Liu Signed-off-by: Yujie Liu Signed-off-by: Paul E. McKenney Tested-by: Yujie Liu Cc: Guo Ren Cc: Arnd Bergmann Cc: Reviewed-by: Guo Ren --- arch/csky/Kconfig | 1 + arch/csky/include/asm/cmpxchg.h | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig index d3ac36751ad1f..5479707eb5d10 100644 --- a/arch/csky/Kconfig +++ b/arch/csky/Kconfig @@ -37,6 +37,7 @@ config CSKY select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION + select ARCH_NEED_CMPXCHG_1_EMU select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace) select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT select COMMON_CLK diff --git a/arch/csky/include/asm/cmpxchg.h b/arch/csky/include/asm/cmpxch= g.h index 916043b845f14..db6dda47184e4 100644 --- a/arch/csky/include/asm/cmpxchg.h +++ b/arch/csky/include/asm/cmpxchg.h @@ -6,6 +6,7 @@ #ifdef CONFIG_SMP #include #include +#include =20 #define __xchg_relaxed(new, ptr, size) \ ({ \ @@ -61,6 +62,9 @@ __typeof__(old) __old =3D (old); \ __typeof__(*(ptr)) __ret; \ switch (size) { \ + case 1: \ + __ret =3D (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uint= ptr_t)__old, (uintptr_t)__new); \ + break; \ case 4: \ asm volatile ( \ "1: ldex.w %0, (%3) \n" \ @@ -91,6 +95,9 @@ __typeof__(old) __old =3D (old); \ __typeof__(*(ptr)) __ret; \ switch (size) { \ + case 1: \ + __ret =3D (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uint= ptr_t)__old, (uintptr_t)__new); \ + break; \ case 4: \ asm volatile ( \ "1: ldex.w %0, (%3) \n" \ @@ -122,6 +129,9 @@ __typeof__(old) __old =3D (old); \ __typeof__(*(ptr)) __ret; \ switch (size) { \ + case 1: \ + __ret =3D (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uint= ptr_t)__old, (uintptr_t)__new); \ + break; \ case 4: \ asm volatile ( \ RELEASE_FENCE \ --=20 2.40.1