From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pg1-f180.google.com (mail-pg1-f180.google.com [209.85.215.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8168E1946C for ; Tue, 30 Apr 2024 06:13:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457641; cv=none; b=T7/d6YEImTsNWsI11ZmhSXGJhulb6gu7wMbZdwD07B5bEXYAkFPIDFZ1pLymZuytWeX/lcc2IVO7oRCu5y3vbTUjSFNtMYbzZ8xPKCcKFYjDJJVghPthYV0cAHF+Jn4R6vY3Eopn/bKjODlIFAl6nmmOkbC/MKEVoOdSsH3G82Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457641; c=relaxed/simple; bh=jt1D2ByjrZn+3+b2hbWiJrAvnVxKB+ZADxZB6BY649I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DmlqTTdliYrAUmh9gn2DC5gnUXFar+geQFGelRYQABrQYkojhnNdfJq7/+y8XhCwreCc1kJW4CvDV7uiV0J0wH/W8G6HmT6eitb8voaS1xh/qYuTjQQ6u5lHdSl1w4gCm+64/zEllaBSBBFaIr6BOtXoTa3ixigBv3+XiYRLmXI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=R8nGO2hQ; arc=none smtp.client-ip=209.85.215.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="R8nGO2hQ" Received: by mail-pg1-f180.google.com with SMTP id 41be03b00d2f7-6123726725eso1656240a12.3 for ; Mon, 29 Apr 2024 23:13:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457639; x=1715062439; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=wXh9sF7R3fzAgfyMkAPr9tJsPtu8XJez/oIKM/eXa7g=; b=R8nGO2hQFErTYN1HJ1ExPKNtnSmJ1DRfz5XfAbofqxErMW7pIsM+sNwc2m5PnNHgIs u6SPbnNFtkAcjj8YXbStJZr/2wLIYESrPrbetxVLwthCwDuMl6b4N/X4bePRpFTlivCy hE4u8bjKf19ouUV44V3+F9OFFx3fYL2Kl6UUnmh0Vax0GXdC0i5cm42QhnzSxeKPMtI1 uQ7FovKPAg3JPRrBFm71tr5siAboC+/ibG6XBq1/DXsg9cBiPW6s8Axb7PfrVSJjXktG 60/GBwO98qfi/p/xc30viW5TsaKwpUfBIzDeQQOL9qYLs8Q5XIpYIPqX8TqkgK+KvK8b IBFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457639; x=1715062439; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wXh9sF7R3fzAgfyMkAPr9tJsPtu8XJez/oIKM/eXa7g=; b=G6ty2kewew5Xg0dw9mZLVCaojTw6mCaI7L5gWPzbAhtKTl6kyIG4gapbaVenv+BJd8 1hQl+iDQofjzLKDZSbe8SJWuHzQIhALsAmIxHOp4zfGd/HI6J1Ok/rbfDR7VDBTaEl9j ftFdQ55c3gQ9C1zfcalQO3pb18VijnwmgBLVFscsteb/XN7rRT7Rlu8hV7JXT8BIg1SX RJ/M0wn9+UJlcCh3Y89Wf9/2rswjzbQVfVU6A0detXbJAZQzS+LeFd4ySStvWcj/PUaK uwVxbEjaSzIa0VnN8ABuyAMIaaWPFKRxdAt8NvOZDjfNcKBdyNfflbiKNdUaz5a5Tlh7 oh6w== X-Forwarded-Encrypted: i=1; AJvYcCXWrBqN8suwJMOludI8AZpcbUTvzMF5hhsWSdyK9/Iy0DzgeP5S+ubmoN8ocDxrAg30SOOJkIzMKWBaRiSx4KZJA/B0Rl+EBZzk/HeZ X-Gm-Message-State: AOJu0Yz2YuThUI2Tnd0rXHPdL4wKvpw0OAmNPmFbNTMVQf6Xu6aSSkwc Y4gm6qLDjxQ2Iw2Mfg+H9joPKWPp62HDhfC+lSTaVl6W16WL7ZLMqld1/IeqMw== X-Google-Smtp-Source: AGHT+IERNIpcVXnSkXOmcaImsK+5bkppIPbBwq2zMma4pGcKZ6IuGe+V26L0xyysFM6Tlh3EGcEAVw== X-Received: by 2002:a05:6a21:8801:b0:1ae:42f0:dd40 with SMTP id ta1-20020a056a21880100b001ae42f0dd40mr11483048pzc.10.1714457638098; Mon, 29 Apr 2024 23:13:58 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.13.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:13:57 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:42 +0530 Subject: [PATCH v4 01/10] PCI: qcom-ep: Disable resources unconditionally during PERST# assert Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-1-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1435; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=jt1D2ByjrZn+3+b2hbWiJrAvnVxKB+ZADxZB6BY649I=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIway5+22p+3zzxNye4e9nY6gatrHr6KQJdEi xojXepGaKCJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMGgAKCRBVnxHm/pHO 9exSCACQpshGLWqd2q2FIap/b/j21N7ezIygTykNAuBoxRvI52wZ7AgL4XAc7ehW7jUy7ug5Yj4 TTAr9ibRkE5YNpUxp2kwf08BbNC5DRpcuZCIQYpK1rXSXrQBmDkotbUlhyVLxbe7jiQJsXxMetC K/WGd+ng5BS8AmHl2eEkY4QMivJbKBKS5edIIKZ16T2pxXe3vyIonISkA1AIwtlpGT9MU6mu4cf 6VlwgFmFLZqzZ6M1H1FFyVRFfLDUMRbDmW65qFy07zxaptW12SOqb3qt3wiknS/pnqHopJ90JYg TkFD1kWZCtArPpPV3V8m+m1BYaStbdLk91RodRTAtyF0wDmH X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 All EP specific resources are enabled during PERST# deassert. As a counter operation, all resources should be disabled during PERST# assert. There is no point in skipping that if the link was not enabled. This will also result in enablement of the resources twice if PERST# got deasserted again. So remove the check from qcom_pcie_perst_assert() and disable all the resources unconditionally. Fixes: f55fee56a631 ("PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller d= river") Reviewed-by: Niklas Cassel Tested-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 2fb8c15e7a91..50b1635e3cbb 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -500,12 +500,6 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pc= i) static void qcom_pcie_perst_assert(struct dw_pcie *pci) { struct qcom_pcie_ep *pcie_ep =3D to_pcie_ep(pci); - struct device *dev =3D pci->dev; - - if (pcie_ep->link_status =3D=3D QCOM_PCIE_EP_LINK_DISABLED) { - dev_dbg(dev, "Link is already disabled\n"); - return; - } =20 dw_pcie_ep_cleanup(&pci->ep); qcom_pcie_disable_resources(pcie_ep); --=20 2.25.1 From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pf1-f178.google.com (mail-pf1-f178.google.com [209.85.210.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 264511B96B for ; Tue, 30 Apr 2024 06:14:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457644; cv=none; b=pAeo/WaVQoY07HVbVrfvfeu+zfnpZ/IKgoDDjS9Pi//w8bnTLWvsMd2kIVNnB9QI2gAmfSALRR3TJ/oehEMuaqp9xCQWB5VoTvbtaDWq7DBdw287nzjcjlfv+q/lUiWjVpB3oCeFE/alYKRq8OZ9nVrn7J78FBxVgylfK9gtFnw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457644; c=relaxed/simple; bh=yKmOOaJz6i/wVDMqUoPJz0PoZUhAo27Wo6a6cpCeIcI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JfW5F/fop82wXY1QpyyLF9PidGl7kEBcAMwXQmBw3aZRVsJfjK9HKbn4/ouBNLfEZh/earHmcBo+dlMi/qGwRWIOdwKCbjrfFQNWajrkKON0SOhTRaZ/j4v4DEKBHPJL7+V54RiO0utIME1Lj2O+6uuHOHgFYtHJMRTD5dWg8bk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=iBm+pmxv; arc=none smtp.client-ip=209.85.210.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="iBm+pmxv" Received: by mail-pf1-f178.google.com with SMTP id d2e1a72fcca58-6f4178aec15so81973b3a.0 for ; Mon, 29 Apr 2024 23:14:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457642; x=1715062442; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=RXHWTwzfZvv6uYitrN43H3qh6MlnEfQjLqcWZK2Nh3g=; b=iBm+pmxvSmGk0eyqrS2uwTsOHARu66rKLTZTE7mr+2uNTTi6AiIwipBaXJaj9zTBol cb886gIjMMZqfRSsSL76euGZmMhZRFrjPJzsAffp+83Nz1ET6UX3rrWk43QerhE3G3+A /r/hPl769n+QXQZtMDz1YUg+cIGDWYAk7iW2H7YBGdVFVkZDReHBuJ0uFfm8nQX6zKRJ 14PQr0GaV3EsJm14swLRJaAyotKl9cN9Pn1l2TTNq90ZaF7pwVOAX8K1oi2L/RBBo6gD LVBntDAoWFzhjQ7fX6mx0uZhPSK1tlQufSL1H3ZNsVa8hxkGKehVE74pbg20bV9obweB zn2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457642; x=1715062442; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RXHWTwzfZvv6uYitrN43H3qh6MlnEfQjLqcWZK2Nh3g=; b=ByMaqrjVXFVvh29FXa+okB3tOPNZIOx9RVgHtAlDhKQUP4q7smzNinY5ZFF3ghlddN 8gL7W6DuBtQ0I3WlWipl7dp1VbvgN2wifsC89+P0Id4TFxiEPehBLU4u2UDBR+fY9Ju3 8x1vqci755P58GtgB+Vh1rj/UvR1/FkEVQMb78AoVu6L6gSbiuMjs23EFsyOxVGW4UDu N5tWJO+SI/qvZ7zCoGxis6Z381lUPJSFmR/qjoY5ZG1MAxzKIoF9eWMxCFMkitddr/Zq KrSwYD1ZxL0tRTAuo9NVUtXrE5awb5cOgm9wwKSp+SDRjy4vmCU32/d78PVs+1pAhAy2 +LYg== X-Forwarded-Encrypted: i=1; AJvYcCXGVICcsDUpET/Pnh++cEv/51mzuJlOI4qCT1MFc9tXNErO3LgSxaqFj10JbxjBNH1I/YDnBrsTzoUj0bG01YaFptf+vZVFJTwv6MMq X-Gm-Message-State: AOJu0Yzc4jxUV2PJ8Cx7KHlFvXMF48yGmKSPbZI+ulUEjQzDkADLwN7k tT6fXMTRLrj0j2cY6ATpGmQ4GRJyeGLqgqroqEWYfi4aOBNUQncUKACIDmEh1w== X-Google-Smtp-Source: AGHT+IHRnaevKePYUyqhOl83dh54XWnj9qmpld7AKyPvIOscju3+tYJusTYfY1t7WIa0eSqzmrgVHw== X-Received: by 2002:a05:6a20:918e:b0:1ac:6762:e62e with SMTP id v14-20020a056a20918e00b001ac6762e62emr15304457pzd.30.1714457642237; Mon, 29 Apr 2024 23:14:02 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.13.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:14:01 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:43 +0530 Subject: [PATCH v4 02/10] PCI: endpoint: Rename core_init() callback in 'struct pci_epc_event_ops' to epc_init() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-2-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=5614; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=yKmOOaJz6i/wVDMqUoPJz0PoZUhAo27Wo6a6cpCeIcI=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIwbIgMEUUVe4HsEcCgfAQPJnzSfgUhA+mY8J 1G3MD3KQrqJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMGwAKCRBVnxHm/pHO 9VZOB/48tkYcFkSJngFn0it+wlMUxFNsv5Wi3aeZerWI8GdEuH0YGu2iiVpSTxN5F6qWIrDnvtg 5hH4UgGPYAgXOD6pjAe7mvr1jkuG3KkC+KfQdbkT8kvO6yCXFkyNUfPlzUBNY5yqwNrVZeZNqt4 wse4giYnhWc2KGJ1MpQJVV0gvcGR+UZCRJJ7YjNTCiAPfy1JQCzH8BswrxKacovF7qUek6zWAYQ KFPH8vJO1HFaIc0cbRuL32PFy2o8B1pu/r252b6akQJATr5BsW04nEZCsgKcNtZFkcV8uj5zwtE TnG2ysOFzPAPWBXdU+xxb25slgqbC96twv8UgMiwQMLQRf0B X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 core_init() callback is used to notify the EPC initialization event to the EPF drivers. The 'core' prefix was used indicate that the controller IP core has completed initialization. But it serves no purpose as the EPF driver will only care about the EPC initialization as a whole and there is no real benefit to distinguish the IP core part. So let's rename the core_init() callback in 'struct pci_epc_event_ops' to epc_init() to make it more clear. Reviewed-by: Niklas Cassel Tested-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 4 ++-- drivers/pci/endpoint/functions/pci-epf-test.c | 4 ++-- drivers/pci/endpoint/pci-epc-core.c | 16 ++++++++-------- include/linux/pci-epf.h | 4 ++-- 4 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/end= point/functions/pci-epf-mhi.c index 2c54d80107cf..95c3206f609f 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -716,7 +716,7 @@ static void pci_epf_mhi_dma_deinit(struct pci_epf_mhi *= epf_mhi) epf_mhi->dma_chan_rx =3D NULL; } =20 -static int pci_epf_mhi_core_init(struct pci_epf *epf) +static int pci_epf_mhi_epc_init(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; @@ -897,7 +897,7 @@ static void pci_epf_mhi_unbind(struct pci_epf *epf) } =20 static const struct pci_epc_event_ops pci_epf_mhi_event_ops =3D { - .core_init =3D pci_epf_mhi_core_init, + .epc_init =3D pci_epf_mhi_epc_init, .link_up =3D pci_epf_mhi_link_up, .link_down =3D pci_epf_mhi_link_down, .bme =3D pci_epf_mhi_bme, diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/en= dpoint/functions/pci-epf-test.c index 977fb79c1567..8175d4f2a0eb 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -731,7 +731,7 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) return 0; } =20 -static int pci_epf_test_core_init(struct pci_epf *epf) +static int pci_epf_test_epc_init(struct pci_epf *epf) { struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); struct pci_epf_header *header =3D epf->header; @@ -799,7 +799,7 @@ static int pci_epf_test_link_up(struct pci_epf *epf) } =20 static const struct pci_epc_event_ops pci_epf_test_event_ops =3D { - .core_init =3D pci_epf_test_core_init, + .epc_init =3D pci_epf_test_epc_init, .link_up =3D pci_epf_test_link_up, }; =20 diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci= -epc-core.c index 47d27ec7439d..e6bffa37a948 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -727,9 +727,9 @@ void pci_epc_linkdown(struct pci_epc *epc) EXPORT_SYMBOL_GPL(pci_epc_linkdown); =20 /** - * pci_epc_init_notify() - Notify the EPF device that EPC device's core - * initialization is completed. - * @epc: the EPC device whose core initialization is completed + * pci_epc_init_notify() - Notify the EPF device that EPC device initializ= ation + * is completed. + * @epc: the EPC device whose initialization is completed * * Invoke to Notify the EPF device that the EPC device's initialization * is completed. @@ -744,8 +744,8 @@ void pci_epc_init_notify(struct pci_epc *epc) mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->core_init) - epf->event_ops->core_init(epf); + if (epf->event_ops && epf->event_ops->epc_init) + epf->event_ops->epc_init(epf); mutex_unlock(&epf->lock); } epc->init_complete =3D true; @@ -756,7 +756,7 @@ EXPORT_SYMBOL_GPL(pci_epc_init_notify); /** * pci_epc_notify_pending_init() - Notify the pending EPC device initializ= ation * complete to the EPF device - * @epc: the EPC device whose core initialization is pending to be notified + * @epc: the EPC device whose initialization is pending to be notified * @epf: the EPF device to be notified * * Invoke to notify the pending EPC device initialization complete to the = EPF @@ -767,8 +767,8 @@ void pci_epc_notify_pending_init(struct pci_epc *epc, s= truct pci_epf *epf) { if (epc->init_complete) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->core_init) - epf->event_ops->core_init(epf); + if (epf->event_ops && epf->event_ops->epc_init) + epf->event_ops->epc_init(epf); mutex_unlock(&epf->lock); } } diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index adee6a1b35db..afe3bfd88742 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -70,13 +70,13 @@ struct pci_epf_ops { =20 /** * struct pci_epc_event_ops - Callbacks for capturing the EPC events - * @core_init: Callback for the EPC initialization complete event + * @epc_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event * @bme: Callback for the EPC BME (Bus Master Enable) event */ struct pci_epc_event_ops { - int (*core_init)(struct pci_epf *epf); + int (*epc_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); int (*bme)(struct pci_epf *epf); --=20 2.25.1 From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pf1-f170.google.com (mail-pf1-f170.google.com [209.85.210.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5309025575 for ; Tue, 30 Apr 2024 06:14:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457650; cv=none; b=aTWUZM8z3DnljHSFN74grIuxJ1lmUQB29fN8qNp/VPWkWyIR3h5NXOKqDStu1fLU48PORy7fsQLB4Zw+Pfomh0hGiqPQ/SNVSpmDsf3JSGGzGnwBl65vDoYjBdgy0s4o10yHL3vwfSJDuy/SC5oJvODg0oo6Ifh10NgNGrvBJiU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457650; c=relaxed/simple; bh=kFKAuGzedoWSuUSaNL/I7razvug19SNAED1l9TYAI0w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=e2dURQinEIUcBG6+li0PcfJ46eutHHkvf8kcSfjKP4p+U7QOSrbJPcQJuGMG0Qs1WQo8UKCfHMv4LU/7UYA0A6o6b5cOtYtE3dIWAOQwkJ0KTDPrV+n/cqKSNYgJtE+RW4184d+k53bCcREw3q6+CMBWredL6gNFNSnmAwMxDWg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=sZ7nYDBM; arc=none smtp.client-ip=209.85.210.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="sZ7nYDBM" Received: by mail-pf1-f170.google.com with SMTP id d2e1a72fcca58-6ed112c64beso4991929b3a.1 for ; Mon, 29 Apr 2024 23:14:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457647; x=1715062447; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=0TGpJGvvi+AshzdcWlNzIS1Ij/mm3bKppdj/wqTA4M8=; b=sZ7nYDBM5AKgkX52W/rLhEbGS+2KYkYfGbpaRamK/hiXho8+zd5Z4FBL5hOggZ/spe aCBQPQOZvqgYqGpgmBcEIvn3/wF0g5bApy1b3zmU2BA3HDpCytFhMaE7NTpXprKv81g1 zKIzRqJg2TgadMSJXndaCiBs1p00f5Iemxv/aDWCKY4jY/zkahCCGCCxtORiFCUqq6zN gTomkVb3Xu+UZpusQMti/BK+G4h1vpFkeqispjchkBK6egFupitsxcbZn3H4uuxlMJ9j FiNAq8ccWWYINeldpq9/fjgnz94PQaQCukiOJfNYHKSdhhJel6avUhyVWkGQ7QAoh7hB 5ahw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457647; x=1715062447; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0TGpJGvvi+AshzdcWlNzIS1Ij/mm3bKppdj/wqTA4M8=; b=BnEe/Kl6dcWtb0F7urrpQgRNYADW2StLmqMSafWaEeDNeCVeEcLtqh2azYNGCI7QDR E+dTzw+tDusxI2R/cjBnD/4u1JvpAQj4ehxb7oMvK+9WE2N86SGrrjNs2pxrINKouMan 4XkpU60WNINAD4Cz8p1ano9sxmnTgGcRzfIgkGpBjoJqNf4nWYnHEIl/+nUU+FLXlC2V rCsxrkvTyNQQWDMU106tjNR8zGKa5XXSCwcQ1A4NWFXVFyjaVsfHvzouOlSz93xd0qk4 c5wdXAZZpwuS+WLucS4iRR0VPnzhZLD8UXtMi00zTwAdA+MAeL2Msmkof+A5grR5JqNb LpWQ== X-Forwarded-Encrypted: i=1; AJvYcCVFGd+CHKNmHA8b23JOpNGIpkQX+WHiobXH7N5g92jLEmTvBdOqVZzheYsWszpwWS4XwPCOyT2W88vXlPM9XcUZ4KQZs07gkg5szBMm X-Gm-Message-State: AOJu0YyjhhE8NPs0quR2daP/CztB2fAnxMJs8MkILcHKEFMOvFu2B3BQ sWuqwDv+1Dsw/5TlYe9f6vw0CTn6/XBCAH1M4XqJrWrSXsZTeO2yvOe+0rSS+Q== X-Google-Smtp-Source: AGHT+IHGmNNGRkph+6Tqa8EOLlVW0JJYoMCZeRvIsYVJEi2dNNN2B/TQmfVtkb35uSgkd3rPlAY2Cg== X-Received: by 2002:a05:6a20:de96:b0:1a9:b2a6:1d23 with SMTP id la22-20020a056a20de9600b001a9b2a61d23mr8018968pzb.20.1714457646700; Mon, 29 Apr 2024 23:14:06 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.14.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:14:06 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:44 +0530 Subject: [PATCH v4 03/10] PCI: endpoint: Rename BME to Bus Master Enable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-3-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam , Damien Le Moal X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=6423; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=kFKAuGzedoWSuUSaNL/I7razvug19SNAED1l9TYAI0w=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIwbwy1PT2PyUkp33jlet/EymivMRBO8s+WAQ 88R1SwTs/SJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMGwAKCRBVnxHm/pHO 9Wp0B/4gZGTDfen6gIL85g20lnuW07Bpgr3aIaTGnVVIloGUHnYSMhmRfFEWbmYJo9W5aXfr2z+ +g5Sm5oTAdWhJHxMXJMlUsr52r9X0ieOhcUj1NYTGEm9Cu68lSnHQWC76mNPAbWt8wfP/4Z+HDP /G5GZAwnMWvBSAnyOxEjBskj4ZmVdr/7nlVT5baZ3eLkKu+SCWNsSa90LERb3+iqFGJolGJOXtl phm6Um/kbePwDi6HRqho7aii51QhcV2vClJOJTWjgHWZyX7t3dozYltLmUVosXL/+4+VqotjE9J 18s2Lb176YxZd2LF/bep0aeFackq99IhxSdZyqfEPM6XCaaF X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 BME which stands for 'Bus Master Enable' is not defined in the PCIe base spec even though it is commonly referred in many places (vendor docs). But to align with the spec, let's rename it to its expansion 'Bus Master Enable'. Suggested-by: Damien Le Moal Reviewed-by: Niklas Cassel Tested-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 4 ++-- drivers/pci/endpoint/functions/pci-epf-mhi.c | 8 ++++---- drivers/pci/endpoint/pci-epc-core.c | 19 ++++++++++--------- include/linux/pci-epc.h | 2 +- include/linux/pci-epf.h | 4 ++-- 5 files changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 50b1635e3cbb..f6e925d434f6 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -636,10 +636,10 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int= irq, void *data) pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_DOWN; pci_epc_linkdown(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { - dev_dbg(dev, "Received BME event. Link is enabled!\n"); + dev_dbg(dev, "Received Bus Master Enable event. Link is enabled!\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_ENABLED; qcom_pcie_ep_icc_update(pcie_ep); - pci_epc_bme_notify(pci->ep.epc); + pci_epc_bus_master_enable_notify(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_PM_TURNOFF, status)) { dev_dbg(dev, "Received PM Turn-off event! Entering L23\n"); val =3D readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/end= point/functions/pci-epf-mhi.c index 95c3206f609f..b662905e2532 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -819,7 +819,7 @@ static int pci_epf_mhi_link_down(struct pci_epf *epf) return 0; } =20 -static int pci_epf_mhi_bme(struct pci_epf *epf) +static int pci_epf_mhi_bus_master_enable(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; @@ -882,8 +882,8 @@ static void pci_epf_mhi_unbind(struct pci_epf *epf) =20 /* * Forcefully power down the MHI EP stack. Only way to bring the MHI EP - * stack back to working state after successive bind is by getting BME - * from host. + * stack back to working state after successive bind is by getting Bus + * Master Enable event from host. */ if (mhi_cntrl->mhi_dev) { mhi_ep_power_down(mhi_cntrl); @@ -900,7 +900,7 @@ static const struct pci_epc_event_ops pci_epf_mhi_event= _ops =3D { .epc_init =3D pci_epf_mhi_epc_init, .link_up =3D pci_epf_mhi_link_up, .link_down =3D pci_epf_mhi_link_down, - .bme =3D pci_epf_mhi_bme, + .bus_master_enable =3D pci_epf_mhi_bus_master_enable, }; =20 static int pci_epf_mhi_probe(struct pci_epf *epf, diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci= -epc-core.c index e6bffa37a948..56b60330355d 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -775,14 +775,15 @@ void pci_epc_notify_pending_init(struct pci_epc *epc,= struct pci_epf *epf) EXPORT_SYMBOL_GPL(pci_epc_notify_pending_init); =20 /** - * pci_epc_bme_notify() - Notify the EPF device that the EPC device has re= ceived - * the BME event from the Root complex - * @epc: the EPC device that received the BME event + * pci_epc_bus_master_enable_notify() - Notify the EPF device that the EPC + * device has received the Bus Master + * Enable event from the Root complex + * @epc: the EPC device that received the Bus Master Enable event * - * Invoke to Notify the EPF device that the EPC device has received the Bus - * Master Enable (BME) event from the Root complex + * Notify the EPF device that the EPC device has generated the Bus Master = Enable + * event due to host setting the Bus Master Enable bit in the Command regi= ster. */ -void pci_epc_bme_notify(struct pci_epc *epc) +void pci_epc_bus_master_enable_notify(struct pci_epc *epc) { struct pci_epf *epf; =20 @@ -792,13 +793,13 @@ void pci_epc_bme_notify(struct pci_epc *epc) mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->bme) - epf->event_ops->bme(epf); + if (epf->event_ops && epf->event_ops->bus_master_enable) + epf->event_ops->bus_master_enable(epf); mutex_unlock(&epf->lock); } mutex_unlock(&epc->list_lock); } -EXPORT_SYMBOL_GPL(pci_epc_bme_notify); +EXPORT_SYMBOL_GPL(pci_epc_bus_master_enable_notify); =20 /** * pci_epc_destroy() - destroy the EPC device diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index acc5f96161fe..11115cd0fe5b 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -226,7 +226,7 @@ void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf); -void pci_epc_bme_notify(struct pci_epc *epc); +void pci_epc_bus_master_enable_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index afe3bfd88742..dc759eb7157c 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -73,13 +73,13 @@ struct pci_epf_ops { * @epc_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event - * @bme: Callback for the EPC BME (Bus Master Enable) event + * @bus_master_enable: Callback for the EPC Bus Master Enable event */ struct pci_epc_event_ops { int (*epc_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); - int (*bme)(struct pci_epf *epf); + int (*bus_master_enable)(struct pci_epf *epf); }; =20 /** --=20 2.25.1 From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C79A5383B5 for ; Tue, 30 Apr 2024 06:14:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457655; cv=none; b=W6l25PS0lYqUpfxrXa6a72PwSzNRGhfcdnWjpuOEI2XPaVdh+yHxK2p365GwDhicdN+Xw3vtVG+YZ3H4Yo82HH1c536SIe1yOGWvlt4z9s6bB6lgUDyKwj+oAEykpPjik8d6vMv9b4Zw71uxIttL+dgtv1nYqtC0f3InSvvGEWo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457655; c=relaxed/simple; bh=oU2zGIiFPGVtB03/PgwQpbKi9Fuvq0u/dW2DrTTfPTI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ez4C29qaVzeEN+xNFM4Zf2RmXAkux4vYVpdkYb4xK1GPBOeQOrHpdIKD6YQOjEj8xg3b7z1UdBJMg0Tb27Z9AVMEuWoZuAphiJ0+nd+YWKpzUB4JOPp8GAuFyizctscc9nU2HbqA2HA06yKWZAaL3JD4y7iVGUYmmCC11DaHvIs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=cjiTqXdD; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="cjiTqXdD" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-1e5715a9ebdso44032665ad.2 for ; Mon, 29 Apr 2024 23:14:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457653; x=1715062453; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=7Qc41MgSnlAlN8GJf3G4R2xizfhgFiDGpk5F5rdug0A=; b=cjiTqXdDbSzsWLOXe77ce6Hr+J/NLLFN5gthcLEUuKTw2xq6vZI4Mi/WAh/GvK1V3m VzpGJy5cdWLlmRrVDEDSEwstN0FtxwZ/gQKqgkP2BgeOJd8YVV71UQUSgC/Or037pQ0i n7kxDe8gD7hUy+Y7xPI8NZkvFIHtJNLDt/1PMlB4PvGAfSnPXcVxgM/qvlDQouiZogTl h1XZgrEZI8z9cHC3+AFgpWTJtdGZJQ3NsJfhfOfMEKDPoY2Z/GswhlXHax8MdTJ0y+iz Tn63gA/V1k9z/26Dvtk1LRGaVXshWvw3hX5zbSf4bAHjR5qaW6O+Ke3UN7qbOxkTDyXp mEcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457653; x=1715062453; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7Qc41MgSnlAlN8GJf3G4R2xizfhgFiDGpk5F5rdug0A=; b=sj1sEBh/YLlzxfHu++7q5SUbWxhbWROGg0yCF+chC4xAGpGzEuL9bn36Ytiafc6R0S l0X/8Uy4pVzrwH8I4MaluiawmvaBKWsfYok5CZZ1h9Pm+87nZYxuojEdscL1uQ1RcigQ BNlncaT5le3b3WkFnbjRe/etdMaCEfYgNPJVdHg+H5D+OYwPav4ltVBZdYJBWGmonGPZ GoCWXYB3HcIibTKvnQ6RBLr8BlPq+2v0n38lcmlqITBDzfvSWKSB9nkzV93vzsbS5Mro RjL4VukxOcl52yhi7bKt/cuU/04COzzsxTR+e54LCsp8OxE5Uq7BBMFPfaQvaZ2gxAGx BOxw== X-Forwarded-Encrypted: i=1; AJvYcCU6TeCaCxbklIVSQ6kvhB/VosFd2WWpmcCN1Awq0mBtxMoZzaSHz6ezqF7Ty02ljwHGyFcy/lJ3az7YZwmvLlMVzUXaqx7dePrXtQpO X-Gm-Message-State: AOJu0YwDvs1cO25c1taWY8yHtyoLkZQMiU94acsBsyTSliq1hA3cvoE9 nItseCb32kGm35ekwRCzRMxyZhINDPCFnm8D1EqNu8hcB5vgBa4Yr5f9qG3bMw== X-Google-Smtp-Source: AGHT+IGNkX2KfxzpxFsv4vcjdwa2UrLryt0PGxLjlOXFlzKdYsy1WviVaOAyHt9CqF0GaAoMsDzcrA== X-Received: by 2002:a17:903:187:b0:1e5:a3b2:4ba3 with SMTP id z7-20020a170903018700b001e5a3b24ba3mr12980354plg.56.1714457651066; Mon, 29 Apr 2024 23:14:11 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.14.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:14:10 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:45 +0530 Subject: [PATCH v4 04/10] PCI: qcom-ep: Drop 'Link is enabled' from the debug message for BME event Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-4-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam , Bjorn Helgaas X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1225; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=oU2zGIiFPGVtB03/PgwQpbKi9Fuvq0u/dW2DrTTfPTI=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIwbP0YCI/ZYbaovtlyprT7opKsvmn8IdjyRm Gd98arawG2JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMGwAKCRBVnxHm/pHO 9cLrCACdN3F3bQBncs69QWwIB672VV3E8QT3cBx36vDSp1/ifbMIuD1IqNptAyGEI6yC41YlbpF AtEuJX4ci9QQIIyb24g19PTJSGngnOf8T4cga/axBbd9T7wI0J3m4ZUDrXZFcmSMXLapLPvTVbt CN74D4CJTVnfDr3PD7Idq1PVKo+fULpbNDfKyMvABx+OTDTuNa2F/9UX4fPZf3cYJefXAgB8ZFM pGIalE/c1KTZIJoToV2F+LJRRdFa8q5f/QAmRu/xocXjuMJMrRDkN9REGPMcW26WNw718J9n6e7 QuU4d1BW9lFmsOxeAlHfZ6HNL78eDwD3eZ/ivim0xuxIjYjD X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Bus Master Enable (BME) event that is generated by the Qcom PCIe EP controller due to host setting the Bus Master Enable bit in the Command register doesn't have anything to do with the PCIe link. Hence, drop the bogus statement. Suggested-by: Bjorn Helgaas Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index f6e925d434f6..dcac177b55fb 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -636,7 +636,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int i= rq, void *data) pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_DOWN; pci_epc_linkdown(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { - dev_dbg(dev, "Received Bus Master Enable event. Link is enabled!\n"); + dev_dbg(dev, "Received Bus Master Enable event\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_ENABLED; qcom_pcie_ep_icc_update(pcie_ep); pci_epc_bus_master_enable_notify(pci->ep.epc); --=20 2.25.1 From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pg1-f178.google.com (mail-pg1-f178.google.com [209.85.215.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 28AE63D548 for ; Tue, 30 Apr 2024 06:14:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457659; cv=none; b=mdXJ2OtCRDhVqBNU2FT5YI+i5GbctiXCio4XU9AIjHWHtLyUcGFLgXIH8hbF2j6SbVQAwN0mcn+bohqcupXl8hTazPV/zRaGo1313raKn1/dP0MRk30pPFNmq4gk7OUunK8SktKkKXGHDiHp5z9twyfW1USQTh/+cUVlG35WItI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457659; c=relaxed/simple; bh=m/BK1kL1aRCYhTCw4aRXmvXh94Edt1A2zhsh0TO3Or0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=awXzfUZJUZ7qVwe0Sw/7F77KrM5vG3yzpOayQWUxVBCEVMbS3dP8a6xhvCBRHRSn2xriFrwYK5UorXTX26nRdlkl/iiLmLNbEnrrvhtp08Lhc08wMXEVQ7YEtV4K1yVp9yvhYDDqpsUeqe+er676imvQdsOYLaLm2Z7aSfMocy0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=xMiblaC/; arc=none smtp.client-ip=209.85.215.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="xMiblaC/" Received: by mail-pg1-f178.google.com with SMTP id 41be03b00d2f7-5d81b08d6f2so3890119a12.0 for ; Mon, 29 Apr 2024 23:14:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457657; x=1715062457; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/H37AIQ5wmgwzS4Pf0bW8eYmacsoQGCozpXOaHqRiEM=; b=xMiblaC/v0bG/CREq9DxCIK8of9ttx5OrlJMKygtTU7y0N0fSza5zrQc2g99qHxz8D NMNsnW7OfjnM9cahUYGa3tBVL0wLkyGMCiY0aiRXKDQTP/mFnrtKcUZkH5XBYIKzijul LeJgNEiKLpqpeAvNKldWU8ffL4O4gsA1SweLOhIklGtxOLXcik/K4qoT7BKPENOGkWPr E+gTeXTCoTVthMj15Rx7JUPVFBoKu7ICzRW5LGXPEgHDRMmoZ33h7nACewA0pzNI97xt U1j4em+HLbSCIQ9MO0vI5RVgyAqdVSJrClpkCHuRUE4BMxky9cd3JcK/UswPU/J22SZN az2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457657; x=1715062457; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/H37AIQ5wmgwzS4Pf0bW8eYmacsoQGCozpXOaHqRiEM=; b=KBg8TkVedY9GbJoKdUbops9EKCkErxgz4DPTOsaDH/JLEN6VEenUA/YO0SvAkpxmDr jWKReqX8dOh9BexNWaaJf5li1IVG71FfxMkxIBzzfsTAZ8KPdzOwbcq3TC5HHXAiSUks IjIj9lrRo+di1Ec/wCt+dcHI3RjcC5ZevjlKLxbkg3W1HNDU0m+Q/n1BsuTbKBEf4SAD CbocZb1COpVYhqM3kOuz7td9ttiy1sb2xC0z2U8wyNCcm7/6hrAqx5HYy3oYbiy+Gp+G XovhUPd5VBEza6H4F3MaEJen8bQDOng4Lu2V8Pm2WllYwCspMkXo1zvHnnibnKeMoq4L M87Q== X-Forwarded-Encrypted: i=1; AJvYcCVMeU3fPkRn+ZGXbq8dKgprBbX2DAVkQNF/vuSfirX3DkAi3kChOSYy357+TMrstM7mY5AjvDIhtRGATW96Zn60NeRcVm+WEFG/KmfT X-Gm-Message-State: AOJu0YzGT1FeGDnx+uNJr0jugPgjmJSjNyeIIKwbe0WXyqouV5pRUQRD Kg2SmDuYdhRqbUjbe8ohEDvteIE2le8HqVOdzlf5/aLxRunOWg6iC1907FXQOA== X-Google-Smtp-Source: AGHT+IEK21Qn76VtAoqsMJS8BnT1EZxheKPLo0j/8QzYVaALg0yeONBFIjIqq0CJONX0mzP/UwmsUA== X-Received: by 2002:a05:6a20:5608:b0:1ac:8824:156f with SMTP id ir8-20020a056a20560800b001ac8824156fmr1734647pzc.33.1714457657253; Mon, 29 Apr 2024 23:14:17 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.14.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:14:16 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:46 +0530 Subject: [PATCH v4 05/10] PCI: endpoint: pci-epf-test: Refactor pci_epf_test_unbind() function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-5-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3151; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=m/BK1kL1aRCYhTCw4aRXmvXh94Edt1A2zhsh0TO3Or0=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIwb/mmu7l58017dF61E5qAM63lf1diuOo6as CMUq7VWEjiJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMGwAKCRBVnxHm/pHO 9S46B/0QbA5KRHn7a3ev7DPHmzfj4Umq59fIuPGpkLtbjIcfPoG/9SUoD8hQOWCP2HZU+oseGQ5 TSV1jhhuThcZSODFYO7CgD2gUJuLY/fxGXal3mJQhcW5OMk3+DhoMgSmb51hb5E8y88dD6Ep2Rp VzpGIa9KgZ4YSZhg7FrQ/4EpQq2p8wBtpatR/fnLOINvB0CKgtOIXWy8PoOifYUEu/rq8/GziMc RAN96nx+lbhKZwZEqlicm90hQR/v/ltKLRyR5C2xocVDwofd4sYIDi6fqKfEA0lxRQRj7CbV30R SiaTqzeUtnyiS178hHSU84uwPkngYGBUZz1UoHY1qjUUpxvp X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Move the pci_epc_clear_bar() and pci_epf_free_space() code to respective helper functions. This allows reusing the helpers in future commits. This also requires moving the pci_epf_test_unbind() definition below pci_epf_test_bind() to avoid forward declaration of the above helpers. No functional change. Reviewed-by: Niklas Cassel Tested-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-test.c | 58 ++++++++++++++++++-----= ---- 1 file changed, 39 insertions(+), 19 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/en= dpoint/functions/pci-epf-test.c index 8175d4f2a0eb..2430384f9a89 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -686,25 +686,6 @@ static void pci_epf_test_cmd_handler(struct work_struc= t *work) msecs_to_jiffies(1)); } =20 -static void pci_epf_test_unbind(struct pci_epf *epf) -{ - struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); - struct pci_epc *epc =3D epf->epc; - int bar; - - cancel_delayed_work(&epf_test->cmd_handler); - pci_epf_test_clean_dma_chan(epf_test); - for (bar =3D 0; bar < PCI_STD_NUM_BARS; bar++) { - if (!epf_test->reg[bar]) - continue; - - pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, - &epf->bar[bar]); - pci_epf_free_space(epf, epf_test->reg[bar], bar, - PRIMARY_INTERFACE); - } -} - static int pci_epf_test_set_bar(struct pci_epf *epf) { int bar, ret; @@ -731,6 +712,21 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) return 0; } =20 +static void pci_epf_test_clear_bar(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); + struct pci_epc *epc =3D epf->epc; + int bar; + + for (bar =3D 0; bar < PCI_STD_NUM_BARS; bar++) { + if (!epf_test->reg[bar]) + continue; + + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, + &epf->bar[bar]); + } +} + static int pci_epf_test_epc_init(struct pci_epf *epf) { struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); @@ -857,6 +853,20 @@ static int pci_epf_test_alloc_space(struct pci_epf *ep= f) return 0; } =20 +static void pci_epf_test_free_space(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); + int bar; + + for (bar =3D 0; bar < PCI_STD_NUM_BARS; bar++) { + if (!epf_test->reg[bar]) + continue; + + pci_epf_free_space(epf, epf_test->reg[bar], bar, + PRIMARY_INTERFACE); + } +} + static int pci_epf_test_bind(struct pci_epf *epf) { int ret; @@ -894,6 +904,16 @@ static int pci_epf_test_bind(struct pci_epf *epf) return 0; } =20 +static void pci_epf_test_unbind(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); + + cancel_delayed_work(&epf_test->cmd_handler); + pci_epf_test_clean_dma_chan(epf_test); + pci_epf_test_clear_bar(epf); + pci_epf_test_free_space(epf); +} + static const struct pci_epf_device_id pci_epf_test_ids[] =3D { { .name =3D "pci_epf_test", --=20 2.25.1 From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pl1-f181.google.com (mail-pl1-f181.google.com [209.85.214.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CEB13FE2D for ; Tue, 30 Apr 2024 06:14:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457664; cv=none; b=qvHIicAkh+93T6mApmDk0gP7f+UhBd+bjpS/O+RpSNRHPFiPn7BZbE8RWDVsWosKVh9DgPwtTvyDxmmpinVUP0BBBmQy1Zgq/zq67OF49esDq89U47MC72mhcrVRDE5xTP5uf8Ekyb1UF6vbq9Jd6eHxq5PTUtkT8SawUTp0UBU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457664; c=relaxed/simple; bh=fxOFlEqrH8s0NmdUpIncfdRJDV9aXSUPg8/Z2JiONmY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=A+8FrNIP+LlnxAdMWTqltDc+IFyfd4hWK+bHkJCtdcIZAj3K+9mYCLTiRjI48PsbYcBcJJwr3dzYCmkV72pJ0LZjBomM6LJAiGRGwJso8n21RU2+CbMWY/5Ivx0ZAuNQfJTpA9FQGsIN2Tj3qayF4jqa54Okwyo9oLgD82y4rPA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=qLeoM8uP; arc=none smtp.client-ip=209.85.214.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="qLeoM8uP" Received: by mail-pl1-f181.google.com with SMTP id d9443c01a7336-1e2c725e234so48634715ad.1 for ; Mon, 29 Apr 2024 23:14:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457662; x=1715062462; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=u+LhLTTRlVPNIxUlsbxDURUHk794oxoOs4EVupx50CU=; b=qLeoM8uPyOiDsWqFjisP7Uie+q4AFONp52NgKyyqj09AF/6JpeMmnT68S7ihhMSbo7 qtSksCUi3b5O4LMzRuSW6A0V7neoapdmXLDfkDwgz2hPNPFpGyMNO/iogQ3k2oXjZkhV KlIQ4wk47f8ZLJGHiKDBztf/ZWAqBUD5cx5/vKwNRDMk7Y4T9Bus+7BysTWmJmV9tkzP rV66XggEyl19+VdS8OaIo4gU53AvF8qZndcjJQtoOg7xOzbmZWvc3H8U8kKw9swDhcT1 xYZA7EHG2uSleR1j46o8S47G+NFsgDNFd/NMrf8QlZaz+lgysKT5o5oBrOCTN1es29CV AUHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457662; x=1715062462; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=u+LhLTTRlVPNIxUlsbxDURUHk794oxoOs4EVupx50CU=; b=W7ktfuuQs1jyXAdD/zpxieCnxtklnIYsK3fDAkmb/cRYF0wTvjEpBKasve61KV+UGj rjadUUpLiyq4wxYoFhU9RN/woGmJOA5/d1FVlKyLAFWChKoTGKKwXuEVMZUQi+vl11d3 Y6sqYzge5XOif8mJao9Os5eRaoyNG7TS44fNPDu1+91N+vfbpYXmhW0/WZlPbSJGxGju oNMGdjMZVdVsyiNt2Ne/Zt77QwH7SMz91zPiRth2ndTTjg/Xc4v/iJOfm/Rsuz+ChGKl qdEmZErNnN7tPiZmb4vwCcD9/WQ5EK46JoXrbd7ey5SM+wrQ5fhr12mHM7dPb0ngGvE1 6Cig== X-Forwarded-Encrypted: i=1; AJvYcCWhpQeBP87t6eLdP9PSe8YEfvVZpudT/grWpyXTfLygqUoCVtxtChHBk6bO4XEibpcdQQmzUfjWUu2KIuiJOSJwcomTGtcj7HBjAHGr X-Gm-Message-State: AOJu0Yze1UjIJ6YblAtwUunsyfjGB5NeVVdJqx4T5o5WDU9XJV7zFenV xtvsUYZuWd1DXUaRlleWNBk0jr4gPy2q2WUAtEEbzrCNztWA7XU4sdwTTu4rfA== X-Google-Smtp-Source: AGHT+IFWlPaXe3kuXbbaQlVjvn0iudNPxNrJncJAz+KnsWqRTsjZxYwDlzmEsK2RjGwFICO+fhb75A== X-Received: by 2002:a17:902:ee85:b0:1e4:3909:47e9 with SMTP id a5-20020a170902ee8500b001e4390947e9mr1978403pld.11.1714457661486; Mon, 29 Apr 2024 23:14:21 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.14.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:14:21 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:47 +0530 Subject: [PATCH v4 06/10] PCI: endpoint: pci-epf-{mhi/test}: Move DMA initialization to EPC init callback Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-6-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2562; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=fxOFlEqrH8s0NmdUpIncfdRJDV9aXSUPg8/Z2JiONmY=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIwck7CQqxzGBBs27ekqmsyQcFl5lEyaDCdB8 8krlBTAf++JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMHAAKCRBVnxHm/pHO 9QUzCACfAYietdg49h4Io7A9JcQicHUuAGWxbqV4vUVXxeXJtCl6Miy+KCY5XHgGfOgjQtuZvXm zvS6jYckAS2N4pvESS0iQlIDy9luPOi0FObpSjpHGWDUabNNjqMIo9CBT+aJartV64WtMWkiwcU RGyqedqiMsrit5fYARIa+aBaDTHJaR72PchxxQCcybCBFi2VxP7VfFNzMfOZTyt+uS2FlVRqEe0 2k1l9TA8KiH8iEx46IL1N6Fy9GsMuJg+yp0McCsDyhEZ2NutAjxigxr7iXRUe+Q0yQnEqHptit1 go5SFswb1gMp4kr4mCLqpIsVNRVcgVrE/dsmada8hKq3phx3 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 To maintain uniformity across EPF drivers, let's move the DMA initialization to EPC init callback. This will also allow us to deinit DMA during PERST# assert in the further commits. For EPC drivers without PERST#, DMA deinit will only happen during driver unbind. Reviewed-by: Niklas Cassel Tested-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 16 ++++++++-------- drivers/pci/endpoint/functions/pci-epf-test.c | 12 ++++++------ 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/end= point/functions/pci-epf-mhi.c index b662905e2532..205c02953f25 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -753,6 +753,14 @@ static int pci_epf_mhi_epc_init(struct pci_epf *epf) if (!epf_mhi->epc_features) return -ENODATA; =20 + if (info->flags & MHI_EPF_USE_DMA) { + ret =3D pci_epf_mhi_dma_init(epf_mhi); + if (ret) { + dev_err(dev, "Failed to initialize DMA: %d\n", ret); + return ret; + } + } + return 0; } =20 @@ -765,14 +773,6 @@ static int pci_epf_mhi_link_up(struct pci_epf *epf) struct device *dev =3D &epf->dev; int ret; =20 - if (info->flags & MHI_EPF_USE_DMA) { - ret =3D pci_epf_mhi_dma_init(epf_mhi); - if (ret) { - dev_err(dev, "Failed to initialize DMA: %d\n", ret); - return ret; - } - } - mhi_cntrl->mmio =3D epf_mhi->mmio; mhi_cntrl->irq =3D epf_mhi->irq; mhi_cntrl->mru =3D info->mru; diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/en= dpoint/functions/pci-epf-test.c index 2430384f9a89..ab714108dfdb 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -739,6 +739,12 @@ static int pci_epf_test_epc_init(struct pci_epf *epf) bool msi_capable =3D true; int ret; =20 + epf_test->dma_supported =3D true; + + ret =3D pci_epf_test_init_dma_chan(epf_test); + if (ret) + epf_test->dma_supported =3D false; + epc_features =3D pci_epc_get_features(epc, epf->func_no, epf->vfunc_no); if (epc_features) { msix_capable =3D epc_features->msix_capable; @@ -895,12 +901,6 @@ static int pci_epf_test_bind(struct pci_epf *epf) if (ret) return ret; =20 - epf_test->dma_supported =3D true; - - ret =3D pci_epf_test_init_dma_chan(epf_test); - if (ret) - epf_test->dma_supported =3D false; - return 0; } =20 --=20 2.25.1 From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pl1-f181.google.com (mail-pl1-f181.google.com [209.85.214.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 937D2405F8 for ; Tue, 30 Apr 2024 06:14:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457669; cv=none; b=K/ytasXU2sVHZjguDs+Bpkbjd+moXZWjZ2teQPRv/VHIHN4we6ZuHZlj3iPsRLc+beOvWBqu+Zo8aDy9rWvbYULOQsz/wghG/aevipRq7uNqw2Tawl3JqhcpTpCOIWEae/x6+JqSqUyVVlQtWJwW/u6kwCYrsM+DzQWMXiPIZc0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457669; c=relaxed/simple; bh=bGt+X/i2ZC4r4u7849G7cSM/cOIC/TabQxZyQ/Cl8ZE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IIKSvuak93kX5OOtc+ct1qRc5L1yLCoHx0/g5bpmE64p7/NhlHoaSFfXK+Wq3PdtAmAC0oZVmPTm5tm7acFirNHMvLhRltH2W8cd0wvI2C9eQdJxU7NcyQ/PlDpYOGwgm+loC3MwuxflBlv3rnGiiEwcb1E7nl93HawhHTJ57o4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=CNtG1c7y; arc=none smtp.client-ip=209.85.214.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="CNtG1c7y" Received: by mail-pl1-f181.google.com with SMTP id d9443c01a7336-1eb66b6953cso23063855ad.2 for ; Mon, 29 Apr 2024 23:14:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457666; x=1715062466; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hNi/qtFkLFLZz/waE6YUdyXfhsyOD/C0ipSKGQQehTw=; b=CNtG1c7yLASpKhq90laRWHwpxCxioR1bke6rVCCDfTpKWGiF3n55lyqnRV/2gIX7mM bSF27j3nOWgh+r4rzNGVTVjlBKMv94cgjSWmb6kjz86oNtGLzKA5goD6TGqx257K28My p3jWu76oZvezpJzjRgHxYeoke2FVVOhjyB/do1ZWpXMldxm32ASpat83OSe8dfk9h+4f YjfTudSin24FnCHiO0tJ9SM19J040g82PMyGLFvzWXhBthtfwtJG5VxeNgwrcierA2Y8 w/lZ8sMDaX9QX9xcdCyk6sh3yEdA8TkGoFRtSxSWY9PITWXP5wdER14TABfbHi6L6tud 5U7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457666; x=1715062466; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hNi/qtFkLFLZz/waE6YUdyXfhsyOD/C0ipSKGQQehTw=; b=gY2iTILWcrUY8+Pj8xd1YxMJmob6ToZNjvsSlpca9RSEzTXTIcfMxeaQlG1ZVLPYC+ s3mpN4g3Y8BajU4zlIH9bRkFtQ3ALRUe0m47emyho2bNf9Ras2yHRJNHekhqfeN99g9j MGDQ3lvgDp5nClcSNw6q8B3DfiWHBV+BrNcKhYpg+lBhfdUOD4uipnjBEye5CiYHfUcR jqGjkqkwAiUUqA4/hMnLUt6Ihk0VbM4WJ+Cy/7IQRoGS3vM41xE0cRLJEVwfKcLDzzMl XDYEUwcWuAs/OctvtCfVGmG0J8jbvOdMqe+wgiGc0yrh3XovcFoU8GzAR9C1Z7g2Wx44 Pf3Q== X-Forwarded-Encrypted: i=1; AJvYcCWEN4P5V99pW6uT9652CWmmI+9JAIMTZKvWXwM8W4OGq1MSrfpqz8KGGUtKA9qE8DzHR9olqKn5S+4jZVLH+NsNCrkkLshYzkdLTVjO X-Gm-Message-State: AOJu0YzS2vusHW9JXcQCO7fJzoinwKpsBgLIXsx3UrIW1yqe5ItFUd8j lkTM38NLC9SLd0cTKFLHth7qoQLcj4HPFWDA8N/J+k+CNzVtTM5xr4vT+yXd6A== X-Google-Smtp-Source: AGHT+IG1pJHZMsAzu7ccSnj9j8IX0I6hzhc4T+v5oZgy6lzMNubY775q4Qo3IDIUbLhTSG6XpL2//w== X-Received: by 2002:a17:902:a705:b0:1e3:e39a:2e49 with SMTP id w5-20020a170902a70500b001e3e39a2e49mr1526667plq.18.1714457665718; Mon, 29 Apr 2024 23:14:25 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.14.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:14:25 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:48 +0530 Subject: [PATCH v4 07/10] PCI: endpoint: Introduce 'epc_deinit' event and notify the EPF drivers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-7-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=8829; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=bGt+X/i2ZC4r4u7849G7cSM/cOIC/TabQxZyQ/Cl8ZE=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIwcrWQ9AXNa3HSx8EkiSzDGUqJxPN+SHoMUx lP8NaJ5Rt2JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMHAAKCRBVnxHm/pHO 9WIWB/4xvRq7D9RXIX/tQEylcSejZoE3pRqoiwffe9HFzdZm9WcQjxaCi1Rf3xF3eTM1JMObTcb gKIrGEKqSnPacUFW7pmii8iBIhnGs4pH4ouTISwMhDUoTnxL0ZPU4aukc2/WuENKUie+Fea3Tme ZsQU1pniL70WgWduaCPS2A+PIt58isGL0XoeWLU4l9HsORo2tp7bgsyXBPncDrLWgbvaye6b1s2 FrXf1kgX5PMeggOdBLE/tUT+N5hn7hd8HWkRuAPCPVWh0CsBo/O6P8i3AIY4xOhg2D3Z+GGwgOs VVAlbd9Z/enoVo38Z02ZRxjY2zgYb1kyLmJNl6gUDkXdD4t3 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 As like the 'epc_init' event, that is used to signal the EPF drivers about the EPC initialization, let's introduce 'epc_deinit' event that is used to signal EPC deinitialization. The EPC deinitialization applies only when any sort of fundamental reset is supported by the endpoint controller as per the PCIe spec. Reference: PCIe Base spec v5.0, sections 4.2.4.9.1 and 6.6.1. Currently, some EPC drivers like pcie-qcom-ep and pcie-tegra194 support PERST# as the fundamental reset. So the 'deinit' event will be notified to the EPF drivers when PERST# assert happens in the above mentioned EPC drivers. The EPF drivers, on receiving the event through the epc_deinit() callback should reset the EPF state machine and also cleanup any configuration that got affected by the fundamental reset like BAR, DMA etc... This change also warrants skipping the cleanups in unbind() if already done in epc_deinit(). Reviewed-by: Niklas Cassel Tested-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-designware-ep.c | 1 - drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + drivers/pci/controller/dwc/pcie-tegra194.c | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 19 +++++++++++++++++++ drivers/pci/endpoint/functions/pci-epf-test.c | 17 +++++++++++++++-- drivers/pci/endpoint/pci-epc-core.c | 25 +++++++++++++++++++++= ++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 8 files changed, 64 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/= controller/dwc/pcie-designware-ep.c index 47391d7d3a73..2063cf2049e5 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -632,7 +632,6 @@ void dw_pcie_ep_cleanup(struct dw_pcie_ep *ep) struct dw_pcie *pci =3D to_dw_pcie_from_ep(ep); =20 dw_pcie_edma_remove(pci); - ep->epc->init_complete =3D false; } EXPORT_SYMBOL_GPL(dw_pcie_ep_cleanup); =20 diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index dcac177b55fb..3ee715df36ea 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -501,6 +501,7 @@ static void qcom_pcie_perst_assert(struct dw_pcie *pci) { struct qcom_pcie_ep *pcie_ep =3D to_pcie_ep(pci); =20 + pci_epc_deinit_notify(pci->ep.epc); dw_pcie_ep_cleanup(&pci->ep); qcom_pcie_disable_resources(pcie_ep); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_DISABLED; diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/contr= oller/dwc/pcie-tegra194.c index 93f5433c5c55..4b28f8beedfe 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1715,6 +1715,7 @@ static void pex_ep_event_pex_rst_assert(struct tegra_= pcie_dw *pcie) if (ret) dev_err(pcie->dev, "Failed to go Detect state: %d\n", ret); =20 + pci_epc_deinit_notify(pcie->pci.ep.epc); dw_pcie_ep_cleanup(&pcie->pci.ep); =20 reset_control_assert(pcie->core_rst); diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/end= point/functions/pci-epf-mhi.c index 205c02953f25..5832989e55e8 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -764,6 +764,24 @@ static int pci_epf_mhi_epc_init(struct pci_epf *epf) return 0; } =20 +static void pci_epf_mhi_epc_deinit(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; + struct pci_epf_bar *epf_bar =3D &epf->bar[info->bar_num]; + struct mhi_ep_cntrl *mhi_cntrl =3D &epf_mhi->mhi_cntrl; + struct pci_epc *epc =3D epf->epc; + + if (mhi_cntrl->mhi_dev) { + mhi_ep_power_down(mhi_cntrl); + if (info->flags & MHI_EPF_USE_DMA) + pci_epf_mhi_dma_deinit(epf_mhi); + mhi_ep_unregister_controller(mhi_cntrl); + } + + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); +} + static int pci_epf_mhi_link_up(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); @@ -898,6 +916,7 @@ static void pci_epf_mhi_unbind(struct pci_epf *epf) =20 static const struct pci_epc_event_ops pci_epf_mhi_event_ops =3D { .epc_init =3D pci_epf_mhi_epc_init, + .epc_deinit =3D pci_epf_mhi_epc_deinit, .link_up =3D pci_epf_mhi_link_up, .link_down =3D pci_epf_mhi_link_down, .bus_master_enable =3D pci_epf_mhi_bus_master_enable, diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/en= dpoint/functions/pci-epf-test.c index ab714108dfdb..c8d0c51ae329 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -790,6 +790,15 @@ static int pci_epf_test_epc_init(struct pci_epf *epf) return 0; } =20 +static void pci_epf_test_epc_deinit(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); + + cancel_delayed_work(&epf_test->cmd_handler); + pci_epf_test_clean_dma_chan(epf_test); + pci_epf_test_clear_bar(epf); +} + static int pci_epf_test_link_up(struct pci_epf *epf) { struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); @@ -802,6 +811,7 @@ static int pci_epf_test_link_up(struct pci_epf *epf) =20 static const struct pci_epc_event_ops pci_epf_test_event_ops =3D { .epc_init =3D pci_epf_test_epc_init, + .epc_deinit =3D pci_epf_test_epc_deinit, .link_up =3D pci_epf_test_link_up, }; =20 @@ -907,10 +917,13 @@ static int pci_epf_test_bind(struct pci_epf *epf) static void pci_epf_test_unbind(struct pci_epf *epf) { struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); + struct pci_epc *epc =3D epf->epc; =20 cancel_delayed_work(&epf_test->cmd_handler); - pci_epf_test_clean_dma_chan(epf_test); - pci_epf_test_clear_bar(epf); + if (epc->init_complete) { + pci_epf_test_clean_dma_chan(epf_test); + pci_epf_test_clear_bar(epf); + } pci_epf_test_free_space(epf); } =20 diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci= -epc-core.c index 56b60330355d..47a91dcb07d7 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -774,6 +774,31 @@ void pci_epc_notify_pending_init(struct pci_epc *epc, = struct pci_epf *epf) } EXPORT_SYMBOL_GPL(pci_epc_notify_pending_init); =20 +/** + * pci_epc_deinit_notify() - Notify the EPF device about EPC deinitializat= ion + * @epc: the EPC device whose deinitialization is completed + * + * Invoke to notify the EPF device that the EPC deinitialization is comple= ted. + */ +void pci_epc_deinit_notify(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (IS_ERR_OR_NULL(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->epc_deinit) + epf->event_ops->epc_deinit(epf); + mutex_unlock(&epf->lock); + } + epc->init_complete =3D false; + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_deinit_notify); + /** * pci_epc_bus_master_enable_notify() - Notify the EPF device that the EPC * device has received the Bus Master diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 11115cd0fe5b..c39eed3ee73e 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -226,6 +226,7 @@ void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf); +void pci_epc_deinit_notify(struct pci_epc *epc); void pci_epc_bus_master_enable_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index dc759eb7157c..0639d4dc8986 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -71,12 +71,14 @@ struct pci_epf_ops { /** * struct pci_epc_event_ops - Callbacks for capturing the EPC events * @epc_init: Callback for the EPC initialization complete event + * @epc_deinit: Callback for the EPC deinitialization event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event * @bus_master_enable: Callback for the EPC Bus Master Enable event */ struct pci_epc_event_ops { int (*epc_init)(struct pci_epf *epf); + void (*epc_deinit)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); int (*bus_master_enable)(struct pci_epf *epf); --=20 2.25.1 From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FE0944C77 for ; Tue, 30 Apr 2024 06:14:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457672; cv=none; b=lHDm+jMrW+5SCA9Uc7DgMFzGPyVf1eHYQ3uxCh0U/VIet0sjCWdGueLr+9qcW2BGTI+lJrt/1rwnSpuDSxPha1Vh+RMIO0DtNG+TW363LnxfbNmPiGsFAvKFuVLacciXKAknRPC+flBoZcY3ga2rGt0zCbUHrRVCNYVziWvp7gY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457672; c=relaxed/simple; bh=7R9079YyrzcQ69t49UK0p4M3obgc9+1KjJ2q5XmORR0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KTsU/zCbnsntom5U3sbVVVEnjDJM3z5LhfH93Zfdv5lARvUP7dEJKmSIljkLUCHUzLdkrKU58hvST2477/4XTMfvOKSAy5rHootLUxyCR9SetY1dPf1BQ+xRX5Ulq+h1osDOIRp4gEeHdgG7c48AQW3dci7L/pnCqeBKaM6aoC8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=w5rN2BhB; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="w5rN2BhB" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-1eab16c8d83so42449565ad.3 for ; Mon, 29 Apr 2024 23:14:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457670; x=1715062470; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LZ26XKKRWgw/AVemd+R/+uLUsIOK7RYM2Uu3n62sU3k=; b=w5rN2BhB5Sj9OJMgqyZOs5ZGggub6hWwrAZJfY/pTi0BeL1P+d1vUCxy5hXypQ/2ci iWHp/Bw8Vlt+Z5COfyGTBykEtBZSIKWOXXx1oX/i0wT+OxwKUNond63PHN/MSbt1ck9D 6ZWqeoMXXSup+2RsQqgQ/yLAIrW+i3JWWbAiXNMBrA4ljdPQEwUXgTJGV3S3N2WS+BgX akMCrq1ZpEVVwtPlRAOVmY0RQZr3kXe1dRJeT4AyS5RcI0A1OLVPNzsKgCgysxlZqS/X nFFi0DLCuSyPgAmuURomD50GRlB1JbMP5dPOCGC4iO3mYnaVKQhVnzJk4oqcEuZJuC5x /icA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457670; x=1715062470; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LZ26XKKRWgw/AVemd+R/+uLUsIOK7RYM2Uu3n62sU3k=; b=f1iGtGQqxWccswdAQTDTA5y1jYKEfvVpBjcppGiluTk3ZMq36irNkHgUzPmDJboo2Z CxpvESdVCev0qDJKY6WwVuOYiehFZ6UixjY47KFLccxqICVWtW/ML8xgGlLxOyIK87Ib 7XHul5HQvFue2CUbf2C5926Q9zMmIDaSHwhW3gqLOPlUwdufTcZTmVYHjlKwS4b7mQob oYKiGmkbuyJrpQnBZM+jHJ1Pk9FhtUNFfKTOr364plT8x9wxUZWp47GGSiQOlmaeENYU wRhrDoJpqMBR9y4c0NwUv6askhmWzEse+DVf2LXlqzR2rxyfHyZNF2MDjL5M9sJ3Z3Nf oLFw== X-Forwarded-Encrypted: i=1; AJvYcCWJCciqzIz2k0pDSMj6a6OJOz8jaAda+N8Lflsx2tTBgJn7wHDe8HYkScplK9ZKMWlk2ajNz1NU/iCN22gTousDd2hRM+5Qd0w2duJG X-Gm-Message-State: AOJu0Ywxfgfwc3WqCVQbyyVvTVG/z/JG3pVFx6G088NvpL/aOY2HAIGm jV1v/iJ2NW+slwKjVYK5SRJwr3B5xNvkGI6ONmgn/EPKH0if2chWfwRNGuIg8g== X-Google-Smtp-Source: AGHT+IHjE/mS8VgmW6UsqL5gfthISwVbTWKJJ1FRlPfgCfBQ+YN5anRHtX5+36Wf1DG4Fp2tubV7rg== X-Received: by 2002:a17:903:445:b0:1eb:c70:9575 with SMTP id iw5-20020a170903044500b001eb0c709575mr11373537plb.42.1714457669873; Mon, 29 Apr 2024 23:14:29 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.14.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:14:29 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:49 +0530 Subject: [PATCH v4 08/10] PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle Link Down event Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-8-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=6927; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=7R9079YyrzcQ69t49UK0p4M3obgc9+1KjJ2q5XmORR0=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIwc4MmreY5CrAHx9LWKOnEbvcFzTNNRSS4a0 +7cKoNap22JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMHAAKCRBVnxHm/pHO 9U1xCACnFnRB3BbcNyc6M1MdDwq7nH7LCm3Q8Y4cHptrVEcZOGK+VMx/F/MeLXRapKGYjee1dHb Rq2PsrnQL+K6Wi/HK97HkNxFaA61x3UNyGstVjlRzY50a0fEBZ/ppCNf2+kX1SKQw+KoHpkkKCd cP4iRAUatY/OxqVXFpMtGXRq7R2kIhqazIl4dGkahKR22R05Z6sD6PxGj4p/3jvcrx8BBDG93x9 34yRBgx7L1UyENSrhHqDQ8gi3EQ07ZqMYLh0Kv2nT3oDY2G46cGXisRtGEagg5hK9kOzIVael8t 0I413vcECjzRfxbDefgA7FyxEIprDLo7N9XGTs2m1s5O7x7B X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 As per the PCIe base spec r5.0, section 5.2, Link Down event can happen under any of the following circumstances: 1. Fundamental/Hot reset 2. Link disable transmission by upstream component 3. Moving from L2/L3 to L0 In those cases, Link Down causes some non-sticky DWC registers to loose the state (like REBAR, etc...). So the drivers need to reinitialize them to function properly once the link comes back again. This is not a problem for drivers supporting PERST# IRQ, since they can reinitialize the registers in the PERST# IRQ callback. But for the drivers not supporting PERST#, there is no way they can reinitialize the registers other than relying on Link Down IRQ received when the link goes down. So let's add a DWC generic API dw_pcie_ep_linkdown() that reinitializes the non-sticky registers and also notifies the EPF drivers about link going down. This API can also be used by the drivers supporting PERST# to handle the scenario (2) mentioned above. NOTE: For the sake of code organization, move the dw_pcie_ep_linkup() definition just above dw_pcie_ep_linkdown(). Reviewed-by: Niklas Cassel Tested-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-designware-ep.c | 103 ++++++++++++++++----= ---- drivers/pci/controller/dwc/pcie-designware.h | 5 ++ 2 files changed, 73 insertions(+), 35 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/= controller/dwc/pcie-designware-ep.c index 2063cf2049e5..b878b62460f3 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -15,18 +15,6 @@ #include #include =20 -/** - * dw_pcie_ep_linkup - Notify EPF drivers about Link Up event - * @ep: DWC EP device - */ -void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) -{ - struct pci_epc *epc =3D ep->epc; - - pci_epc_linkup(epc); -} -EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup); - /** * dw_pcie_ep_init_notify - Notify EPF drivers about EPC initialization co= mplete * @ep: DWC EP device @@ -673,6 +661,34 @@ static unsigned int dw_pcie_ep_find_ext_capability(str= uct dw_pcie *pci, int cap) return 0; } =20 +static void dw_pcie_ep_init_non_sticky_registers(struct dw_pcie *pci) +{ + unsigned int offset; + unsigned int nbars; + u32 reg, i; + + offset =3D dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR); + + dw_pcie_dbi_ro_wr_en(pci); + + if (offset) { + reg =3D dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL); + nbars =3D (reg & PCI_REBAR_CTRL_NBAR_MASK) >> + PCI_REBAR_CTRL_NBAR_SHIFT; + + /* + * PCIe r6.0, sec 7.8.6.2 require us to support at least one + * size in the range from 1 MB to 512 GB. Advertise support + * for 1 MB BAR size only. + */ + for (i =3D 0; i < nbars; i++, offset +=3D PCI_REBAR_CTRL) + dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0); + } + + dw_pcie_setup(pci); + dw_pcie_dbi_ro_wr_dis(pci); +} + /** * dw_pcie_ep_init_registers - Initialize DWC EP specific registers * @ep: DWC EP device @@ -687,13 +703,11 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) struct dw_pcie_ep_func *ep_func; struct device *dev =3D pci->dev; struct pci_epc *epc =3D ep->epc; - unsigned int offset, ptm_cap_base; - unsigned int nbars; + u32 ptm_cap_base, reg; u8 hdr_type; u8 func_no; - int i, ret; void *addr; - u32 reg; + int ret; =20 hdr_type =3D dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE) & PCI_HEADER_TYPE_MASK; @@ -756,25 +770,8 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) if (ep->ops->init) ep->ops->init(ep); =20 - offset =3D dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR); ptm_cap_base =3D dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_PTM); =20 - dw_pcie_dbi_ro_wr_en(pci); - - if (offset) { - reg =3D dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL); - nbars =3D (reg & PCI_REBAR_CTRL_NBAR_MASK) >> - PCI_REBAR_CTRL_NBAR_SHIFT; - - /* - * PCIe r6.0, sec 7.8.6.2 require us to support at least one - * size in the range from 1 MB to 512 GB. Advertise support - * for 1 MB BAR size only. - */ - for (i =3D 0; i < nbars; i++, offset +=3D PCI_REBAR_CTRL) - dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, BIT(4)); - } - /* * PTM responder capability can be disabled only after disabling * PTM root capability. @@ -791,8 +788,7 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) dw_pcie_dbi_ro_wr_dis(pci); } =20 - dw_pcie_setup(pci); - dw_pcie_dbi_ro_wr_dis(pci); + dw_pcie_ep_init_non_sticky_registers(pci); =20 return 0; =20 @@ -803,6 +799,43 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) } EXPORT_SYMBOL_GPL(dw_pcie_ep_init_registers); =20 +/** + * dw_pcie_ep_linkup - Notify EPF drivers about Link Up event + * @ep: DWC EP device + */ +void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) +{ + struct pci_epc *epc =3D ep->epc; + + pci_epc_linkup(epc); +} +EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup); + +/** + * dw_pcie_ep_linkdown - Notify EPF drivers about Link Down event + * @ep: DWC EP device + * + * Non-sticky registers are also initialized before sending the notificati= on to + * the EPF drivers. This is needed since the registers need to be initiali= zed + * before the link comes back again. + */ +void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep) +{ + struct dw_pcie *pci =3D to_dw_pcie_from_ep(ep); + struct pci_epc *epc =3D ep->epc; + + /* + * Initialize the non-sticky DWC registers as they would've reset post + * Link Down. This is specifically needed for drivers not supporting + * PERST# as they have no way to reinitialize the registers before the + * link comes back again. + */ + dw_pcie_ep_init_non_sticky_registers(pci); + + pci_epc_linkdown(epc); +} +EXPORT_SYMBOL_GPL(dw_pcie_ep_linkdown); + /** * dw_pcie_ep_init - Initialize the endpoint device * @ep: DWC EP device diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/con= troller/dwc/pcie-designware.h index f8e5431a207b..152969545b0a 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -668,6 +668,7 @@ static inline void __iomem *dw_pcie_own_conf_map_bus(st= ruct pci_bus *bus, =20 #ifdef CONFIG_PCIE_DW_EP void dw_pcie_ep_linkup(struct dw_pcie_ep *ep); +void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep); int dw_pcie_ep_init(struct dw_pcie_ep *ep); int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep); void dw_pcie_ep_init_notify(struct dw_pcie_ep *ep); @@ -688,6 +689,10 @@ static inline void dw_pcie_ep_linkup(struct dw_pcie_ep= *ep) { } =20 +static inline void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep) +{ +} + static inline int dw_pcie_ep_init(struct dw_pcie_ep *ep) { return 0; --=20 2.25.1 From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B35D953E0E for ; Tue, 30 Apr 2024 06:14:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457676; cv=none; b=gaxpdM4RZe/atujzhIkXXCIbtd5cUbqbmRpFn/imMvz4CUNDnOQdIhX01vS4na3sc+zYAmhX7YhS947VWmK0hwEvnIjvpSVpabE5Qx/HwEMPZ8H6zbGjIEBMAqCPbE6+g9pV9EGDTJOqm98iagY0+2eg/vP8fmz6DmGC2kNCWHM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457676; c=relaxed/simple; bh=k6wJF3EN6aRmkmMhxj7MuPWYMx698jnme1fa7UNZ/38=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=chDdJWu8vFLjnHYgzfm0E+h/yWS4uegfrk83LhBlcrLlC6/N9fdtbowdrslijFucwjy1YfB61waOWB03nJnkecvelL06oV451DDhPMk5k2EojmaYRxrSuHO+jlCd/LQaZyXgSzpACzHq3JhWgWkjNL+pIrCjEwH6Y+KVgzdTnW4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=MLrE2vyJ; arc=none smtp.client-ip=209.85.214.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="MLrE2vyJ" Received: by mail-pl1-f178.google.com with SMTP id d9443c01a7336-1e5c7d087e1so45712685ad.0 for ; Mon, 29 Apr 2024 23:14:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457674; x=1715062474; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=J5hSvb4uyPJ54kPzH7K5/6HoCGv5wEu2F/LB4hbEFp8=; b=MLrE2vyJDfRRYFesre3IbxoM0M6ZfSCzoUuhTUB9pKg/JbzW4fXLyTSquMuuJnLuSS GfPGl/XK8wRf5cJ1BQM76xI90nJ50z3jn4e1sxl/V5x3DBWzUyFHZ+x+NfL+3+G0PzoI /+RqdEpBMWZzl/yXIOdkMi8LwbX37ii8AVVWz25eKBYTd1yLi4SVOmORjmAhq//1Svln crchGUnLNoOKXDhnFWoDzpMfMoS4H7hFblpRpEsoKyQXG98Vq35GB0NQ0hd2qNtTVeip jLE0PwFEFLYyzFsN5ClXrT6curAz6Or7YVJ2+F2C0X6sy8vhbyweJ1qkiBbCz77MAPlm s4Yw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457674; x=1715062474; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J5hSvb4uyPJ54kPzH7K5/6HoCGv5wEu2F/LB4hbEFp8=; b=WcTUlqVGRuD/RwYMtqAJESn26yzDni4orcZnRiKsXVV+XU8qStY7GztaM0RzPeZxju AqIWcQkZsdqWwEosgoZcrLbUFvBqervuwnB8rXezUwDg0L6uPPPOTXfAS/3YJdOvtNNp EhJUBGJJpXv+q+RQDZT6NKetD0Nhu4JruDhzeJsiyIqYV7SPaqajK6el5h6sFQC3MNc+ Bqcx54BuivmMt5YhKXfPoAX34G9qierVDmLRzxaD3qcfjgovbJTYvkks1vqvUmmqT1yv S1ysfyf8+as8NwWnVvyoHL/PIV3qI15zcNEX9x+znVziAsN9oa2dU1v8YXEqg95ItbZN kP1A== X-Forwarded-Encrypted: i=1; AJvYcCXXEGU+13etFV/vE+1ru0SbZEKrUEkdhe5skQguyjY/STl99blIuAMnLDitPZT8pxSs4JA6wKnFTYq7k38jE6hC1G1cyusSBh22ofrN X-Gm-Message-State: AOJu0YwQrbY3BIEWLBTRWALBfq2QXhEtrWswZ6YsTl6uz2+l6uPkIw3w U/KPLvn4DXmK4Vpg5Jegc6KeODKtnFQZezmsDbuVKhtbQlvIWrdtnb9yE/8xrAEtyR70dSYVHFo = X-Google-Smtp-Source: AGHT+IGX8lbqUAItQ0yMmEiPFz/NJHhGg51DuVNt95DDcQS8ZGGfIFPc6uVZ0u3523qwhTRTM0DXlg== X-Received: by 2002:a17:902:e808:b0:1e5:86ba:88b5 with SMTP id u8-20020a170902e80800b001e586ba88b5mr15538076plg.7.1714457674018; Mon, 29 Apr 2024 23:14:34 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.14.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:14:33 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:50 +0530 Subject: [PATCH v4 09/10] PCI: qcom-ep: Use the generic dw_pcie_ep_linkdown() API to handle Link Down event Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-9-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1181; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=k6wJF3EN6aRmkmMhxj7MuPWYMx698jnme1fa7UNZ/38=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIwcrYzciZg9ws1bBqYoxIutXEpuRniXqU0RC Z7E4BagdfqJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMHAAKCRBVnxHm/pHO 9ZYUB/95SvHPv2j7LsEiAwDAMAlNSKfTzd90sEzInXtrvlRTVsUI5zSswK/S7crXSbscV/TlPEm BWhHSdxSvQwPwmjiZ3Q+Qgu79cJG5JPjjb950Xkm0bXreZL6SKa1ACLc39OjrB+XsmjxlwbHWl+ RE/igJ2z6DSW2QRUyh50nANFwqBqg68+T5ARZ2McCRXsxcCShb3RgMXKgW52kOIBKuWTlVZ8lHV f3yuwMgkrH5s1etLMbGA+j3RAn/fNo526Pk8phIxs5nQh17q9KkfcP5YHeJGzM5ZvUxljWzxnHZ GPI0pgwZoOi3dMuZxzPZjeTXCsuO982uE8XY4Rc2TPAilmtr X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Now that the API is available, let's make use of it. It also handles the reinitialization of DWC non-sticky registers in addition to sending the notification to EPF drivers. Reviewed-by: Niklas Cassel Tested-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 3ee715df36ea..6106b005e66b 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -635,7 +635,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int i= rq, void *data) if (FIELD_GET(PARF_INT_ALL_LINK_DOWN, status)) { dev_dbg(dev, "Received Linkdown event\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_DOWN; - pci_epc_linkdown(pci->ep.epc); + dw_pcie_ep_linkdown(&pci->ep); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received Bus Master Enable event\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_ENABLED; --=20 2.25.1 From nobody Thu Dec 18 17:44:34 2025 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0996E85945 for ; Tue, 30 Apr 2024 06:14:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457680; cv=none; b=kYOMdXEGeA/EpOjjfql/2dif5w3ycJyOpiukyoTXdvklnJ2Tvu/poyT8jiatuC95sEC4iSixqwRfOxrMy6JZR37HgYJMdGm2qXWXei4fjvB862YfMxaG/zI/BFwwfA1yl9EJ4oc4emoW/cLc6hEsd6CWUAiS21BbkFnpcMWhEhw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714457680; c=relaxed/simple; bh=gwJkiWxyW/wamW6kH7+GRx7VSH7hXsYT3WZXX3driJ8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Z+27HInfHPAVseQ/wMxmSkDxVDA2i7qdrJMK3BqwhGnKGgOxGla0OF0MXOG+tHn8CfeT2rk71OuK5WNJBOHhpfKfh9lQTt6AKNhJsweT9CCpWkN24Ys6M9gnK2iCI0Q7mT9VsrFZtuChssRkuEyqCbb0IFgaAjowlTVKUnKrOOE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=WWfF+HS8; arc=none smtp.client-ip=209.85.214.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WWfF+HS8" Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-1e834159f40so42655595ad.2 for ; Mon, 29 Apr 2024 23:14:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714457678; x=1715062478; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=zfACtQQSDUwMHO1/0RK0ntsz+YmSOQ8ynC0u7vL0q8w=; b=WWfF+HS8623sWjdYlAr6UUNKZJVc2+6d8C/ash6g0yNTqoeN0Rl9EB95SE6MfDfRY0 jC7ZkrpedNAic7BZ0yP9AI28zwK8J5RxVG/w7g88RFmdd+lvRz/pD98VNWYouq8k69BZ YUENRNNN+1F7mJKOzQiK5FiTjVqFgUt0FRl0EnBIJZpfpDMyTfc13HXsDZ06/4XCoZ80 P3TJYeNVqeO/aTq8Teu0n2lkeZWwwayu20gtgqPKRK6fP6u9lgMBobWC6AqK/TloVpwP qXgnbiCKNQuvR4xUt6afnHTheuMcP1/n/86vCdhqmrOrycZtUMRIa0cZXbzs6UoGvsb2 YMOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714457678; x=1715062478; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zfACtQQSDUwMHO1/0RK0ntsz+YmSOQ8ynC0u7vL0q8w=; b=m55Akui6RUVwJ03x1WNOm1d52rMFwR8j/oF/teqjlEDbe5+4B4EKzT8oGeDxCJ+Eo5 he+t8tVHnFy9ClBrIcKPl6Ve4XSxIGvBaxDjL617Imz4w1IYqByOYqqbsywysjGXRQVm 2odvwtA48hVPV+5HYAzLOGgfJB2uhAfLIiEcLuOiUW44bU+Hb1aXwmpxsoLj9ylLzrZT W3UkkI3TGyYgQvvLbjroo+WlmH5gOaRqp/TEtZFV5nUClropgPQELj8N5ct8AGvc1/Uf wO81grW/Y7xmbJUMXux/yKnouVdWvwLTBplFgl9HLg+EHyEX28GyW66Ty5sR2fHj/FdI F5qA== X-Forwarded-Encrypted: i=1; AJvYcCVpMgKx/ILKL3i8fi/HpMnF6HlE4MfhtKLi+mrhruz8JlwiFKm2atWKIUAguKZMDOyALu1InniHBoYmAyBVpqVM8xtwTpGZI4VvITCE X-Gm-Message-State: AOJu0Yy7a9tP0NH+fL0Hy7XVOkCWWi1EEulPEJY4AxBI+rGdojAlow4o PnHf9R/PVU/Qg+1UEPwpzSaG9RHFZ9+vwXJWHGmW16dICFZi3iHmgAI45T/zGSHmk1xjXoU9+Fk = X-Google-Smtp-Source: AGHT+IGWSiYL4QGZLQ9kxcs8EksybyJBj3Q5TS+tl4f5cOjnz0JQqoAPxUgOn1Wokxhf05hTLpZtWw== X-Received: by 2002:a17:902:7087:b0:1e6:68d0:d6c1 with SMTP id z7-20020a170902708700b001e668d0d6c1mr12539439plk.40.1714457678284; Mon, 29 Apr 2024 23:14:38 -0700 (PDT) Received: from [127.0.1.1] ([220.158.156.15]) by smtp.gmail.com with ESMTPSA id bi2-20020a170902bf0200b001e27ad5199csm21393298plb.281.2024.04.29.23.14.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 23:14:37 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 30 Apr 2024 11:43:51 +0530 Subject: [PATCH v4 10/10] PCI: endpoint: pci-epf-test: Handle Link Down event Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240430-pci-epf-rework-v4-10-22832d0d456f@linaro.org> References: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> In-Reply-To: <20240430-pci-epf-rework-v4-0-22832d0d456f@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Jingoo Han , Thierry Reding , Jonathan Hunter Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1926; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=gwJkiWxyW/wamW6kH7+GRx7VSH7hXsYT3WZXX3driJ8=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmMIwd973TI9incgBAwvQzAk1axQR3EQfp2S+v7 0yLEScJY42JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZjCMHQAKCRBVnxHm/pHO 9W9wB/9fKbNDwL0ouS8vXUIF1ITwHRCULxFhwVZnrKt6wJZZ10YPd6A9VuBZdad+tngXVjkuP8w y2VLFDcc4KgVEadpMF08dctlEfIju4UbBdEFJSEWUynyOkW//VQHFnjFFqRDUzgxJGS0/HVtCOx DIKJ2WR27vm+b9WdcJqbVuQvS2DJ0p3qbJatfzAVrFxcVxLDH+9DGD9CeExys4NrUyu9TKYZdB0 ZiL8A0W9pOjEvFALzu9UAY1mhQpoZxwMX4Ldz8ABwFNHKktBYLKK4nD+YcsB2OrFE3EzmJo2Ol/ GH7xP7PBMproKqyLDV/eCbdhGxKOw/9TTP1FAzdVXKFtqbz1 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 As per the PCIe base spec r5.0, section 5.2, Link Down event can happen under any of the following circumstances: 1. Fundamental/Hot reset 2. Link disable transmission by upstream component 3. Moving from L2/L3 to L0 When the event happens, the EPC driver capable of detecting it may pass the notification to the EPF driver through link_down() callback in 'struct pci_epc_event_ops'. While the PCIe spec has not defined the actual behavior of the endpoint when the Link Down event happens, we may assume that at least the ongoing transactions need to be stopped as the link won't be active. So let's cancel the command handler work in the callback implementation pci_epf_test_link_down(). The work will be started again in pci_epf_test_link_up() once the link comes back again. Reviewed-by: Niklas Cassel Tested-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-test.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/en= dpoint/functions/pci-epf-test.c index c8d0c51ae329..afb28df174c3 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -809,10 +809,20 @@ static int pci_epf_test_link_up(struct pci_epf *epf) return 0; } =20 +static int pci_epf_test_link_down(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test =3D epf_get_drvdata(epf); + + cancel_delayed_work_sync(&epf_test->cmd_handler); + + return 0; +} + static const struct pci_epc_event_ops pci_epf_test_event_ops =3D { .epc_init =3D pci_epf_test_epc_init, .epc_deinit =3D pci_epf_test_epc_deinit, .link_up =3D pci_epf_test_link_up, + .link_down =3D pci_epf_test_link_down, }; =20 static int pci_epf_test_alloc_space(struct pci_epf *epf) --=20 2.25.1