From nobody Fri Dec 19 01:14:08 2025 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C55872C85F; Mon, 29 Apr 2024 10:19:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714385955; cv=none; b=Tf+sr3raex/+fgiso8pnqAdq4cs0QWRaO5Wdv/9yiQ5XXZzBtFuN6mPAJlxUKc+thxgl9OM2nrSjyOVO9byTdLRmxxQ+enCrH3+0H+M4P1p9S0n3v0U4oTCc3kDWDIdjZxvBFcspX2/DsD6D9c/PA2TvgYM7XOuJfbkol89U+cA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714385955; c=relaxed/simple; bh=ev59AdWAbZ/RQemLanIauu8AZNYsghNpk9ou1NHvgiU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UqmkQpQ0qDOvK6QmfGO9xNKDoO+e9P4ex9UC3rYp/5wlpSEGtWVRgfc4zPg3ln7/RWDDT7lPFmzkbuU3I3Q99J4Gebro3OGRtfeIZhrcSM3D/yE4zQlSBQnnwDQDD/UjRS7Am6CIkxY8TJeL9OF92kMDBSl7FSLSa85uLCXktC0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=k2rcLcOP; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="k2rcLcOP" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43TAHhSg021072; Mon, 29 Apr 2024 05:17:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1714385863; bh=5qXLHhWtt8flgYzu6zKpGgw0uVBc+TpXixF5TewC2Vg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=k2rcLcOPieASl5t0pnffrFMWVVDMxy59epLhqAzuN8jA7zQEuNfOQZgI86h3rH1SW aDcz0BZAmp5u2/Ahk1NHJgWe5KnQRWGv7FJziw1sHuDQAIKj5HVU3D32E4H+WUbP23 lhEPZH8y4ZVzzSASO7+LJNphezvbNE72tr79rE7c= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43TAHhP9017110 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 29 Apr 2024 05:17:43 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 29 Apr 2024 05:17:43 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 29 Apr 2024 05:17:43 -0500 Received: from localhost (chintan-thinkstation-p360-tower.dhcp.ti.com [172.24.227.220]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43TAHgjF103061; Mon, 29 Apr 2024 05:17:43 -0500 From: Chintan Vankar To: Conor Dooley , Krzysztof Kozlowski , Rob Herring , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , , , , CC: , , , Chintan Vankar Subject: [PATCH v3 1/2] arm64: dts: ti: k3-am62a7-sk: Add alias for CPSW3G MAC port 1 Date: Mon, 29 Apr 2024 15:47:38 +0530 Message-ID: <20240429101739.2770090-2-c-vankar@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240429101739.2770090-1-c-vankar@ti.com> References: <20240429101739.2770090-1-c-vankar@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" From: Siddharth Vadapalli Add alias for CPSW3G MAC port 1 to enable kernel to fetch MAC Address directly from U-Boot. Reviewed-by: Ravi Gunasekaran Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- Link to v2: https://lore.kernel.org/r/20240425102038.1995252-2-c-vankar@ti.com/ Changes from v2 to v3: - Collected Reviewed by tag from Ravi. arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62a7-sk.dts index fa43cd0b631e..5aced7e56192 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -22,6 +22,7 @@ aliases { serial3 =3D &main_uart1; mmc0 =3D &sdhci0; mmc1 =3D &sdhci1; + ethernet0 =3D &cpsw_port1; }; =20 chosen { --=20 2.34.1 From nobody Fri Dec 19 01:14:08 2025 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 227BB2C85F; Mon, 29 Apr 2024 10:17:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714385874; cv=none; b=i5k0YoGcjKwpFa+htUjrilCsAsBIPxo8Zer/Piqf98NKcxHwTmCaKs0P4EroHtFS7rmXZ17vRiTleCEADBxow6RQ5V1SarXmIZxaOBEOQTSeIb4tNcDTRSX+qPfGGEJGWCqlIzf9li2gqILDEVi/n3lRU00X7DW5GMLdAe9DEGA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714385874; c=relaxed/simple; bh=80PY6jL4DQo7PY+vtJwC9gF0O1nUV5FFyvCVjuO3buE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=TO778epHQHvIydrnZuh0RH/+i7cWccZ4MxOaW02NrK0IoyHymLUV5Jb8FbjuO4sA3rCeamIxb9ngfuBEL9uMYUUPztc6uDXUEf2pMaWwK55QseH+xztCAoJtJv135OaNhRympuOIzGz8wIDtPYocqImDaZ2L2WBaevI71iGXxBY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=V3fUA3PH; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="V3fUA3PH" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43TAHjjR126980; Mon, 29 Apr 2024 05:17:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1714385865; bh=Px2f67gMOFMB3tes57EilRrghU4XcLaNrfLnMFzKEEo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=V3fUA3PHLY6+6yHYnxNAvQ0FjzqCGnWp3okDYkMU9nEHaMiTvVnVpYGlUOn6Hrzu5 7G3mlyslNxFXbJ5UBtMrCJR/H6u7+9oboTb7vy7GWUm6mHMEQqURaiqwzgVzv+o+1m agcL6dW2Hkldv6Ffqa/R2YmEEswdKN9Yr3kAJk5I= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43TAHjuW017124 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 29 Apr 2024 05:17:45 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 29 Apr 2024 05:17:44 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 29 Apr 2024 05:17:45 -0500 Received: from localhost (chintan-thinkstation-p360-tower.dhcp.ti.com [172.24.227.220]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43TAHis5103097; Mon, 29 Apr 2024 05:17:44 -0500 From: Chintan Vankar To: Conor Dooley , Krzysztof Kozlowski , Rob Herring , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , , , , CC: , , , Chintan Vankar Subject: [PATCH v3 2/2] arm64: dts: ti: k3-am62a7: Add overlay for second CPSW3G Port Date: Mon, 29 Apr 2024 15:47:39 +0530 Message-ID: <20240429101739.2770090-3-c-vankar@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240429101739.2770090-1-c-vankar@ti.com> References: <20240429101739.2770090-1-c-vankar@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" From: Siddharth Vadapalli The SK-Ethernet-DC01 Add-On Ethernet Card for AM62A7-SK board supports RGMII mode. Add overlay to enable the second CPSW3G port in RGMII-RXID mode with the Add-On Ethernet Card. Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar Reviewed-by: Ravi Gunasekaran --- Link to v2: https://lore.kernel.org/r/20240425102038.1995252-3-c-vankar@ti.com/ Changes from v2 to v3: - Updated SPDX-License-Identifier and "pinctrl-0" property in "cpsw3g" node in "k3-am62a7-sk-ethernet-dc01.dtso" as suggested by Ravi. arch/arm64/boot/dts/ti/Makefile | 3 + .../dts/ti/k3-am62a7-sk-ethernet-dc01.dtso | 62 +++++++++++++++++++ 2 files changed, 65 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am62a7-sk-ethernet-dc01.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makef= ile index 48fb19a523bd..b4bc5712b1a4 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-am62-lp-sk.dtb =20 # Boards with AM62Ax SoC dtb-$(CONFIG_ARCH_K3) +=3D k3-am62a7-sk.dtb +dtb-$(CONFIG_ARCH_K3) +=3D k3-am62a7-sk-ethernet-dc01.dtbo =20 # Boards with AM62Px SoC dtb-$(CONFIG_ARCH_K3) +=3D k3-am62p5-sk.dtb @@ -125,6 +126,8 @@ k3-am62a7-sk-csi2-ov5640-dtbs :=3D k3-am62a7-sk.dtb \ k3-am62x-sk-csi2-ov5640.dtbo k3-am62a7-sk-csi2-tevi-ov5640-dtbs :=3D k3-am62a7-sk.dtb \ k3-am62x-sk-csi2-tevi-ov5640.dtbo +k3-am62a7-sk-ethernet-dc01-dtbs :=3D k3-am62a7-sk.dtb \ + k3-am62a7-sk-ethernet-dc01.dtbo k3-am62a7-sk-hdmi-audio-dtbs :=3D k3-am62a7-sk.dtb k3-am62x-sk-hdmi-audio.= dtbo k3-am62p5-sk-csi2-imx219-dtbs :=3D k3-am62p5-sk.dtb \ k3-am62x-sk-csi2-imx219.dtbo diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk-ethernet-dc01.dtso b/arch/= arm64/boot/dts/ti/k3-am62a7-sk-ethernet-dc01.dtso new file mode 100644 index 000000000000..ed73d9a80379 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk-ethernet-dc01.dtso @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * DT Overlay for second CPSW3G port in RGMII mode using SK-ETHERNET-DC01 + * Add-On Daughtercard with AM62A7-SK. + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include "k3-pinctrl.h" + +&{/} { + aliases { + ethernet1 =3D "/bus@f0000/ethernet@8000000/ethernet-ports/port@2"; + }; +}; + +&cpsw3g { + pinctrl-0 =3D <&main_rgmii1_pins_default>, + <&main_rgmii2_pins_default>; +}; + +&cpsw_port2 { + status =3D "okay"; + phy-mode =3D "rgmii-rxid"; + phy-handle =3D <&cpsw3g_phy1>; +}; + +&cpsw3g_mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpsw3g_phy1: ethernet-phy@1 { + reg =3D <1>; + ti,rx-internal-delay =3D ; + ti,fifo-depth =3D ; + ti,min-output-impedance; + }; +}; + +&main_pmx0 { + main_rgmii2_pins_default: main-rgmii2-default-pins { + pinctrl-single,pins =3D < + AM62AX_IOPAD(0x0184, PIN_INPUT, 0) /* (AA21) RGMII2_RD0 */ + AM62AX_IOPAD(0x0188, PIN_INPUT, 0) /* (Y20) RGMII2_RD1 */ + AM62AX_IOPAD(0x018c, PIN_INPUT, 0) /* (AB21) RGMII2_RD2 */ + AM62AX_IOPAD(0x0190, PIN_INPUT, 0) /* (AB20) RGMII2_RD3 */ + AM62AX_IOPAD(0x0180, PIN_INPUT, 0) /* (AA20) RGMII2_RXC */ + AM62AX_IOPAD(0x017c, PIN_INPUT, 0) /* (W18) RGMII2_RX_CTL */ + AM62AX_IOPAD(0x016c, PIN_INPUT, 0) /* (AA19) RGMII2_TD0 */ + AM62AX_IOPAD(0x0170, PIN_INPUT, 0) /* (Y18) RGMII2_TD1 */ + AM62AX_IOPAD(0x0174, PIN_INPUT, 0) /* (AA18) RGMII2_TD2 */ + AM62AX_IOPAD(0x0178, PIN_INPUT, 0) /* (W17) RGMII2_TD3 */ + AM62AX_IOPAD(0x0168, PIN_INPUT, 0) /* (AB19) RGMII2_TXC */ + AM62AX_IOPAD(0x0164, PIN_INPUT, 0) /* (Y19) RGMII2_TX_CTL */ + >; + }; +}; --=20 2.34.1