From nobody Tue Dec 16 10:00:03 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DD762CA4; Mon, 29 Apr 2024 00:26:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350410; cv=none; b=NIsTBWqoKv49lD11awDSbBBMgOV4P3mcn4nEoF2Sg0WXcKPNamjdWHbma+bWqRtIUTivDFznXYnKElJFGegLD2smuavWqjZBexsQFafLFcPk2lbO8tjohsjfG8Oztz0Zpgama0u/6QoooQvOotTBFZfSVFvpuOdT0uXmBeI0epY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350410; c=relaxed/simple; bh=X3AMkYS2CfMdu/dFK6C/Hj93fNJfuxImVPaXP7FNbJI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tJ4HDue8JM8IQQxhGJoX3pdxoYlEoMHfU+YHzZfjjSDoVEIiZh5Hr5FxBxdo0hPjqNV2kZ2B6jA+K9VNHG5CHSiy4TV/aq7L1L6QmU0Pfq77waYwQ5yGmiZSfLRpQen4xNe0UOtw+WK23CFSZxP3oBegtf5pjUVbXi2DZyItnjk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UcmgcnRl; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UcmgcnRl" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D7B3CC4AF1A; Mon, 29 Apr 2024 00:26:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714350410; bh=X3AMkYS2CfMdu/dFK6C/Hj93fNJfuxImVPaXP7FNbJI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UcmgcnRlk5rIHJlGJVFhYITXl6GACJ58+t8FxAQ/zuyIssQzkRWrISvkCTP/hpWkY BdaZfPeQ+YN2ao0L9Ai5H7V72IjxyPo33TxwAJeRsIV5JOi12DzbXvxSKvuxWGRu52 z/I7aMzYIV2neP5wMq6NOYepXeOw9WPJfg603yTrVm/J5PEK+8qpujMdOk9nw/pNd2 MQvlJBIFHE/ap728D6zrRe6fiBL8F6UdCJLsFeX9D2gk+VdCvygaHWToDQeCsYRgtn fRqP+O2y+mVdiHbWaRSbpDLV+0Oop3p+jpPqU/nRI37+PuzOW1aSPFWK5cNNRbRxC/ mP1FBxi0GML3A== From: Jisheng Zhang To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Emil Renner Berthing Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Emil Renner Berthing Subject: [PATCH v4 1/8] riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi Date: Mon, 29 Apr 2024 08:13:10 +0800 Message-ID: <20240429001317.432-2-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240429001317.432-1-jszhang@kernel.org> References: <20240429001317.432-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the 'cpus' label so that we can reference it in board dts files. Signed-off-by: Jisheng Zhang Reviewed-by: Emil Renner Berthing --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 2 +- arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts= /starfive/jh7100.dtsi index 9a2e9583af88..7de0732b8eab 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -13,7 +13,7 @@ / { #address-cells =3D <2>; #size-cells =3D <2>; =20 - cpus { + cpus: cpus { #address-cells =3D <1>; #size-cells =3D <0>; =20 diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts= /starfive/jh7110.dtsi index 4a5708f7fcf7..18047195c600 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -15,7 +15,7 @@ / { #address-cells =3D <2>; #size-cells =3D <2>; =20 - cpus { + cpus: cpus { #address-cells =3D <1>; #size-cells =3D <0>; =20 --=20 2.43.0 From nobody Tue Dec 16 10:00:03 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 445B18BE7; Mon, 29 Apr 2024 00:26:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350413; cv=none; b=J7uDxlNQqpGRSVxxogRiUz4v8d1fcFFMESdQ+qo3JdqUHi5HjyEXecRfzncdO6W/EtniAd6Lw9nUdOPhcgO/A/M96OPHSxnYrb3b3slZH5RmVDLQfH0xJg0M0hCI5nmqICSlFpQr7U5I8gdBxuwIVop5tVIo1dGFYjIvj84mzAs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350413; c=relaxed/simple; bh=JV9sARz8mXFB1oPD9Q4pwlzsDwDsirXQg0InRkhTXdg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Vst3xBsMD1ou8UV0mzDFs8yLFklCTe6Q3pKxt7PEBGIJvV6R02PFrD5GQl9oWWmXpD2TENWrO1XCHhvlh/Q3ZxXadvzJeX0RchJvOByJWWKeOk7VdDIKEc0AaOHTswerHCqVFtEnKklgE4Bug9SWP5nmYTcZIEBGLqUdwwW/fsE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZcABOnQw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZcABOnQw" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6D26AC4AF1B; Mon, 29 Apr 2024 00:26:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714350412; bh=JV9sARz8mXFB1oPD9Q4pwlzsDwDsirXQg0InRkhTXdg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZcABOnQw04CLdm4lLPfwclk96h+C/SU8r0D3oYtTi4FuVrKwidES13DjGjymF3rml THUqm0veDndSNbRipgGjxF/Xa+v1tdcghJD+zhPT8Xoo9T3rMSmJQhZJKWmwWqcgkR L3Toqg36ARKie/6XxygT71tBabWIbWTVmuCASoNYSOmuH31yZO0l6P5ISJVtYl9Sqz tOB2XXU1pYZ8tDe7eUi6KQkzH2qxbGJA3L9f0RvwSejYC18PJdXIkD/7f0m4zkA0bp OZkc9rFRoIHmeP+Wi+waCRtdi8nmPPIN10CeP1pnQNcJ3pc8lWnxE0Wzs2weQH/F9i Tuz6dLZnUDyQw== From: Jisheng Zhang To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Emil Renner Berthing Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Emil Renner Berthing Subject: [PATCH v4 2/8] dt-bindings: riscv: starfive: add Milkv Mars board Date: Mon, 29 Apr 2024 08:13:11 +0800 Message-ID: <20240429001317.432-3-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240429001317.432-1-jszhang@kernel.org> References: <20240429001317.432-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add device tree bindings for the Milkv Mars board which is equipped with StarFive JH7110 SoC. Signed-off-by: Jisheng Zhang Acked-by: Krzysztof Kozlowski Reviewed-by: Emil Renner Berthing --- Documentation/devicetree/bindings/riscv/starfive.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Docume= ntation/devicetree/bindings/riscv/starfive.yaml index cc4d92f0a1bf..b672f8521949 100644 --- a/Documentation/devicetree/bindings/riscv/starfive.yaml +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml @@ -26,6 +26,7 @@ properties: =20 - items: - enum: + - milkv,mars - starfive,visionfive-2-v1.2a - starfive,visionfive-2-v1.3b - const: starfive,jh7110 --=20 2.43.0 From nobody Tue Dec 16 10:00:03 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ECA8DC13B; Mon, 29 Apr 2024 00:26:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350416; cv=none; b=KpIXbqEqFEkTDwSVITFAvHn4QOW2wjQqSUHLw3EtgVqZKfSNlUkJCPHyfCEUfNorFFetdDlcdpNlrqFXoT010VTJEYPOAkjb1cTIFYqaPI9kAfRF/3r/lHw9ID3og+YHb+3DjxNbSE27Ij61+f2HdHngfsVUpFt7M6caLAfJS4k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350416; c=relaxed/simple; bh=oTgkNFvfPsJNNr6c8qJP0JFAmo0sDPa2N3exYAFyIsU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MXeDZ1f9Pqq363uy89KY2hK9i7PW15Tyc8d32GfKU+Xgvcv8vb3Gi+jXwCkxTkMYgS9LoLBlu0JFzG89UgveyAoUVmez8+Q8/qW60W57Ac1lPXuY19uYKacmw9APGCjNh0X00lJvSV/pxpfaBkkbXIKrdei6AJLS7dqBzdCXOPc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YfzXQFNa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YfzXQFNa" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2AD60C113CC; Mon, 29 Apr 2024 00:26:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714350415; bh=oTgkNFvfPsJNNr6c8qJP0JFAmo0sDPa2N3exYAFyIsU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YfzXQFNaEpaUPyw1zspe5HQciNWWa4VCRsIcmNAj003gvqq9L1h9jiEBmTAp5Hq7T lE0nV/tFIGHi2JdquFbfROkub1yHMRJUs2TbwIfKnoYwgXZhelhDFpCbSU9VFnCL6v V0Uy7KbAw8LMglYp9As57LKOYmCgMUSvGUFJL/Qh+2CDOeC6FQiArbuYDyzhhZ6AVE gJIfL0m7UPlj7SHXGr8ebpJDA1BsXnYXoVdBS8B8lV92mkTAwMxt7cg/tSOItSjPVA qOud96fm40NcZB1Bfow84LjBiAYMhf1MUYOiFvjbpFSG+zOSdcmIxnMQ8HcdDwKqD4 Mhz5yQQGxoOdQ== From: Jisheng Zhang To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Emil Renner Berthing Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Emil Renner Berthing Subject: [PATCH v4 3/8] riscv: dts: starfive: visionfive 2: update sound and codec dt node name Date: Mon, 29 Apr 2024 08:13:12 +0800 Message-ID: <20240429001317.432-4-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240429001317.432-1-jszhang@kernel.org> References: <20240429001317.432-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use "audio-codec" as the codec dt node name, and "sound" as the simple audio card dt name. Suggested-by: Krzysztof Kozlowski Signed-off-by: Jisheng Zhang Reviewed-by: Emil Renner Berthing --- .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi= b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index ccd0ce55aa53..50955cc45658 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -41,12 +41,12 @@ gpio-restart { priority =3D <224>; }; =20 - pwmdac_codec: pwmdac-codec { + pwmdac_codec: audio-codec { compatible =3D "linux,spdif-dit"; #sound-dai-cells =3D <0>; }; =20 - sound-pwmdac { + sound { compatible =3D "simple-audio-card"; simple-audio-card,name =3D "StarFive-PWMDAC-Sound-Card"; #address-cells =3D <1>; --=20 2.43.0 From nobody Tue Dec 16 10:00:03 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D0F7D515; Mon, 29 Apr 2024 00:26:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350418; cv=none; b=cVIxPRuHwZRTwIoi2oZe0GjJV6iNE/PPBlwauBk7VYMLMJZ/xJu9IYTYfrF2ZkZjWkj9A5WGk9/974P9TTNX9tHC/ZrBks4i2tSrVsEPz78wRB3XW/c1qGxA4MZpxjdzV/egh4mEo6EhZL+reJ8HB3cxnep/kMOj6a1+/RJORzk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350418; c=relaxed/simple; bh=nmPdrX+XsSeX70KVtZRtkwwkkaIBq4Gq9LfwCK24YRw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oSTfJSzn1wd5cNo8Rd2H8ZaRplwuFcShF7OC3idXgdmH0fTCV3MevHzQEobxTR7b+JEzSgDVzV5tVlteyP6MZtF5Vi4d8ksOV+f8uf7tMbNiwYEJCzcA3wnQfx9OxbpjYGC4mQi5BVmbs6W5tRr0EYp33DfXJHHwDqb4+kLE2u4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oT/Ar35a; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oT/Ar35a" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DDCC1C4AF18; Mon, 29 Apr 2024 00:26:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714350418; bh=nmPdrX+XsSeX70KVtZRtkwwkkaIBq4Gq9LfwCK24YRw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oT/Ar35aIU9cm3DjlkVKJdGkPm3jBBhYz3I9S8J/2yDZvKQNDAl4SnkFvdF1/1bMT 9CCMH8itbLIY8HlW0cWN14nq5Sh77uJliLgzTFFalORgYa1URbCXMSpCQJs6Su92X0 wukRp9CPI3MrK/juh1N6tBePsQNiGBgzuHD+I12KqFKmOl64nxMznxUI8SC9JYRLzV cXJct7T+wUmTH4i9J+gZGGHbVszgg3+ftndiGf9U5xXOkyWe0VU+v0VqX6Cks4bnIc LezJJXjGQ1XtRqe7Dvn+dyI1/aOODAybWtaUb85cd6bAvMYgq/aRymaMczgQw2M78Q IMD706AOTXSFg== From: Jisheng Zhang To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Emil Renner Berthing Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Emil Renner Berthing Subject: [PATCH v4 4/8] riscv: dts: starfive: visionfive 2: use cpus label for timebase freq Date: Mon, 29 Apr 2024 08:13:13 +0800 Message-ID: <20240429001317.432-5-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240429001317.432-1-jszhang@kernel.org> References: <20240429001317.432-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As pointed out by Krzysztof "Board should not bring new CPU nodes. Override by label instead." Suggested-by: Krzysztof Kozlowski Signed-off-by: Jisheng Zhang Reviewed-by: Emil Renner Berthing --- .../boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi= b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 50955cc45658..910c07bd4af9 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -26,10 +26,6 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 - cpus { - timebase-frequency =3D <4000000>; - }; - memory@40000000 { device_type =3D "memory"; reg =3D <0x0 0x40000000 0x1 0x0>; @@ -69,6 +65,10 @@ codec { }; }; =20 +&cpus { + timebase-frequency =3D <4000000>; +}; + &dvp_clk { clock-frequency =3D <74250000>; }; --=20 2.43.0 From nobody Tue Dec 16 10:00:03 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B9CB3DDCB; Mon, 29 Apr 2024 00:27:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350420; cv=none; b=hHO2Cy6/afsMbb1PDYjeBH0UZ0I62tS8Jc+kDaUQ3zuQj6426jgZCAaHWJiQNuw3DODjAlcY4qowv1/Dx928mnBqSxKSKINEZDglCEKFqir7SG939RwgeQGIpIm+hAzqLQvR4d3bQkze9EumIZtOaUIkvJ/1TjVDbXaRbIfvDws= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350420; c=relaxed/simple; bh=z5O26Wd/mN2CPMO2FozsGOCw0zDYK5WOLHYQMcySy8c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WpYYYvENzwXM79/GQHnJQEU4xmsDxeNkv7JCjKBrCPHo++7qbkIf6o3Txbb7JPXN7oboo2Cgvm4HHEUg8ubYLMGxUwkIeHyOV4Cp7spZ6K6x2/Uh1DbwUtEtGGdS/kEIy7uUYzaWLWdMpzOOKlstDQ+qbJQyMWSibYcjhpHvN58= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=pS4rRd9f; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pS4rRd9f" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9A8A9C113CC; Mon, 29 Apr 2024 00:26:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714350420; bh=z5O26Wd/mN2CPMO2FozsGOCw0zDYK5WOLHYQMcySy8c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pS4rRd9f538KuN952oyshxDxaZsPlJURFYl1hst+rQpnfTDu3dpXzXbKySKHverJs zN8NNk3D9uly4RZ7QTncBMGZeJbATAyEYdqF8crFo/doiEIBlDonmD189Xt6uPNVIu F9KR6nGtyp4VvI4IgHKlcgT9qczIF4Qx0I77lZ/PipaFbUi07M5JqW+EkbuMlPDe3Z nOwhN6Aw6UgIoVc7BbWgoebHavBRLVQZKPfmtx9YmQ87npm76H0NUUfA2+0IXnuGc4 +J4lsYvVpI3q58AzXdF/J3e/mIR/eylOkDyvnHA1tlXS/PhUz8kr85LrbL7+8+0adJ u/NYCRg0WVH/Q== From: Jisheng Zhang To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Emil Renner Berthing Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 5/8] riscv: dts: starfive: visionfive 2: add tf cd-gpios Date: Mon, 29 Apr 2024 08:13:14 +0800 Message-ID: <20240429001317.432-6-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240429001317.432-1-jszhang@kernel.org> References: <20240429001317.432-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Per VisionFive 2 1.2B, and 1.3A boards' SCH, GPIO 41 is used as card detect. So add "cd-gpios" property for this. Signed-off-by: Jisheng Zhang Reviewed-by: Emil Renner Berthing --- arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi= b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 910c07bd4af9..b6030d63459d 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -303,7 +303,7 @@ &mmc1 { bus-width =3D <4>; no-sdio; no-mmc; - broken-cd; + cd-gpios =3D <&sysgpio 41 GPIO_ACTIVE_LOW>; cap-sd-highspeed; post-power-on-delay-ms =3D <200>; pinctrl-names =3D "default"; --=20 2.43.0 From nobody Tue Dec 16 10:00:03 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24F27EEDA; Mon, 29 Apr 2024 00:27:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350423; cv=none; b=Z5tOumP1M3vjPdpQn+tZce4ox4voaF5fjjufAEMyRMQS+758szfZ7UZesJQsiSBccPUIW2Kau+07xHFJouXGu9rwaawA00FF6ktP6qpIAHlkefK4RuhtHCG8fiBvoJNQ7Lv1c6W5NOFlthHjWmB8Gt0VxT+rHsofpfvWQfyYqmY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350423; c=relaxed/simple; bh=oZ8CDJ87DHapEDR21yPFYKV3LrFmlIVzhWRzefmtllw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aKKv1XrqW5ifQhuzc5Rf/EAI5PtEzQIEdm9zdGwGZo4YyPzcmE+moctnCS96eNDwZunrB3LhlVvKopHXRj3KXSmO2mrl66WpKcjIFrqABsaSdnrK3dFf0wDanlDU9vBPicAyGSjKXoiRB/TCM+dksc1TNMmnE2Q4at/J4q9+Obk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gU4+wnBv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gU4+wnBv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0400EC113CC; Mon, 29 Apr 2024 00:27:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714350423; bh=oZ8CDJ87DHapEDR21yPFYKV3LrFmlIVzhWRzefmtllw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gU4+wnBv96PnwZz2h/SvbVTK+Nq4CqvZlNd6cD/GsXSVCVgIlW1IXlKf2X5hHvJ8M EaFayKyzGoq97R0ktbsSFudPqoBP++50wtczy3pSoM1tJueoFLXaFigJppbrEeDbzA 9N9GIggPVnSWvDyyEXju6tnJazcM7p9PV6bXOM4sNWkUuSgKEoFc2Gk2HgiiVDXuWL 5LH9RmJU80qNNW8pZdFbM1+Un/QCA9V99GCTOdoIEkzA9Oi17s8ChyHEQ2hl2NRHef GssFcRG3IeSEH4k6GxkxJm3frqLdioVxFYMlw3DVb02tCC7NCemi+QJK5rQu7TAvJh IrjAZR4bx/G/w== From: Jisheng Zhang To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Emil Renner Berthing Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 6/8] riscv: dts: starfive: visionfive 2: add "disable-wp" for tfcard Date: Mon, 29 Apr 2024 08:13:15 +0800 Message-ID: <20240429001317.432-7-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240429001317.432-1-jszhang@kernel.org> References: <20240429001317.432-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" No physical write-protect line is present, so setting "disable-wp". Signed-off-by: Jisheng Zhang Reviewed-by: Emil Renner Berthing --- arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi= b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index b6030d63459d..e19f26628054 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -304,6 +304,7 @@ &mmc1 { no-sdio; no-mmc; cd-gpios =3D <&sysgpio 41 GPIO_ACTIVE_LOW>; + disable-wp; cap-sd-highspeed; post-power-on-delay-ms =3D <200>; pinctrl-names =3D "default"; --=20 2.43.0 From nobody Tue Dec 16 10:00:03 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6D7710A1D; Mon, 29 Apr 2024 00:27:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350425; cv=none; b=hSWN9lQbrxf895pe1qMDribQ27cM+hgoimVWpMyfhF7OQmCH/1yqUiq5+c9O42Hrn+Dgobdmx2NKrnmr87wcjhswK72hLc3nBQTgcekxjGqtQuWNxt/AYQ0JHWQGPOUrsgrkYUVUNQ0wh49+quIR2YfuCCSEfh+JB/0xWAuKvNw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714350425; c=relaxed/simple; bh=F5mQt543eIxBcudqnZ4KxKSg+PVA3WTuQCE85YgXcIY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Kaex+u3Ql4es/BnZ7efWxm5F0UhCCR3U/5WhXbe51Jq/+S5mUUiLiZpghy5fWVnusAnD16vaHG4HtHrfbNHrmy0O7klZ5lnnWvTARkw4a7DrhXsaJKj7BU2b9xxaYflMsMMYvy0Fi7f3dtqM04Xe0wicYLj2WG/tDG4bbcjpIQo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lK0nYpp+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lK0nYpp+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6F97CC4AF1A; Mon, 29 Apr 2024 00:27:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714350425; bh=F5mQt543eIxBcudqnZ4KxKSg+PVA3WTuQCE85YgXcIY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lK0nYpp+fyZ01Wb+mioRzNID6KUbk/PvH9mz9H9YUR/ckyUFk68938DapCuOdllwN 64ez6cldIRWlN8Gl+QCAADAkpEeRVrCWKiPvshOF9eTqnSmWzUiyRulPp2F+7g7dNt aoFpyhQpPo6AZ9tOr3Ykp148OYBqtT4YZDhRHHUL81I8nuBaucmWIr7nQL33NFYiab cM+oMGSOE0sfIvwzM3WZOttQmsD5nzpzyo+yMNP83ITIBqmQLqjX9rPJcobqJ5+ups kIOa5/tUH/KgunHTXbYG0x/j4XIE+XSzmolW5tl5IkBMzyYbY+52ZbJIWsUP7xG3eq 8a4fB398X2z2w== From: Jisheng Zhang To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Emil Renner Berthing Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 7/8] riscv: dts: starfive: introduce a common board dtsi for jh7110 based boards Date: Mon, 29 Apr 2024 08:13:16 +0800 Message-ID: <20240429001317.432-8-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240429001317.432-1-jszhang@kernel.org> References: <20240429001317.432-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This is to prepare for Milkv Mars board dts support in the following patch. Let's factored out common part into .dtsi. Signed-off-by: Jisheng Zhang --- .../boot/dts/starfive/jh7110-common.dtsi | 599 ++++++++++++++++++ .../jh7110-starfive-visionfive-2.dtsi | 585 +---------------- 2 files changed, 600 insertions(+), 584 deletions(-) create mode 100644 arch/riscv/boot/dts/starfive/jh7110-common.dtsi diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/b= oot/dts/starfive/jh7110-common.dtsi new file mode 100644 index 000000000000..8ff6ea64f048 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -0,0 +1,599 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022 Emil Renner Berthing + */ + +/dts-v1/; +#include "jh7110.dtsi" +#include "jh7110-pinfunc.h" +#include + +/ { + aliases { + ethernet0 =3D &gmac0; + i2c0 =3D &i2c0; + i2c2 =3D &i2c2; + i2c5 =3D &i2c5; + i2c6 =3D &i2c6; + mmc0 =3D &mmc0; + mmc1 =3D &mmc1; + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@40000000 { + device_type =3D "memory"; + reg =3D <0x0 0x40000000 0x1 0x0>; + }; + + gpio-restart { + compatible =3D "gpio-restart"; + gpios =3D <&sysgpio 35 GPIO_ACTIVE_HIGH>; + priority =3D <224>; + }; + + pwmdac_codec: audio-codec { + compatible =3D "linux,spdif-dit"; + #sound-dai-cells =3D <0>; + }; + + sound { + compatible =3D "simple-audio-card"; + simple-audio-card,name =3D "StarFive-PWMDAC-Sound-Card"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + simple-audio-card,dai-link@0 { + reg =3D <0>; + format =3D "left_j"; + bitclock-master =3D <&sndcpu0>; + frame-master =3D <&sndcpu0>; + + sndcpu0: cpu { + sound-dai =3D <&pwmdac>; + }; + + codec { + sound-dai =3D <&pwmdac_codec>; + }; + }; + }; +}; + +&cpus { + timebase-frequency =3D <4000000>; +}; + +&dvp_clk { + clock-frequency =3D <74250000>; +}; + +&gmac0_rgmii_rxin { + clock-frequency =3D <125000000>; +}; + +&gmac0_rmii_refin { + clock-frequency =3D <50000000>; +}; + +&gmac1_rgmii_rxin { + clock-frequency =3D <125000000>; +}; + +&gmac1_rmii_refin { + clock-frequency =3D <50000000>; +}; + +&hdmitx0_pixelclk { + clock-frequency =3D <297000000>; +}; + +&i2srx_bclk_ext { + clock-frequency =3D <12288000>; +}; + +&i2srx_lrck_ext { + clock-frequency =3D <192000>; +}; + +&i2stx_bclk_ext { + clock-frequency =3D <12288000>; +}; + +&i2stx_lrck_ext { + clock-frequency =3D <192000>; +}; + +&mclk_ext { + clock-frequency =3D <12288000>; +}; + +&osc { + clock-frequency =3D <24000000>; +}; + +&rtc_osc { + clock-frequency =3D <32768>; +}; + +&tdm_ext { + clock-frequency =3D <49152000>; +}; + +&camss { + assigned-clocks =3D <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>, + <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>; + assigned-clock-rates =3D <49500000>, <198000000>; + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + }; + + port@1 { + reg =3D <1>; + + camss_from_csi2rx: endpoint { + remote-endpoint =3D <&csi2rx_to_camss>; + }; + }; + }; +}; + +&csi2rx { + assigned-clocks =3D <&ispcrg JH7110_ISPCLK_VIN_SYS>; + assigned-clock-rates =3D <297000000>; + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + /* remote MIPI sensor endpoint */ + }; + + port@1 { + reg =3D <1>; + + csi2rx_to_camss: endpoint { + remote-endpoint =3D <&camss_from_csi2rx>; + }; + }; + }; +}; + +&gmac0 { + phy-handle =3D <&phy0>; + phy-mode =3D "rgmii-id"; + status =3D "okay"; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg =3D <0>; + }; + }; +}; + +&i2c0 { + clock-frequency =3D <100000>; + i2c-sda-hold-time-ns =3D <300>; + i2c-sda-falling-time-ns =3D <510>; + i2c-scl-falling-time-ns =3D <510>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0_pins>; + status =3D "okay"; +}; + +&i2c2 { + clock-frequency =3D <100000>; + i2c-sda-hold-time-ns =3D <300>; + i2c-sda-falling-time-ns =3D <510>; + i2c-scl-falling-time-ns =3D <510>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_pins>; + status =3D "okay"; +}; + +&i2c5 { + clock-frequency =3D <100000>; + i2c-sda-hold-time-ns =3D <300>; + i2c-sda-falling-time-ns =3D <510>; + i2c-scl-falling-time-ns =3D <510>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c5_pins>; + status =3D "okay"; + + axp15060: pmic@36 { + compatible =3D "x-powers,axp15060"; + reg =3D <0x36>; + interrupt-controller; + #interrupt-cells =3D <1>; + + regulators { + vcc_3v3: dcdc1 { + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcc_3v3"; + }; + + vdd_cpu: dcdc2 { + regulator-always-on; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1540000>; + regulator-name =3D "vdd-cpu"; + }; + + emmc_vdd: aldo4 { + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "emmc_vdd"; + }; + }; + }; +}; + +&i2c6 { + clock-frequency =3D <100000>; + i2c-sda-hold-time-ns =3D <300>; + i2c-sda-falling-time-ns =3D <510>; + i2c-scl-falling-time-ns =3D <510>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c6_pins>; + status =3D "okay"; +}; + +&mmc0 { + max-frequency =3D <100000000>; + assigned-clocks =3D <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; + assigned-clock-rates =3D <50000000>; + bus-width =3D <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + cap-mmc-hw-reset; + post-power-on-delay-ms =3D <200>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mmc0_pins>; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&emmc_vdd>; + status =3D "okay"; +}; + +&mmc1 { + max-frequency =3D <100000000>; + assigned-clocks =3D <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; + assigned-clock-rates =3D <50000000>; + bus-width =3D <4>; + no-sdio; + no-mmc; + cd-gpios =3D <&sysgpio 41 GPIO_ACTIVE_LOW>; + disable-wp; + cap-sd-highspeed; + post-power-on-delay-ms =3D <200>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mmc1_pins>; + status =3D "okay"; +}; + +&pwmdac { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwmdac_pins>; + status =3D "okay"; +}; + +&qspi { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + nor_flash: flash@0 { + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + cdns,read-delay =3D <5>; + spi-max-frequency =3D <12000000>; + cdns,tshsl-ns =3D <1>; + cdns,tsd2d-ns =3D <1>; + cdns,tchsh-ns =3D <1>; + cdns,tslch-ns =3D <1>; + + partitions { + compatible =3D "fixed-partitions"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + spl@0 { + reg =3D <0x0 0x80000>; + }; + uboot-env@f0000 { + reg =3D <0xf0000 0x10000>; + }; + uboot@100000 { + reg =3D <0x100000 0x400000>; + }; + reserved-data@600000 { + reg =3D <0x600000 0xa00000>; + }; + }; + }; +}; + +&pwm { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm_pins>; + status =3D "okay"; +}; + +&spi0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi0_pins>; + status =3D "okay"; + + spi_dev0: spi@0 { + compatible =3D "rohm,dh2228fv"; + reg =3D <0>; + spi-max-frequency =3D <10000000>; + }; +}; + +&sysgpio { + i2c0_pins: i2c0-0 { + i2c-pins { + pinmux =3D , + ; + bias-disable; /* external pull-up */ + input-enable; + input-schmitt-enable; + }; + }; + + i2c2_pins: i2c2-0 { + i2c-pins { + pinmux =3D , + ; + bias-disable; /* external pull-up */ + input-enable; + input-schmitt-enable; + }; + }; + + i2c5_pins: i2c5-0 { + i2c-pins { + pinmux =3D , + ; + bias-disable; /* external pull-up */ + input-enable; + input-schmitt-enable; + }; + }; + + i2c6_pins: i2c6-0 { + i2c-pins { + pinmux =3D , + ; + bias-disable; /* external pull-up */ + input-enable; + input-schmitt-enable; + }; + }; + + mmc0_pins: mmc0-0 { + rst-pins { + pinmux =3D ; + bias-pull-up; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + + mmc-pins { + pinmux =3D , + , + , + , + , + , + , + , + , + ; + bias-pull-up; + drive-strength =3D <12>; + input-enable; + }; + }; + + mmc1_pins: mmc1-0 { + clk-pins { + pinmux =3D ; + bias-pull-up; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + + mmc-pins { + pinmux =3D , + , + , + , + ; + bias-pull-up; + drive-strength =3D <12>; + input-enable; + input-schmitt-enable; + slew-rate =3D <0>; + }; + }; + + pwmdac_pins: pwmdac-0 { + pwmdac-pins { + pinmux =3D , + ; + bias-disable; + drive-strength =3D <2>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + }; + + pwm_pins: pwm-0 { + pwm-pins { + pinmux =3D , + ; + bias-disable; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + }; + + spi0_pins: spi0-0 { + mosi-pins { + pinmux =3D ; + bias-disable; + input-disable; + input-schmitt-disable; + }; + + miso-pins { + pinmux =3D ; + bias-pull-up; + input-enable; + input-schmitt-enable; + }; + + sck-pins { + pinmux =3D ; + bias-disable; + input-disable; + input-schmitt-disable; + }; + + ss-pins { + pinmux =3D ; + bias-disable; + input-disable; + input-schmitt-disable; + }; + }; + + uart0_pins: uart0-0 { + tx-pins { + pinmux =3D ; + bias-disable; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + + rx-pins { + pinmux =3D ; + bias-disable; /* external pull-up */ + drive-strength =3D <2>; + input-enable; + input-schmitt-enable; + slew-rate =3D <0>; + }; + }; +}; + +&uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0_pins>; + status =3D "okay"; +}; + +&usb0 { + dr_mode =3D "peripheral"; + status =3D "okay"; +}; + +&U74_1 { + cpu-supply =3D <&vdd_cpu>; +}; + +&U74_2 { + cpu-supply =3D <&vdd_cpu>; +}; + +&U74_3 { + cpu-supply =3D <&vdd_cpu>; +}; + +&U74_4 { + cpu-supply =3D <&vdd_cpu>; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi= b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index e19f26628054..9d70f21c86fc 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -5,188 +5,11 @@ */ =20 /dts-v1/; -#include "jh7110.dtsi" -#include "jh7110-pinfunc.h" -#include +#include "jh7110-common.dtsi" =20 / { aliases { - ethernet0 =3D &gmac0; ethernet1 =3D &gmac1; - i2c0 =3D &i2c0; - i2c2 =3D &i2c2; - i2c5 =3D &i2c5; - i2c6 =3D &i2c6; - mmc0 =3D &mmc0; - mmc1 =3D &mmc1; - serial0 =3D &uart0; - }; - - chosen { - stdout-path =3D "serial0:115200n8"; - }; - - memory@40000000 { - device_type =3D "memory"; - reg =3D <0x0 0x40000000 0x1 0x0>; - }; - - gpio-restart { - compatible =3D "gpio-restart"; - gpios =3D <&sysgpio 35 GPIO_ACTIVE_HIGH>; - priority =3D <224>; - }; - - pwmdac_codec: audio-codec { - compatible =3D "linux,spdif-dit"; - #sound-dai-cells =3D <0>; - }; - - sound { - compatible =3D "simple-audio-card"; - simple-audio-card,name =3D "StarFive-PWMDAC-Sound-Card"; - #address-cells =3D <1>; - #size-cells =3D <0>; - - simple-audio-card,dai-link@0 { - reg =3D <0>; - format =3D "left_j"; - bitclock-master =3D <&sndcpu0>; - frame-master =3D <&sndcpu0>; - - sndcpu0: cpu { - sound-dai =3D <&pwmdac>; - }; - - codec { - sound-dai =3D <&pwmdac_codec>; - }; - }; - }; -}; - -&cpus { - timebase-frequency =3D <4000000>; -}; - -&dvp_clk { - clock-frequency =3D <74250000>; -}; - -&gmac0_rgmii_rxin { - clock-frequency =3D <125000000>; -}; - -&gmac0_rmii_refin { - clock-frequency =3D <50000000>; -}; - -&gmac1_rgmii_rxin { - clock-frequency =3D <125000000>; -}; - -&gmac1_rmii_refin { - clock-frequency =3D <50000000>; -}; - -&hdmitx0_pixelclk { - clock-frequency =3D <297000000>; -}; - -&i2srx_bclk_ext { - clock-frequency =3D <12288000>; -}; - -&i2srx_lrck_ext { - clock-frequency =3D <192000>; -}; - -&i2stx_bclk_ext { - clock-frequency =3D <12288000>; -}; - -&i2stx_lrck_ext { - clock-frequency =3D <192000>; -}; - -&mclk_ext { - clock-frequency =3D <12288000>; -}; - -&osc { - clock-frequency =3D <24000000>; -}; - -&rtc_osc { - clock-frequency =3D <32768>; -}; - -&tdm_ext { - clock-frequency =3D <49152000>; -}; - -&camss { - assigned-clocks =3D <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>, - <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>; - assigned-clock-rates =3D <49500000>, <198000000>; - status =3D "okay"; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - port@0 { - reg =3D <0>; - }; - - port@1 { - reg =3D <1>; - - camss_from_csi2rx: endpoint { - remote-endpoint =3D <&csi2rx_to_camss>; - }; - }; - }; -}; - -&csi2rx { - assigned-clocks =3D <&ispcrg JH7110_ISPCLK_VIN_SYS>; - assigned-clock-rates =3D <297000000>; - status =3D "okay"; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - port@0 { - reg =3D <0>; - - /* remote MIPI sensor endpoint */ - }; - - port@1 { - reg =3D <1>; - - csi2rx_to_camss: endpoint { - remote-endpoint =3D <&camss_from_csi2rx>; - }; - }; - }; -}; - -&gmac0 { - phy-handle =3D <&phy0>; - phy-mode =3D "rgmii-id"; - status =3D "okay"; - - mdio { - #address-cells =3D <1>; - #size-cells =3D <0>; - compatible =3D "snps,dwmac-mdio"; - - phy0: ethernet-phy@0 { - reg =3D <0>; - }; }; }; =20 @@ -206,412 +29,6 @@ phy1: ethernet-phy@1 { }; }; =20 -&i2c0 { - clock-frequency =3D <100000>; - i2c-sda-hold-time-ns =3D <300>; - i2c-sda-falling-time-ns =3D <510>; - i2c-scl-falling-time-ns =3D <510>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c0_pins>; - status =3D "okay"; -}; - -&i2c2 { - clock-frequency =3D <100000>; - i2c-sda-hold-time-ns =3D <300>; - i2c-sda-falling-time-ns =3D <510>; - i2c-scl-falling-time-ns =3D <510>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c2_pins>; - status =3D "okay"; -}; - -&i2c5 { - clock-frequency =3D <100000>; - i2c-sda-hold-time-ns =3D <300>; - i2c-sda-falling-time-ns =3D <510>; - i2c-scl-falling-time-ns =3D <510>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c5_pins>; - status =3D "okay"; - - axp15060: pmic@36 { - compatible =3D "x-powers,axp15060"; - reg =3D <0x36>; - interrupt-controller; - #interrupt-cells =3D <1>; - - regulators { - vcc_3v3: dcdc1 { - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - regulator-name =3D "vcc_3v3"; - }; - - vdd_cpu: dcdc2 { - regulator-always-on; - regulator-min-microvolt =3D <500000>; - regulator-max-microvolt =3D <1540000>; - regulator-name =3D "vdd-cpu"; - }; - - emmc_vdd: aldo4 { - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-name =3D "emmc_vdd"; - }; - }; - }; -}; - -&i2c6 { - clock-frequency =3D <100000>; - i2c-sda-hold-time-ns =3D <300>; - i2c-sda-falling-time-ns =3D <510>; - i2c-scl-falling-time-ns =3D <510>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c6_pins>; - status =3D "okay"; -}; - &mmc0 { - max-frequency =3D <100000000>; - assigned-clocks =3D <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; - assigned-clock-rates =3D <50000000>; - bus-width =3D <8>; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; non-removable; - cap-mmc-hw-reset; - post-power-on-delay-ms =3D <200>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&mmc0_pins>; - vmmc-supply =3D <&vcc_3v3>; - vqmmc-supply =3D <&emmc_vdd>; - status =3D "okay"; -}; - -&mmc1 { - max-frequency =3D <100000000>; - assigned-clocks =3D <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; - assigned-clock-rates =3D <50000000>; - bus-width =3D <4>; - no-sdio; - no-mmc; - cd-gpios =3D <&sysgpio 41 GPIO_ACTIVE_LOW>; - disable-wp; - cap-sd-highspeed; - post-power-on-delay-ms =3D <200>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&mmc1_pins>; - status =3D "okay"; -}; - -&pwmdac { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pwmdac_pins>; - status =3D "okay"; -}; - -&qspi { - #address-cells =3D <1>; - #size-cells =3D <0>; - status =3D "okay"; - - nor_flash: flash@0 { - compatible =3D "jedec,spi-nor"; - reg =3D <0>; - cdns,read-delay =3D <5>; - spi-max-frequency =3D <12000000>; - cdns,tshsl-ns =3D <1>; - cdns,tsd2d-ns =3D <1>; - cdns,tchsh-ns =3D <1>; - cdns,tslch-ns =3D <1>; - - partitions { - compatible =3D "fixed-partitions"; - #address-cells =3D <1>; - #size-cells =3D <1>; - - spl@0 { - reg =3D <0x0 0x80000>; - }; - uboot-env@f0000 { - reg =3D <0xf0000 0x10000>; - }; - uboot@100000 { - reg =3D <0x100000 0x400000>; - }; - reserved-data@600000 { - reg =3D <0x600000 0xa00000>; - }; - }; - }; -}; - -&pwm { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pwm_pins>; - status =3D "okay"; -}; - -&spi0 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&spi0_pins>; - status =3D "okay"; - - spi_dev0: spi@0 { - compatible =3D "rohm,dh2228fv"; - reg =3D <0>; - spi-max-frequency =3D <10000000>; - }; -}; - -&sysgpio { - i2c0_pins: i2c0-0 { - i2c-pins { - pinmux =3D , - ; - bias-disable; /* external pull-up */ - input-enable; - input-schmitt-enable; - }; - }; - - i2c2_pins: i2c2-0 { - i2c-pins { - pinmux =3D , - ; - bias-disable; /* external pull-up */ - input-enable; - input-schmitt-enable; - }; - }; - - i2c5_pins: i2c5-0 { - i2c-pins { - pinmux =3D , - ; - bias-disable; /* external pull-up */ - input-enable; - input-schmitt-enable; - }; - }; - - i2c6_pins: i2c6-0 { - i2c-pins { - pinmux =3D , - ; - bias-disable; /* external pull-up */ - input-enable; - input-schmitt-enable; - }; - }; - - mmc0_pins: mmc0-0 { - rst-pins { - pinmux =3D ; - bias-pull-up; - drive-strength =3D <12>; - input-disable; - input-schmitt-disable; - slew-rate =3D <0>; - }; - - mmc-pins { - pinmux =3D , - , - , - , - , - , - , - , - , - ; - bias-pull-up; - drive-strength =3D <12>; - input-enable; - }; - }; - - mmc1_pins: mmc1-0 { - clk-pins { - pinmux =3D ; - bias-pull-up; - drive-strength =3D <12>; - input-disable; - input-schmitt-disable; - slew-rate =3D <0>; - }; - - mmc-pins { - pinmux =3D , - , - , - , - ; - bias-pull-up; - drive-strength =3D <12>; - input-enable; - input-schmitt-enable; - slew-rate =3D <0>; - }; - }; - - pwmdac_pins: pwmdac-0 { - pwmdac-pins { - pinmux =3D , - ; - bias-disable; - drive-strength =3D <2>; - input-disable; - input-schmitt-disable; - slew-rate =3D <0>; - }; - }; - - pwm_pins: pwm-0 { - pwm-pins { - pinmux =3D , - ; - bias-disable; - drive-strength =3D <12>; - input-disable; - input-schmitt-disable; - slew-rate =3D <0>; - }; - }; - - spi0_pins: spi0-0 { - mosi-pins { - pinmux =3D ; - bias-disable; - input-disable; - input-schmitt-disable; - }; - - miso-pins { - pinmux =3D ; - bias-pull-up; - input-enable; - input-schmitt-enable; - }; - - sck-pins { - pinmux =3D ; - bias-disable; - input-disable; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nrHLlhOP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0B201C4AF1B; Mon, 29 Apr 2024 00:27:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714350428; bh=Me6kV0m1Pfmm/VqxiWspxINMuSUzJ8rjhLb86dLUq5k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nrHLlhOPF9845cevx6RTVszjP9xR769xlV9mNn5CNFexjwSTOVuh78FztRGyk8szx xcvRWUmMcbDokAHnt9EsBeBFHE0Zfp8IzDnrJ5DqhfPI9GizymFU/rX+VOxrVqXbIo FN8iYSmKdv3JngOQ8X7WXjrlD8pdrLgdMFs3dZIg8GyJOB8QBbB7dt7aI4gspgbZEc XQljSieLVHSmPsYiWinlaQYD4NdItDTyC9rGlnfsVKYPD4ZdAPgv3PV5cBO96IJD+3 HKeWsVsp4KkYJtOM28uU6bniF4uXwI3kU0SoWiO0RxTPNc7IjZ1q9PJuNz+gxmd/RJ Nl0ZCHM1rWaTw== From: Jisheng Zhang To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Emil Renner Berthing Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 8/8] riscv: dts: starfive: add Milkv Mars board device tree Date: Mon, 29 Apr 2024 08:13:17 +0800 Message-ID: <20240429001317.432-9-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240429001317.432-1-jszhang@kernel.org> References: <20240429001317.432-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Milkv Mars is a development board based on the Starfive JH7110 SoC. The board features: - JH7110 SoC - 1/2/4/8 GiB LPDDR4 DRAM - AXP15060 PMIC - 40 pin GPIO header - 3x USB 3.0 host port - 1x USB 2.0 host port - 1x M.2 E-Key - 1x eMMC slot - 1x MicroSD slot - 1x QSPI Flash - 1x 1Gbps Ethernet port - 1x HDMI port - 1x 2-lane DSI and 1x 4-lane DSI - 1x 2-lane CSI Add the devicetree file describing the currently supported features, namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet. Signed-off-by: Jisheng Zhang --- arch/riscv/boot/dts/starfive/Makefile | 1 + .../boot/dts/starfive/jh7110-milkv-mars.dts | 30 +++++++++++++++++++ 2 files changed, 31 insertions(+) create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/st= arfive/Makefile index 0141504c0f5c..2fa0cd7f31c3 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b :=3D -@ dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7100-beaglev-starlight.dtb dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7100-starfive-visionfive-v1.dtb =20 +dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-milkv-mars.dtb dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.2a.dtb dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.3b.dtb diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/risc= v/boot/dts/starfive/jh7110-milkv-mars.dts new file mode 100644 index 000000000000..fa0eac78e0ba --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2023 Jisheng Zhang + */ + +/dts-v1/; +#include "jh7110-common.dtsi" + +/ { + model =3D "Milk-V Mars"; + compatible =3D "milkv,mars", "starfive,jh7110"; +}; + +&gmac0 { + starfive,tx-use-rgmii-clk; + assigned-clocks =3D <&aoncrg JH7110_AONCLK_GMAC0_TX>; + assigned-clock-parents =3D <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; +}; + + +&phy0 { + motorcomm,tx-clk-adj-enabled; + motorcomm,tx-clk-10-inverted; + motorcomm,tx-clk-100-inverted; + motorcomm,tx-clk-1000-inverted; + motorcomm,rx-clk-drv-microamp =3D <3970>; + motorcomm,rx-data-drv-microamp =3D <2910>; + rx-internal-delay-ps =3D <1500>; + tx-internal-delay-ps =3D <1500>; +}; --=20 2.43.0