From nobody Sun May 19 13:54:36 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6ABAC148846; Fri, 26 Apr 2024 15:06:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714144019; cv=none; b=ZixxIQn+VCcBOJnKq4IyUGKnNJ0J87mUZwbvAQPTmabG7GExAtsQo0hu2mKujrQwkrkNLQR+0jtqxE5LEpM2L/BvHJo99NwE4n1Gfehfnwtbe0+S+7J355AhZVfwmNKAzsHYs0PWhDQzVk9E1ZBVGSRmTpvpuh2lu7DgdcUc57I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714144019; c=relaxed/simple; bh=ncTVHNygt84sLGMiwmdLqfXu6MVvic3n8Py3fm7DG00=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version:Content-Type; b=pWDQjKCLj2T96aD/YyJqqFQ+fk1PsmtlMduVmWgEg2URor5PdmUWZTMRALrwxoNisluHfiWD0uaMcHFem1F0uVABWj5KDAzp33QU7br15NeOhsyBtIM3XcyDBB6YUSnP9IjHXMTjsKjSpHQeVOuVpSQQAhB+ZmXbajpMbliiCN4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=L2MlZHaF; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="L2MlZHaF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714144017; x=1745680017; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=ncTVHNygt84sLGMiwmdLqfXu6MVvic3n8Py3fm7DG00=; b=L2MlZHaFPqibHt7ZfC+CX3ZR02me0rcNzhFwyvkQL6yiqU4FZ+PPkGRh iuSbpM074Gi526No+wxMfvHO4Z1D/zxAX15p829nlQdN5kg+K10VLPsuY 92H7B6uTSSjnnIIAF5tlVJ31fLfh2wHGiJvvLFd1KWQHOLNESj+TUVrL2 BZeRQP1oM+scNpO+bdU9CeyOsjH+KbQzgX5eWypgrgX1PXgSCpq38frE/ Dx+0AfgHyt8GD1ivhjl9BKO/aFKkVUVdgKWYY7OAu+rMdKxi+hkuBVkC0 OjgP3jVyDTqy7ppf83vBvdgU07WlE3KJYxnCrgmX6/I/O//+qmiAeRPQm g==; X-CSE-ConnectionGUID: CxheVWS1Q4ektaLNCiTIWw== X-CSE-MsgGUID: wKiO8BF9ToynOZN2DRxGbA== X-IronPort-AV: E=McAfee;i="6600,9927,11056"; a="35269262" X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="35269262" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2024 08:06:56 -0700 X-CSE-ConnectionGUID: 1RUVn8Y9T/mQyMy1zY+F5g== X-CSE-MsgGUID: /O+8e8J3TPmWp53xRzjg/g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="25519467" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmviesa010.fm.intel.com with ESMTP; 26 Apr 2024 08:06:56 -0700 From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, acme@kernel.org, namhyung@kernel.org, linux-kernel@vger.kernel.org Cc: eranian@google.com, ak@linux.intel.com, Kan Liang , Ahmad Yasin , stable@vger.kernel.org Subject: [PATCH] perf/x86/intel: Add a distinct name for Granite Rapids Date: Fri, 26 Apr 2024 08:05:57 -0700 Message-Id: <20240426150557.2857936-1-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable From: Kan Liang Currently, the Sapphire Rapids and Granite Rapids share the same PMU name, sapphire_rapids. Because from the kernel=E2=80=99s perspective, GNR is similar to SPR. The only key difference is that they support different extra MSRs. The code path and the PMU name are shared. However, from end users' perspective, they are quite different. Besides the extra MSRs, GNR has a newer PEBS format, supports Retire Latency, supports new CPUID enumeration architecture, doesn't required the load-latency AUX event, has additional TMA Level 1 Architectural Events, etc. The differences can be enumerated by CPUID or the PERF_CAPABILITIES MSR. They weren't reflected in the model-specific kernel setup. But it is worth to have a distinct PMU name for GNR. Fixes: a6742cb90b56 ("perf/x86/intel: Fix the FRONTEND encoding on GNR and = MTL") Suggested-by: Ahmad Yasin Signed-off-by: Kan Liang Cc: stable@vger.kernel.org --- arch/x86/events/intel/core.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index f3315f13f920..da38a16b2cbc 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -6768,12 +6768,17 @@ __init int intel_pmu_init(void) case INTEL_FAM6_EMERALDRAPIDS_X: x86_pmu.flags |=3D PMU_FL_MEM_LOADS_AUX; x86_pmu.extra_regs =3D intel_glc_extra_regs; + pr_cont("Sapphire Rapids events, "); + name =3D "sapphire_rapids"; fallthrough; case INTEL_FAM6_GRANITERAPIDS_X: case INTEL_FAM6_GRANITERAPIDS_D: intel_pmu_init_glc(NULL); - if (!x86_pmu.extra_regs) + if (!x86_pmu.extra_regs) { x86_pmu.extra_regs =3D intel_rwc_extra_regs; + pr_cont("Granite Rapids events, "); + name =3D "granite_rapids"; + } x86_pmu.pebs_ept =3D 1; x86_pmu.hw_config =3D hsw_hw_config; x86_pmu.get_event_constraints =3D glc_get_event_constraints; @@ -6784,8 +6789,6 @@ __init int intel_pmu_init(void) td_attr =3D glc_td_events_attrs; tsx_attr =3D glc_tsx_events_attrs; intel_pmu_pebs_data_source_skl(true); - pr_cont("Sapphire Rapids events, "); - name =3D "sapphire_rapids"; break; =20 case INTEL_FAM6_ALDERLAKE: --=20 2.35.1