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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown , Christophe Roullier , Marek Vasut CC: , , , , Subject: [PATCH v2 01/11] dt-bindings: net: add STM32MP13 compatible in documentation for stm32 Date: Fri, 26 Apr 2024 14:56:57 +0200 Message-ID: <20240426125707.585269-2-christophe.roullier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240426125707.585269-1-christophe.roullier@foss.st.com> References: <20240426125707.585269-1-christophe.roullier@foss.st.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-26_12,2024-04-26_02,2023-05-22_02 Content-Type: text/plain; charset="utf-8" New STM32 SOC have 2 GMACs instances. GMAC IP version is SNPS 4.20. Signed-off-by: Christophe Roullier --- .../devicetree/bindings/net/stm32-dwmac.yaml | 76 ++++++++++++++++--- 1 file changed, 67 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Docum= entation/devicetree/bindings/net/stm32-dwmac.yaml index f2714b5b6cf4..b901a432dfa9 100644 --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml @@ -22,18 +22,17 @@ select: enum: - st,stm32-dwmac - st,stm32mp1-dwmac + - st,stm32mp13-dwmac required: - compatible =20 -allOf: - - $ref: snps,dwmac.yaml# - properties: compatible: oneOf: - items: - enum: - st,stm32mp1-dwmac + - st,stm32mp13-dwmac - const: snps,dwmac-4.20a - items: - enum: @@ -74,13 +73,16 @@ properties: =20 st,syscon: $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should be phandle/offset pair. The phandle to the syscon node which + encompases the glue register, the offset of the control register and + the mask to set bitfield in control register items: - - items: + - minItems: 2 + items: - description: phandle to the syscon node which encompases the g= lue register - description: offset of the control register - description: - Should be phandle/offset pair. The phandle to the syscon node which - encompases the glue register, and the offset of the control register + - description: field to set mask in register =20 st,eth-clk-sel: description: @@ -105,12 +107,38 @@ required: =20 unevaluatedProperties: false =20 +allOf: + - $ref: snps,dwmac.yaml# + - if: + properties: + compatible: + contains: + enum: + - st,stm32mp1-dwmac + - st,stm32-dwmac + then: + properties: + st,syscon: + items: + maxItems: 2 + + - if: + properties: + compatible: + contains: + enum: + - st,stm32mp13-dwmac + then: + properties: + st,syscon: + items: + minItems: 3 + maxItems: 3 + examples: - | #include #include - #include - #include //Example 1 ethernet0: ethernet@5800a000 { compatible =3D "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; @@ -165,3 +193,33 @@ examples: snps,pbl =3D <8>; phy-mode =3D "mii"; }; + + - | + //Example 4 + ethernet3: ethernet@5800a000 { + compatible =3D "st,stm32mp13-dwmac", "snps,dwmac-4.20a"; + reg =3D <0x5800a000 0x2000>; + reg-names =3D "stmmaceth"; + interrupts-extended =3D <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, + <&exti 68 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "macirq", + "eth_wake_irq"; + clock-names =3D "stmmaceth", + "mac-clk-tx", + "mac-clk-rx", + "eth-ck", + "ptp_ref", + "ethstp"; + clocks =3D <&rcc ETHMAC>, + <&rcc ETHTX>, + <&rcc ETHRX>, + <&rcc ETHCK_K>, + <&rcc ETHPTP_K>, + <&rcc ETHSTP>; + st,syscon =3D <&syscfg 0x4 0xff0000>; + snps,mixed-burst; + snps,pbl =3D <2>; + snps,axi-config =3D <&stmmac_axi_config_1>; + snps,tso; + phy-mode =3D "rmii"; + }; --=20 2.25.1