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Thu, 25 Apr 2024 21:37:11 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Cc: eajames@linux.ibm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-fsi@lists.ozlabs.org, linux-spi@vger.kernel.org, linux-i2c@vger.kernel.org, lakshmiy@us.ibm.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au Subject: [PATCH v3 12/14] ARM: dts: aspeed: Add IBM P11 FSI devices Date: Thu, 25 Apr 2024 16:36:59 -0500 Message-Id: <20240425213701.655540-13-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240425213701.655540-1-eajames@linux.ibm.com> References: <20240425213701.655540-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: phit44tvZqZhe__obTAxeZuT_OSkU-yL X-Proofpoint-ORIG-GUID: phit44tvZqZhe__obTAxeZuT_OSkU-yL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-25_21,2024-04-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 mlxlogscore=999 phishscore=0 impostorscore=0 spamscore=0 priorityscore=1501 adultscore=0 suspectscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2404010000 definitions=main-2404250157 Content-Type: text/plain; charset="utf-8" Add the P11 FSI device tree for use in upcoming BMC systems. Unlike P10, there is no system with only two processors, so only the quad processor FSI layout is necessary. Signed-off-by: Eddie James --- .../arm/boot/dts/aspeed/ibm-power11-quad.dtsi | 1696 +++++++++++++++++ 1 file changed, 1696 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi diff --git a/arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi b/arch/arm/boot= /dts/aspeed/ibm-power11-quad.dtsi new file mode 100644 index 000000000000..c3a0ecf12aa0 --- /dev/null +++ b/arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi @@ -0,0 +1,1696 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 IBM Corp. + +&fsim0 { + status =3D "okay"; + + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam-reset-gpios =3D <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom@1000 { + compatible =3D "ibm,fsi2pib"; + reg =3D <0x1000 0x400>; + }; + + i2c@1800 { + compatible =3D "ibm,i2c-fsi"; + reg =3D <0x1800 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cfam0_i2c0: i2c-bus@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; /* OMI01 */ + }; + + cfam0_i2c1: i2c-bus@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; /* OMI23 */ + }; + + cfam0_i2c10: i2c-bus@a { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <10>; /* OP3A */ + }; + + cfam0_i2c11: i2c-bus@b { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <11>; /* OP3B */ + }; + + cfam0_i2c12: i2c-bus@c { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <12>; /* OP4A */ + }; + + cfam0_i2c13: i2c-bus@d { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <13>; /* OP4B */ + }; + + cfam0_i2c14: i2c-bus@e { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <14>; /* OP5A */ + }; + + cfam0_i2c15: i2c-bus@f { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <15>; /* OP5B */ + }; + }; + + fsi2spi@1c00 { + compatible =3D "ibm,fsi2spi"; + reg =3D <0x1c00 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cfam0_spi0: spi@0 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam0_spi1: spi@20 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x20>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam0_spi2: spi@40 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x40>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam0_spi3: spi@60 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x60>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible =3D "ibm,p9-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + fsi_occ0: occ { + compatible =3D "ibm,p10-occ"; + + occ-hwmon { + compatible =3D "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub0: hub@3400 { + compatible =3D "ibm,hub-fsi-controller"; + reg =3D <0x3400 0x400>; + #address-cells =3D <2>; + #size-cells =3D <0>; + }; + }; +}; + +&fsi_hub0 { + cfam@1,0 { + reg =3D <1 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <1>; + + scom@1000 { + compatible =3D "ibm,fsi2pib"; + reg =3D <0x1000 0x400>; + }; + + i2c@1800 { + compatible =3D "ibm,i2c-fsi"; + reg =3D <0x1800 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cfam1_i2c2: i2c-bus@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; /* OMI45 */ + }; + + cfam1_i2c3: i2c-bus@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; /* OMI67 */ + }; + + cfam1_i2c10: i2c-bus@a { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <10>; /* OP3A */ + }; + + cfam1_i2c11: i2c-bus@b { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <11>; /* OP3B */ + }; + + cfam1_i2c14: i2c-bus@e { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <14>; /* OP5A */ + }; + + cfam1_i2c15: i2c-bus@f { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <15>; /* OP5B */ + }; + + cfam1_i2c16: i2c-bus@10 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <16>; /* OP6A */ + }; + + cfam1_i2c17: i2c-bus@11 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <17>; /* OP6B */ + }; + }; + + fsi2spi@1c00 { + compatible =3D "ibm,fsi2spi"; + reg =3D <0x1c00 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cfam1_spi0: spi@0 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam1_spi1: spi@20 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x20>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam1_spi2: spi@40 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x40>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam1_spi3: spi@60 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x60>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible =3D "ibm,p9-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + fsi_occ1: occ { + compatible =3D "ibm,p10-occ"; + + occ-hwmon { + compatible =3D "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub1: hub@3400 { + compatible =3D "ibm,hub-fsi-controller"; + reg =3D <0x3400 0x400>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + no-scan-on-init; + }; + }; + + cfam@2,0 { + reg =3D <2 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <2>; + + scom@1000 { + compatible =3D "ibm,fsi2pib"; + reg =3D <0x1000 0x400>; + }; + + i2c@1800 { + compatible =3D "ibm,i2c-fsi"; + reg =3D <0x1800 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cfam2_i2c0: i2c-bus@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; /* OM01 */ + }; + + cfam2_i2c1: i2c-bus@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; /* OM23 */ + }; + + cfam2_i2c10: i2c-bus@a { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <10>; /* OP3A */ + }; + + cfam2_i2c11: i2c-bus@b { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <11>; /* OP3B */ + }; + + cfam2_i2c12: i2c-bus@c { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <12>; /* OP4A */ + }; + + cfam2_i2c13: i2c-bus@d { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <13>; /* OP4B */ + }; + + cfam2_i2c14: i2c-bus@e { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <14>; /* OP5A */ + }; + + cfam2_i2c15: i2c-bus@f { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <15>; /* OP5B */ + }; + }; + + fsi2spi@1c00 { + compatible =3D "ibm,fsi2spi"; + reg =3D <0x1c00 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cfam2_spi0: spi@0 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam2_spi1: spi@20 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x20>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam2_spi2: spi@40 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x40>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam2_spi3: spi@60 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x60>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible =3D "ibm,p9-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + fsi_occ2: occ { + compatible =3D "ibm,p10-occ"; + + occ-hwmon { + compatible =3D "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub2: hub@3400 { + compatible =3D "ibm,hub-fsi-controller"; + reg =3D <0x3400 0x400>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + no-scan-on-init; + }; + }; + + cfam@3,0 { + reg =3D <3 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <3>; + + scom@1000 { + compatible =3D "ibm,fsi2pib"; + reg =3D <0x1000 0x400>; + }; + + i2c@1800 { + compatible =3D "ibm,i2c-fsi"; + reg =3D <0x1800 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cfam3_i2c2: i2c-bus@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; /* OM45 */ + }; + + cfam3_i2c3: i2c-bus@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; /* OM67 */ + }; + + cfam3_i2c10: i2c-bus@a { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <10>; /* OP3A */ + }; + + cfam3_i2c11: i2c-bus@b { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <11>; /* OP3B */ + }; + + cfam3_i2c14: i2c-bus@e { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <14>; /* OP5A */ + }; + + cfam3_i2c15: i2c-bus@f { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <15>; /* OP5B */ + }; + + cfam3_i2c16: i2c-bus@10 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <16>; /* OP6A */ + }; + + cfam3_i2c17: i2c-bus@11 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <17>; /* OP6B */ + }; + }; + + fsi2spi@1c00 { + compatible =3D "ibm,fsi2spi"; + reg =3D <0x1c00 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cfam3_spi0: spi@0 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam3_spi1: spi@20 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x20>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam3_spi2: spi@40 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x40>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + + cfam3_spi3: spi@60 { + compatible =3D "ibm,p10-spi"; + reg =3D <0x60>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@0 { + compatible =3D "atmel,at25"; + reg =3D <0>; + size =3D <0x80000>; + address-width =3D <24>; + pagesize =3D <256>; + spi-max-frequency =3D <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible =3D "ibm,p9-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + fsi_occ3: occ { + compatible =3D "ibm,p10-occ"; + + occ-hwmon { + compatible =3D "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub3: hub@3400 { + compatible =3D "ibm,hub-fsi-controller"; + reg =3D <0x3400 0x400>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + no-scan-on-init; + }; + }; +}; + +&cfam0_i2c0 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom100: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo100: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam0_i2c1 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom101: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo101: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam0_i2c10 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom110: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo110: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam0_i2c11 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom111: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo111: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam0_i2c12 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom112: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo112: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam0_i2c13 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom113: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo113: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam0_i2c14 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom114: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo114: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam0_i2c15 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom115: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo115: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam1_i2c2 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom202: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo202: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam1_i2c3 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom203: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo203: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam1_i2c10 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom210: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo210: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam1_i2c11 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom211: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo211: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam1_i2c14 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom214: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo214: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam1_i2c15 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom215: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo215: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam1_i2c16 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom216: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo216: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam1_i2c17 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom217: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo217: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam2_i2c0 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom300: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo300: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam2_i2c1 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom301: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo301: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam2_i2c10 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom310: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo310: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam2_i2c11 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom311: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo311: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam2_i2c12 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom312: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo312: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam2_i2c13 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom313: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo313: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam2_i2c14 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom314: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo314: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam2_i2c15 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom315: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo315: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam3_i2c2 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom402: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo402: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam3_i2c3 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom403: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo403: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam3_i2c10 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom410: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo410: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam3_i2c11 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom411: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo411: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam3_i2c14 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom414: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo414: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam3_i2c15 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom415: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo415: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam3_i2c16 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom416: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo416: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +&cfam3_i2c17 { + fsi-i2cr@20 { + compatible =3D "ibm,i2cr-fsi-master"; + reg =3D <0x20>; + #address-cells =3D <2>; + #size-cells =3D <0>; + + cfam@0,0 { + reg =3D <0 0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + chip-id =3D <0>; + + scom417: scom@1000 { + compatible =3D "ibm,i2cr-scom"; + reg =3D <0x1000 0x400>; + }; + + sbefifo417: sbefifo@2400 { + compatible =3D "ibm,odyssey-sbefifo"; + reg =3D <0x2400 0x400>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; +}; + +/* Legacy OCC numbering (to get rid of when userspace is fixed) */ +&fsi_occ0 { + reg =3D <1>; +}; + +&fsi_occ1 { + reg =3D <2>; +}; + +&fsi_occ2 { + reg =3D <3>; +}; + +&fsi_occ3 { + reg =3D <4>; +}; + +/ { + aliases { + i2c100 =3D &cfam0_i2c0; + i2c101 =3D &cfam0_i2c1; + i2c110 =3D &cfam0_i2c10; + i2c111 =3D &cfam0_i2c11; + i2c112 =3D &cfam0_i2c12; + i2c113 =3D &cfam0_i2c13; + i2c114 =3D &cfam0_i2c14; + i2c115 =3D &cfam0_i2c15; + i2c202 =3D &cfam1_i2c2; + i2c203 =3D &cfam1_i2c3; + i2c210 =3D &cfam1_i2c10; + i2c211 =3D &cfam1_i2c11; + i2c214 =3D &cfam1_i2c14; + i2c215 =3D &cfam1_i2c15; + i2c216 =3D &cfam1_i2c16; + i2c217 =3D &cfam1_i2c17; + i2c300 =3D &cfam2_i2c0; + i2c301 =3D &cfam2_i2c1; + i2c310 =3D &cfam2_i2c10; + i2c311 =3D &cfam2_i2c11; + i2c312 =3D &cfam2_i2c12; + i2c313 =3D &cfam2_i2c13; + i2c314 =3D &cfam2_i2c14; + i2c315 =3D &cfam2_i2c15; + i2c402 =3D &cfam3_i2c2; + i2c403 =3D &cfam3_i2c3; + i2c410 =3D &cfam3_i2c10; + i2c411 =3D &cfam3_i2c11; + i2c414 =3D &cfam3_i2c14; + i2c415 =3D &cfam3_i2c15; + i2c416 =3D &cfam3_i2c16; + i2c417 =3D &cfam3_i2c17; + + sbefifo100 =3D &sbefifo100; + sbefifo101 =3D &sbefifo101; + sbefifo110 =3D &sbefifo110; + sbefifo111 =3D &sbefifo111; + sbefifo112 =3D &sbefifo112; + sbefifo113 =3D &sbefifo113; + sbefifo114 =3D &sbefifo114; + sbefifo115 =3D &sbefifo115; + sbefifo202 =3D &sbefifo202; + sbefifo203 =3D &sbefifo203; + sbefifo210 =3D &sbefifo210; + sbefifo211 =3D &sbefifo211; + sbefifo214 =3D &sbefifo214; + sbefifo215 =3D &sbefifo215; + sbefifo216 =3D &sbefifo216; + sbefifo217 =3D &sbefifo217; + sbefifo300 =3D &sbefifo300; + sbefifo301 =3D &sbefifo301; + sbefifo310 =3D &sbefifo310; + sbefifo311 =3D &sbefifo311; + sbefifo312 =3D &sbefifo312; + sbefifo313 =3D &sbefifo313; + sbefifo314 =3D &sbefifo314; + sbefifo315 =3D &sbefifo315; + sbefifo402 =3D &sbefifo402; + sbefifo403 =3D &sbefifo403; + sbefifo410 =3D &sbefifo410; + sbefifo411 =3D &sbefifo411; + sbefifo414 =3D &sbefifo414; + sbefifo415 =3D &sbefifo415; + sbefifo416 =3D &sbefifo416; + sbefifo417 =3D &sbefifo417; + + scom100 =3D &scom100; + scom101 =3D &scom101; + scom110 =3D &scom110; + scom111 =3D &scom111; + scom112 =3D &scom112; + scom113 =3D &scom113; + scom114 =3D &scom114; + scom115 =3D &scom115; + scom202 =3D &scom202; + scom203 =3D &scom203; + scom210 =3D &scom210; + scom211 =3D &scom211; + scom214 =3D &scom214; + scom215 =3D &scom215; + scom216 =3D &scom216; + scom217 =3D &scom217; + scom300 =3D &scom300; + scom301 =3D &scom301; + scom310 =3D &scom310; + scom311 =3D &scom311; + scom312 =3D &scom312; + scom313 =3D &scom313; + scom314 =3D &scom314; + scom315 =3D &scom315; + scom402 =3D &scom402; + scom403 =3D &scom403; + scom410 =3D &scom410; + scom411 =3D &scom411; + scom414 =3D &scom414; + scom415 =3D &scom415; + scom416 =3D &scom416; + scom417 =3D &scom417; + + spi10 =3D &cfam0_spi0; + spi11 =3D &cfam0_spi1; + spi12 =3D &cfam0_spi2; + spi13 =3D &cfam0_spi3; + spi20 =3D &cfam1_spi0; + spi21 =3D &cfam1_spi1; + spi22 =3D &cfam1_spi2; + spi23 =3D &cfam1_spi3; + spi30 =3D &cfam2_spi0; + spi31 =3D &cfam2_spi1; + spi32 =3D &cfam2_spi2; + spi33 =3D &cfam2_spi3; + spi40 =3D &cfam3_spi0; + spi41 =3D &cfam3_spi1; + spi42 =3D &cfam3_spi2; + spi43 =3D &cfam3_spi3; + }; +}; --=20 2.39.3