From nobody Sun May 19 15:29:24 2024 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7583155748; Thu, 25 Apr 2024 21:13:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714079586; cv=none; b=GqekYk4qp6FPW/ARK/v/gA9J2V4rc9Sr0kJJfEwMqn/ag5kQDzpev4526d6GerejoomXn2zNCoTnQkUZEbtIGCY3qDH8KDes0YSp5+6wcFwBWf4TeD5wQQZ285k86Kc18moYEKVk7wFWNG50xcjEtJAY8xYuvHJuN21m4cYMdbo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714079586; c=relaxed/simple; bh=6oazoK9h8u4QyPD308lPpaj+qMMaE7o6mRVIx7+utRo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Q4/rkUtxl3gTdLlkZIONMBQEEjr81VCw9D1hdx9yDSwAhxDbgVcPC2QfuOahP71SO+3CTAx8QZvGYahISGTQoDWUb9QymlHjb8pwrPAmUOWy3G0bN0ovGijZ5TUi3GxqoFaP/ahfoIH4Aybo+x5xrczAc6PhIEHBsGkYFOMxH0Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=hGZILYqc; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="hGZILYqc" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43PLCfXm026528; Thu, 25 Apr 2024 16:12:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1714079561; bh=7vvuuLhzWMQA4S6tQ0HDx1Vnj2RKKlHTKCWQaIP/fwM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hGZILYqcLdhKDH0RGsh/pNoppd8Ve9TSwmTD1HszMNuILaT4vz8HNm5aZKPUX95Za h4y9DpdMtkANEOYoRhbyNoTxjILOS7uqAJOuHeDIcDL42TyIX57Z6hM0BQs9y+JeBa Q+Is1daMOH4x3tRMux4VX77mnp3WSm4hIYrNuhTQ= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43PLCfRf071321 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 25 Apr 2024 16:12:41 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 25 Apr 2024 16:12:41 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 25 Apr 2024 16:12:41 -0500 Received: from a0497641-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (a0497641-hp-z2-tower-g9-workstation-desktop-pc.dhcp.ti.com [172.24.227.36]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43PLCYHD038718; Thu, 25 Apr 2024 16:12:38 -0500 From: Neha Malcom Francis To: , , , , CC: , , , , , Subject: [PATCH v4 1/6] arm64: dts: ti: k3-j721e-mcu: Add the WKUP ESM instance Date: Fri, 26 Apr 2024 02:42:28 +0530 Message-ID: <20240425211233.2006233-2-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425211233.2006233-1-n-francis@ti.com> References: <20240425211233.2006233-1-n-francis@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Add the WKUP ESM instance for J721E. It has three instances in total, one in the MAIN domain (main_esm) and two in the MCU-WKUP domain (mcu_esm and wkup_esm). Signed-off-by: Neha Malcom Francis Reviewed-by: Udit Kumar =20 --- Changes since v2: - no changes arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 4618b697fbc4..3044e08f6858 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -689,4 +689,10 @@ mcu_esm: esm@40800000 { ti,esm-pins =3D <95>; bootph-pre-ram; }; + + wkup_esm: esm@42080000 { + compatible =3D "ti,j721e-esm"; + reg =3D <0x00 0x42080000 0x00 0x1000>; + status =3D "disabled"; + }; }; --=20 2.34.1 From nobody Sun May 19 15:29:24 2024 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2D23155A55; Thu, 25 Apr 2024 21:13:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714079589; cv=none; b=u7t4DHK7w8Q7s99HuQxK2FdShpzPtRX3+aQplXxBj/VCXsQSyTOFr1prJoespBpfoRbpvtY9qX4taRaEaFOrYf4SjHyqDO6ib3hus+yGBZn2HLVJp5jzQilPnz9/ZZ6FQ6hN10NVe1lSBNwHTC90t6LwF6UT/9gN9t6mgL+CHn8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714079589; c=relaxed/simple; bh=PJorbk8UfHx9OHUowPLKp3FPT/F3igaJ9JiDvkFhAoA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=mLlMdmWnNSJB4dW0XbxBSleu8IgdqFj197LSI8XtyK7vbAG4a6q7I/KhT6RrpAfOQCLeysMbC4G+7WzkNVSAz0euY6nwzaoFfr3820PNhtc2qjVbIQd3/0Z2vj2tpvp+Vj0WuqtGFkxLhmxfR8VoE0NiHUgg9IhJLtYQvLdIHoY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=tqTtWCYm; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="tqTtWCYm" Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43PLCjxk026544; Thu, 25 Apr 2024 16:12:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1714079565; bh=B+ze190XEhuBE/aOUcoRakFhFQeYQvRXXay8abf33sg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tqTtWCYmIv/z0MySVzsGzAWIujdkYENAh6+o9fpY46UjeORNUWjaUt0/pUavyiwJi peONxY0uq7Ev6QsyMEhJ/szZ0gQzSkt48xFhlXB3wWzPBnKw/sPgALCJE/b6pH/KC/ XAmKxrEEuqcB2ijALhSWzxi1WDZ4UF4uhtz+Gjrk= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43PLCjhe031195 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 25 Apr 2024 16:12:45 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 25 Apr 2024 16:12:44 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 25 Apr 2024 16:12:44 -0500 Received: from a0497641-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (a0497641-hp-z2-tower-g9-workstation-desktop-pc.dhcp.ti.com [172.24.227.36]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43PLCYHE038718; Thu, 25 Apr 2024 16:12:41 -0500 From: Neha Malcom Francis To: , , , , CC: , , , , , Subject: [PATCH v4 2/6] arm64: dts: ti: k3-j721e-mcu: Add the MCU domain watchdog instances Date: Fri, 26 Apr 2024 02:42:29 +0530 Message-ID: <20240425211233.2006233-3-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425211233.2006233-1-n-francis@ti.com> References: <20240425211233.2006233-1-n-francis@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" There are 2 watchdog instances in the MCU domain. These instances are coupled with the MCU domain R55 instances. Reserve them as they are not used by A72. Signed-off-by: Neha Malcom Francis Reviewed-by: Udit Kumar --- Changes since v2: - no changes .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 3044e08f6858..0dc84c9f8c4a 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -695,4 +695,30 @@ wkup_esm: esm@42080000 { reg =3D <0x00 0x42080000 0x00 0x1000>; status =3D "disabled"; }; + + /* + * The 2 RTI instances are couple with MCU R5Fs so keeping them + * reserved as these will be used by their respective firmware + */ + mcu_watchdog0: watchdog@40600000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x40600000 0x00 0x100>; + clocks =3D <&k3_clks 262 1>; + power-domains =3D <&k3_pds 262 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 262 1>; + assigned-clock-parents =3D <&k3_clks 262 5>; + /* reserved for MCU_R5F0_0 */ + status =3D "reserved"; + }; + + mcu_watchdog1: watchdog@40610000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x40610000 0x00 0x100>; + clocks =3D <&k3_clks 263 1>; + power-domains =3D <&k3_pds 263 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 263 1>; + assigned-clock-parents =3D <&k3_clks 263 5>; + /* reserved for MCU_R5F0_1 */ + status =3D "reserved"; + }; }; --=20 2.34.1 From nobody Sun May 19 15:29:24 2024 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BA3215250D; Thu, 25 Apr 2024 21:12:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714079582; cv=none; b=STLRhVcqBJ4h5FY/6zOLTzQLosoe+19Z0qEsQNg4S/Y8QyfhJ2u/yx25lBlEVPrEexbhcZuQmnCijjwdZtP3JYNUaWTU2ehODqnx+htKLaC0SqUYTVmyJ/LLkEOzrgX2IbgUHpl5LI6x2VrwIYrfC1D9EcpGThlrmvrWfeIkQcA= ARC-Message-Signature: i=1; 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Thu, 25 Apr 2024 16:12:48 -0500 Received: from a0497641-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (a0497641-hp-z2-tower-g9-workstation-desktop-pc.dhcp.ti.com [172.24.227.36]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43PLCYHF038718; Thu, 25 Apr 2024 16:12:45 -0500 From: Neha Malcom Francis To: , , , , CC: , , , , , Subject: [PATCH v4 3/6] arm64: dts: ti: k3-j721e-main: Add the MAIN domain watchdog instances Date: Fri, 26 Apr 2024 02:42:30 +0530 Message-ID: <20240425211233.2006233-4-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425211233.2006233-1-n-francis@ti.com> References: <20240425211233.2006233-1-n-francis@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" There are 10 watchdog instances in the MAIN domain: * one each for the 2 A72 cores * one for the GPU core * one for the C7x core * one each for the 2 C66x cores * one each for the 4 R5F cores Currently, the devicetree only describes watchdog instances for the A72 cores and enables them. Describe the remaining but reserve them as they will be used by their respective firmware. Signed-off-by: Neha Malcom Francis Reviewed-by: Udit Kumar --- Changes since v2: - no changes arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 93 +++++++++++++++++++++++ 1 file changed, 93 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j721e-main.dtsi index c7eafbc862f9..0dd5005b34aa 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -2157,6 +2157,99 @@ watchdog1: watchdog@2210000 { assigned-clock-parents =3D <&k3_clks 253 5>; }; =20 + /* + * The following RTI instances are coupled with MCU R5Fs, c7x and + * GPU so keeping them reserved as these will be used by their + * respective firmware + */ + watchdog15: watchdog@22f0000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x22f0000 0x00 0x100>; + clocks =3D <&k3_clks 257 1>; + power-domains =3D <&k3_pds 257 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 257 1>; + assigned-clock-parents =3D <&k3_clks 257 5>; + /* reserved for GPU */ + status =3D "reserved"; + }; + + watchdog16: watchdog@2300000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x2300000 0x00 0x100>; + clocks =3D <&k3_clks 256 1>; + power-domains =3D <&k3_pds 256 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 256 1>; + assigned-clock-parents =3D <&k3_clks 256 5>; + /* reserved for C7X */ + status =3D "reserved"; + }; + + watchdog24: watchdog@2380000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x2380000 0x00 0x100>; + clocks =3D <&k3_clks 254 1>; + power-domains =3D <&k3_pds 254 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 254 1>; + assigned-clock-parents =3D <&k3_clks 254 5>; + /* reserved for C66X_0 */ + status =3D "reserved"; + }; + + watchdog25: watchdog@2390000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x2390000 0x00 0x100>; + clocks =3D <&k3_clks 255 1>; + power-domains =3D <&k3_pds 255 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 255 1>; + assigned-clock-parents =3D <&k3_clks 255 5>; + /* reserved for C66X_1 */ + status =3D "reserved"; + }; + + watchdog28: watchdog@23c0000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x23c0000 0x00 0x100>; + clocks =3D <&k3_clks 258 1>; + power-domains =3D <&k3_pds 258 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 258 1>; + assigned-clock-parents =3D <&k3_clks 258 5>; + /* reserved for MAIN_R5F0_0 */ + status =3D "reserved"; + }; + + watchdog29: watchdog@23d0000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x23d0000 0x00 0x100>; + clocks =3D <&k3_clks 259 1>; + power-domains =3D <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 259 1>; + assigned-clock-parents =3D <&k3_clks 259 5>; + /* reserved for MAIN_R5F0_1 */ + status =3D "reserved"; + }; + + watchdog30: watchdog@23e0000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x23e0000 0x00 0x100>; + clocks =3D <&k3_clks 260 1>; + power-domains =3D <&k3_pds 260 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 260 1>; + assigned-clock-parents =3D <&k3_clks 260 5>; + /* reserved for MAIN_R5F1_0 */ + status =3D "reserved"; + }; + + watchdog31: watchdog@23f0000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x23f0000 0x00 0x100>; + clocks =3D <&k3_clks 261 1>; + power-domains =3D <&k3_pds 261 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 261 1>; + assigned-clock-parents =3D <&k3_clks 261 5>; + /* reserved for MAIN_R5F1_1 */ + status =3D "reserved"; + }; + main_r5fss0: r5fss@5c00000 { compatible =3D "ti,j721e-r5fss"; ti,cluster-mode =3D <1>; --=20 2.34.1 From nobody Sun May 19 15:29:24 2024 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80B8C1553B9; Thu, 25 Apr 2024 21:13:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714079584; cv=none; b=sLzDkjurhHLl5l+tLEJR10qJr7P0mFxqjGKrrYYmgITYDvWo8jwXDM+mifg6fuGjeUsdQ4BM8K/0JIgrEMh66/PkUgVLvEeTz+d9Hi6Q/AUYZw6aTpssnTiKnxHUftd6be25Acluqv7BEmTEVTBSLRCtBj4eCyp+CpY51O3e76A= ARC-Message-Signature: i=1; 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Thu, 25 Apr 2024 16:12:51 -0500 Received: from a0497641-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (a0497641-hp-z2-tower-g9-workstation-desktop-pc.dhcp.ti.com [172.24.227.36]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43PLCYHG038718; Thu, 25 Apr 2024 16:12:48 -0500 From: Neha Malcom Francis To: , , , , CC: , , , , , Subject: [PATCH v4 4/6] arm64: dts: ti: k3-j7200-main: Add the MAIN domain watchdog instances Date: Fri, 26 Apr 2024 02:42:31 +0530 Message-ID: <20240425211233.2006233-5-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425211233.2006233-1-n-francis@ti.com> References: <20240425211233.2006233-1-n-francis@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" There are 4 watchdog instances in the MAIN domain: * one each for the 2 A72 cores * one each for the 2 R5F cores Currently, the devicetree only describes watchdog instances for the A72 cores and enables them. Describe the remaining but reserve them as they will be used by their respective firmware. Signed-off-by: Neha Malcom Francis Reviewed-by: Udit Kumar --- Changes since v2: - no changes arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 27 +++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j7200-main.dtsi index 657f9cc9f4ea..b24a6333563a 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -1254,6 +1254,33 @@ watchdog1: watchdog@2210000 { assigned-clock-parents =3D <&k3_clks 253 5>; }; =20 + /* + * The following RTI instances are coupled with MCU R5Fs so + * keeping them reserved as these will be used by their respective + * firmware + */ + watchdog28: watchdog@23c0000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x23c0000 0x00 0x100>; + clocks =3D <&k3_clks 258 1>; + power-domains =3D <&k3_pds 258 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 258 1>; + assigned-clock-parents =3D <&k3_clks 258 5>; + /* reserved for MAIN_R5F0_0 */ + status =3D "reserved"; + }; + + watchdog29: watchdog@23d0000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x23d0000 0x00 0x100>; + clocks =3D <&k3_clks 259 1>; + power-domains =3D <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 259 1>; + assigned-clock-parents =3D <&k3_clks 259 5>; + /* reserved for MAIN_R5F0_1 */ + status =3D "reserved"; + }; + main_timer0: timer@2400000 { compatible =3D "ti,am654-timer"; reg =3D <0x00 0x2400000 0x00 0x400>; --=20 2.34.1 From nobody Sun May 19 15:29:24 2024 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99448155A52; Thu, 25 Apr 2024 21:13:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714079589; cv=none; b=g8UDz6+vtxFUS1wegmPdPzbU+akay2BMBfPJpWj6Wy3HDbqdTEVV+Zd/4DESHPbbSy9a9jt1RCrPqocpz711Vgym6Nh3FK+cQyy3YGSw1NwgDDm4tsYF8wU9b5ymM1S07Hnrnk02EepZfr3MAumv0IzmXPoFXHVOgrP3kFLvPGI= ARC-Message-Signature: i=1; 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Thu, 25 Apr 2024 16:12:54 -0500 Received: from a0497641-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (a0497641-hp-z2-tower-g9-workstation-desktop-pc.dhcp.ti.com [172.24.227.36]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43PLCYHH038718; Thu, 25 Apr 2024 16:12:52 -0500 From: Neha Malcom Francis To: , , , , CC: , , , , , Subject: [PATCH v4 5/6] arm64: dts: ti: k3-j7200-mcu: Add the MCU domain watchdog instances Date: Fri, 26 Apr 2024 02:42:32 +0530 Message-ID: <20240425211233.2006233-6-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425211233.2006233-1-n-francis@ti.com> References: <20240425211233.2006233-1-n-francis@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" There are 2 watchdog instances in the MCU domain. These instances are coupled with the MCU domain R55 instances. Reserve them as they are not used by A72. Signed-off-by: Neha Malcom Francis Reviewed-by: Udit Kumar --- Changes since v3: - no change .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 7cf21c99956e..f6ca4ffb5ee1 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -686,4 +686,30 @@ mcu_mcan1: can@40568000 { bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; status =3D "disabled"; }; + + /* + * The 2 RTI instances are couple with MCU R5Fs so keeping them + * reserved as these will be used by their respective firmware + */ + mcu_watchdog0: watchdog@40600000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x40600000 0x00 0x100>; + clocks =3D <&k3_clks 262 1>; + power-domains =3D <&k3_pds 262 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 262 1>; + assigned-clock-parents =3D <&k3_clks 262 5>; + /* reserved for MCU_R5F0_0 */ + status =3D "reserved"; + }; + + mcu_watchdog1: watchdog@40610000 { + compatible =3D "ti,j7-rti-wdt"; + reg =3D <0x00 0x40610000 0x00 0x100>; + clocks =3D <&k3_clks 263 1>; + power-domains =3D <&k3_pds 263 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 263 1>; + assigned-clock-parents =3D <&k3_clks 263 5>; + /* reserved for MCU_R5F0_1 */ + status =3D "reserved"; + }; }; --=20 2.34.1 From nobody Sun May 19 15:29:24 2024 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 06572153821; Thu, 25 Apr 2024 21:13:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.248 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714079600; cv=none; b=r962CDKLMC2NASYRcNj1S/xDaGn1zLJx52CNXhOmEHnwiesfxGGCBTgvaUveFN3aJs2hg0gRebjErJEXQvA+JWl72RG+yq61dzJ1NOQqdP+4WoGQ6d5hFCvy8geTF/yGldlh859IDVgSXpkr++hBqdbZ/sc4upToNOUjp2DbUHI= ARC-Message-Signature: i=1; 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Thu, 25 Apr 2024 16:12:58 -0500 Received: from a0497641-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (a0497641-hp-z2-tower-g9-workstation-desktop-pc.dhcp.ti.com [172.24.227.36]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43PLCYHI038718; Thu, 25 Apr 2024 16:12:55 -0500 From: Neha Malcom Francis To: , , , , CC: , , , , , Subject: [PATCH v4 6/6] arm64: dts: ti: k3-j7*-main: Add bootph-pre-ram to main_esm Date: Fri, 26 Apr 2024 02:42:33 +0530 Message-ID: <20240425211233.2006233-7-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425211233.2006233-1-n-francis@ti.com> References: <20240425211233.2006233-1-n-francis@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Add bootph-pre-ram to main_esm as R5 bootloader configures MAIN domain watchdog interrupts to generate the ESM pin events. Signed-off-by: Neha Malcom Francis --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 1 + arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j7200-main.dtsi index b24a6333563a..30ec36ce4ce7 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -1565,5 +1565,6 @@ main_esm: esm@700000 { compatible =3D "ti,j721e-esm"; reg =3D <0x0 0x700000 0x0 0x1000>; ti,esm-pins =3D <656>, <657>; + bootph-pre-ram; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j721e-main.dtsi index 0dd5005b34aa..a5dc1e1bc1a9 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -2957,5 +2957,6 @@ main_esm: esm@700000 { compatible =3D "ti,j721e-esm"; reg =3D <0x0 0x700000 0x0 0x1000>; ti,esm-pins =3D <344>, <345>; + bootph-pre-ram; }; }; --=20 2.34.1