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[92.238.24.70]) by smtp.gmail.com with ESMTPSA id t13-20020a05600c450d00b00417f700eaeasm24543125wmo.22.2024.04.24.09.28.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 09:28:11 -0700 (PDT) From: Colin Ian King To: Harry Wentland , Leo Li , Rodrigo Siqueira , =?UTF-8?q?Christian=20K=C3=B6nig?= , Xinhui.Pan@amd.com, David Airlie , Daniel Vetter , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH][next] drm/amd/display: Fix spelling various spelling mistakes Date: Wed, 24 Apr 2024 17:28:09 +0100 Message-Id: <20240424162809.3948457-1-colin.i.king@gmail.com> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable There are various spelling mistakes in dml2_printf messages, fix them. Signed-off-by: Colin Ian King Reviewed-by: Harry Wentland --- .../dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 6 +++--- .../display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_c= ore_dcn4_calcs.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/= dml2_core_dcn4_calcs.c index 846b0ae48596..2dea5965d02f 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn= 4_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn= 4_calcs.c @@ -5566,7 +5566,7 @@ static bool CalculatePrefetchSchedule(struct dml2_cor= e_internal_scratch *scratch dml2_printf("DML: Tvm: %fus - time to fetch vm\n", s->TimeForFetchingVM); dml2_printf("DML: Tr0: %fus - time to fetch first row of data pagetables= \n", s->TimeForFetchingRowInVBlank); dml2_printf("DML: Tsw: %fus =3D time to fetch enough pixel data and curs= or data to feed the scalers init position and detile\n", (double)s->LinesTo= RequestPrefetchPixelData * s->LineTime); - dml2_printf("DML: To: %fus - time for propogation from scaler to optc\n"= , (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (double)p->myPipe= ->HTotal)) * s->LineTime); + dml2_printf("DML: To: %fus - time for propagation from scaler to optc\n"= , (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (double)p->myPipe= ->HTotal)) * s->LineTime); dml2_printf("DML: Tvstartup - TSetup - Tcalc - TWait - Tpre - To > 0\n"); dml2_printf("DML: Tslack(pre): %fus - time left over in schedule\n", p->= VStartup * s->LineTime - s->TimeForFetchingVM - 2 * s->TimeForFetchingRowIn= VBlank - (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (double)p-= >myPipe->HTotal)) * s->LineTime - p->TWait - p->TCalc - *p->TSetup); dml2_printf("DML: row_bytes =3D dpte_row_bytes (per_pipe) =3D PixelPTEBy= tesPerRow =3D : %u\n", p->PixelPTEBytesPerRow); @@ -7825,7 +7825,7 @@ static bool dml_core_mode_support(struct dml2_core_ca= lcs_mode_support_ex *in_out dml2_printf("DML::%s: mode_lib->ms.FabricClock =3D %f\n", __func__, mode_= lib->ms.FabricClock); dml2_printf("DML::%s: mode_lib->ms.uclk_freq_mhz =3D %f\n", __func__, mod= e_lib->ms.uclk_freq_mhz); dml2_printf("DML::%s: max_urgent_latency_us =3D %f\n", __func__, mode_lib= ->ms.support.max_urgent_latency_us); - dml2_printf("DML::%s: urgent latency tolarance =3D %f\n", __func__, ((mod= e_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kbytes) * = 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes))); + dml2_printf("DML::%s: urgent latency tolerance =3D %f\n", __func__, ((mod= e_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kbytes) * = 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes))); dml2_printf("DML::%s: ROBSupport =3D %u\n", __func__, mode_lib->ms.suppor= t.ROBSupport); #endif =20 @@ -10603,7 +10603,7 @@ static bool dml_core_mode_programming(struct dml2_c= ore_calcs_mode_programming_ex if (display_cfg->plane_descriptors[k].immediate_flip && mode_lib->mp.I= mmediateFlipSupportedForPipe[k] =3D=3D false) { mode_lib->mp.ImmediateFlipSupported =3D false; #ifdef __DML_VBA_DEBUG__ - dml2_printf("DML::%s: Pipe %0d not supporing iflip!\n", __func__, k); + dml2_printf("DML::%s: Pipe %0d not supporting iflip!\n", __func__, k); #endif } } diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_c= ore_shared.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2= _core_shared.c index 0ef77a89d984..d1d4fe062d4e 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_sha= red.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_sha= red.c @@ -2023,7 +2023,7 @@ bool dml2_core_shared_mode_support(struct dml2_core_c= alcs_mode_support_ex *in_ou dml2_printf("DML::%s: mode_lib->ms.FabricClock =3D %f\n", __func__, mode_= lib->ms.FabricClock); dml2_printf("DML::%s: mode_lib->ms.uclk_freq_mhz =3D %f\n", __func__, mod= e_lib->ms.uclk_freq_mhz); dml2_printf("DML::%s: max_urgent_latency_us =3D %f\n", __func__, mode_lib= ->ms.support.max_urgent_latency_us); - dml2_printf("DML::%s: urgent latency tolarance =3D %f\n", __func__, ((mod= e_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kbytes) * = 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes))); + dml2_printf("DML::%s: urgent latency tolerance =3D %f\n", __func__, ((mod= e_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kbytes) * = 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes))); dml2_printf("DML::%s: ROBSupport =3D %u\n", __func__, mode_lib->ms.suppor= t.ROBSupport); #endif =20 @@ -8174,7 +8174,7 @@ static bool CalculatePrefetchSchedule(struct dml2_cor= e_internal_scratch *scratch dml2_printf("DML: Tvm: %fus - time to fetch vm\n", s->TimeForFetchingVM); dml2_printf("DML: Tr0: %fus - time to fetch first row of data pagetables= \n", s->TimeForFetchingRowInVBlank); dml2_printf("DML: Tsw: %fus =3D time to fetch enough pixel data and curs= or data to feed the scalers init position and detile\n", (double)s->LinesTo= RequestPrefetchPixelData * s->LineTime); - dml2_printf("DML: To: %fus - time for propogation from scaler to optc\n"= , (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (double)p->myPipe= ->HTotal)) * s->LineTime); + dml2_printf("DML: To: %fus - time for propagation from scaler to optc\n"= , (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (double)p->myPipe= ->HTotal)) * s->LineTime); dml2_printf("DML: Tvstartup - TSetup - Tcalc - TWait - Tpre - To > 0\n"); dml2_printf("DML: Tslack(pre): %fus - time left over in schedule\n", p->= VStartup * s->LineTime - s->TimeForFetchingVM - 2 * s->TimeForFetchingRowIn= VBlank - (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (double)p-= >myPipe->HTotal)) * s->LineTime - p->TWait - p->TCalc - *p->TSetup); dml2_printf("DML: row_bytes =3D dpte_row_bytes (per_pipe) =3D PixelPTEBy= tesPerRow =3D : %u\n", p->PixelPTEBytesPerRow); @@ -10994,7 +10994,7 @@ bool dml2_core_shared_mode_programming(struct dml2_= core_calcs_mode_programming_e if (display_cfg->plane_descriptors[k].immediate_flip && mode_lib->mp.I= mmediateFlipSupportedForPipe[k] =3D=3D false) { mode_lib->mp.ImmediateFlipSupported =3D false; #ifdef __DML_VBA_DEBUG__ - dml2_printf("DML::%s: Pipe %0d not supporing iflip!\n", __func__, k); + dml2_printf("DML::%s: Pipe %0d not supporting iflip!\n", __func__, k); #endif } } --=20 2.39.2