From nobody Tue Feb 10 10:54:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66B7415921D; Wed, 24 Apr 2024 10:28:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713954525; cv=none; b=hfM6LR+zGq5z5wM7H9g08Oz/SJOEr2BgoS15/uk02OBLl32RWeh5M4205rPpevpsdGB5tHn03FQd+is+UXo5fPCmdlCvQ0nI3kWB0HrzbCoZti/I/IlRnBeUGAtEEsw+m8H9v7dUwVuE1UlSLZTa1eeSEyyTvQlMBrSZFmhJecU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713954525; c=relaxed/simple; bh=8ajJMJwApKqgCf9f89bVvjuzXAt5v7XkRoPUav8YUV4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hc2EQfj0Zi9fLzLVvAn1VO4zqwRa5z2YpWVP5LbP9X3eQX2STrnMJ7zngc6+ndBPJIbjBBRKC2yeXrIYZGvbX62t5/SAflkpirxABJ62PsiHHEMK07L1l8NFlujpdHf4SUg2UO5HV9P52/rQV0snyTkGtKriTC31rPiNcTa49+k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YMbrlT3q; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YMbrlT3q" Received: by smtp.kernel.org (Postfix) with ESMTPS id 10352C32781; Wed, 24 Apr 2024 10:28:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1713954525; bh=8ajJMJwApKqgCf9f89bVvjuzXAt5v7XkRoPUav8YUV4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=YMbrlT3q971srEC/EdzXQzYg9th7O/dE3TBkPX+5C9rd86TwGXVoGLBlzixIqn32q gqOFkCj/BOHOUaIWbP5Bpb4Wb6Wc9C4iJyztdGYGbigDAqNU63SzWRH/IMdfVcrlcd p4fdK0b2XnSJEmO5V5Eg9FKu+OLwbhJiFolk3SfNlTlylYcVcsn68USIYn3mqgzRvv VSotiIsqhReg5aL8SgoZoetk+PRnQWcaYSmaHVr4mjqXssEe6cUuR/A2YeQH3k35F/ jcoHjcduJZlSNl4FAPAYSwpUjJdSqn+u6Tl2BS0B77ZVJlwsO4n7KYujFAQfzf2nx/ VUza5eFYjAORw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4DE9C10F15; Wed, 24 Apr 2024 10:28:44 +0000 (UTC) From: Kelvin Zhang via B4 Relay Date: Wed, 24 Apr 2024 18:28:34 +0800 Subject: [PATCH v4 1/2] pwm: meson: Add support for Amlogic S4 PWM Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240424-s4-pwm-v4-1-ee22effd40d0@amlogic.com> References: <20240424-s4-pwm-v4-0-ee22effd40d0@amlogic.com> In-Reply-To: <20240424-s4-pwm-v4-0-ee22effd40d0@amlogic.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Kelvin Zhang , Junyi Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1713954523; l=2139; i=kelvin.zhang@amlogic.com; s=20240329; h=from:subject:message-id; bh=gtMEBe84ZprBZCQ2WIxZzSC+jfy6SdQC7eTQHo6OrP0=; b=2QReknnu4j0rhx43sc1H5ezdFAmc2B0Conf7r5ceTUUiA7AhpLj1EGHL8ako++gaojevQyKMp /bUmR33rPpQBpTp6b3G0VADO0q5tb3bJ3U47m/++XxFOOnLyRO0dKc6 X-Developer-Key: i=kelvin.zhang@amlogic.com; a=ed25519; pk=pgnle7HTNvnNTcOoGejvtTC7BJT30HUNXfMHRRXSylI= X-Endpoint-Received: by B4 Relay for kelvin.zhang@amlogic.com/20240329 with auth_id=148 X-Original-From: Kelvin Zhang Reply-To: kelvin.zhang@amlogic.com From: Junyi Zhao This patch adds support for Amlogic S4 PWM. Signed-off-by: Junyi Zhao Signed-off-by: Kelvin Zhang --- drivers/pwm/pwm-meson.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index ea96c5973488..6abc823745e4 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -462,6 +462,35 @@ static int meson_pwm_init_channels_meson8b_v2(struct p= wm_chip *chip) return meson_pwm_init_clocks_meson8b(chip, mux_parent_data); } =20 +static int meson_pwm_init_channels_meson_s4(struct pwm_chip *chip) +{ + int i, ret; + struct device *dev =3D pwmchip_parent(chip); + struct device_node *np =3D dev->of_node; + struct meson_pwm *meson =3D to_meson_pwm(chip); + struct meson_pwm_channel *channel; + + for (i =3D 0; i < MESON_NUM_PWMS; i++) { + channel =3D &meson->channels[i]; + channel->clk =3D of_clk_get(np, i); + if (IS_ERR(channel->clk)) { + ret =3D PTR_ERR(channel->clk); + dev_err_probe(dev, ret, "Failed to get clk\n"); + goto err; + } + } + + return 0; + +err: + while (--i >=3D 0) { + channel =3D &meson->channels[i]; + clk_put(channel->clk); + } + + return ret; +} + static const struct meson_pwm_data pwm_meson8b_data =3D { .parent_names =3D { "xtal", NULL, "fclk_div4", "fclk_div3" }, .channels_init =3D meson_pwm_init_channels_meson8b_legacy, @@ -500,6 +529,10 @@ static const struct meson_pwm_data pwm_meson8_v2_data = =3D { .channels_init =3D meson_pwm_init_channels_meson8b_v2, }; =20 +static const struct meson_pwm_data pwm_meson_s4_data =3D { + .channels_init =3D meson_pwm_init_channels_meson_s4, +}; + static const struct of_device_id meson_pwm_matches[] =3D { { .compatible =3D "amlogic,meson8-pwm-v2", @@ -538,6 +571,10 @@ static const struct of_device_id meson_pwm_matches[] = =3D { .compatible =3D "amlogic,meson-g12a-ao-pwm-cd", .data =3D &pwm_g12a_ao_cd_data }, + { + .compatible =3D "amlogic,meson-s4-pwm", + .data =3D &pwm_meson_s4_data + }, {}, }; MODULE_DEVICE_TABLE(of, meson_pwm_matches); --=20 2.37.1 From nobody Tue Feb 10 10:54:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66BB315956F; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240424-s4-pwm-v4-2-ee22effd40d0@amlogic.com> References: <20240424-s4-pwm-v4-0-ee22effd40d0@amlogic.com> In-Reply-To: <20240424-s4-pwm-v4-0-ee22effd40d0@amlogic.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Kelvin Zhang , Junyi Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1713954523; l=5107; i=kelvin.zhang@amlogic.com; s=20240329; h=from:subject:message-id; bh=Wdbl9C4qxCA5ehEmpbCc7nMHnQDKo3VG8DPUHKZUfJI=; b=cU5Y3Hz/+DQ928ZpnIt+3BcjOuX0nYjgRDbCLkkZkeLAWxuSgXophbWkMj4vSDJtYBJn4rF3p nl06tnqdjDNC2WgqdZb9DD9UvyljBm7J+NpXbkEOqUySHJBAQsfQ51M X-Developer-Key: i=kelvin.zhang@amlogic.com; a=ed25519; pk=pgnle7HTNvnNTcOoGejvtTC7BJT30HUNXfMHRRXSylI= X-Endpoint-Received: by B4 Relay for kelvin.zhang@amlogic.com/20240329 with auth_id=148 X-Original-From: Kelvin Zhang Reply-To: kelvin.zhang@amlogic.com From: Junyi Zhao Add device nodes for PWM_AB, PWM_CD, PWM_EF, PWM_GH and PWM_IJ along with GPIO PIN configs of each channel. Signed-off-by: Junyi Zhao Signed-off-by: Kelvin Zhang --- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 207 ++++++++++++++++++++++++++= ++++ 1 file changed, 207 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dt= s/amlogic/meson-s4.dtsi index 10896f9df682..8165b263ab92 100644 --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi @@ -292,6 +292,168 @@ mux { }; }; =20 + pwm_a_pins1: pwm_a_pins1 { + mux { + groups =3D "pwm_a_d"; + function =3D "pwm_a"; + }; + }; + + pwm_a_pins2: pwm_a_pins2 { + mux { + groups =3D "pwm_a_x"; + function =3D "pwm_a"; + }; + }; + + pwm_a_pins: pwm_a_pins { + mux { + groups =3D "pwm_a_d"; + function =3D "pwm_a"; + }; + }; + + pwm_b_pins1: pwm_b_pins1 { + mux { + groups =3D "pwm_b_d"; + function =3D "pwm_b"; + }; + }; + + pwm_b_pins2: pwm_b_pins2 { + mux { + groups =3D "pwm_b_x"; + function =3D "pwm_b"; + }; + }; + + pwm_c_pins1: pwm_c_pins1 { + mux { + groups =3D "pwm_c_d"; + function =3D "pwm_c"; + }; + }; + + pwm_c_pins2: pwm_c_pins2 { + mux { + groups =3D "pwm_c_x"; + function =3D "pwm_c"; + }; + }; + + pwm_d_pins1: pwm_d_pins1 { + mux { + groups =3D "pwm_d_d"; + function =3D "pwm_d"; + }; + }; + + pwm_d_pins2: pwm_d_pins2 { + mux { + groups =3D "pwm_d_h"; + function =3D "pwm_d"; + }; + }; + + pwm_e_pins1: pwm_e_pins1 { + mux { + groups =3D "pwm_e_x"; + function =3D "pwm_e"; + drive-strength-microamp =3D <500>; + }; + }; + + pwm_e_pins2: pwm_e_pins2 { + mux { + groups =3D "pwm_e_z"; + function =3D "pwm_e"; + }; + }; + + pwm_f_pins1: pwm_f_pins1 { + mux { + groups =3D "pwm_f_x"; + function =3D "pwm_f"; + }; + }; + + pwm_f_pins2: pwm_f_pins2 { + mux { + groups =3D "pwm_f_z"; + function =3D "pwm_f"; + }; + }; + + pwm_g_pins1: pwm_g_pins1 { + mux { + groups =3D "pwm_g_d"; + function =3D "pwm_g"; + }; + }; + + pwm_g_pins2: pwm_g_pins2 { + mux { + groups =3D "pwm_g_z"; + function =3D "pwm_g"; + }; + }; + + pwm_h_pins: pwm_h_pins { + mux { + groups =3D "pwm_h"; + function =3D "pwm_h"; + }; + }; + + pwm_i_pins1: pwm_i_pins1 { + mux { + groups =3D "pwm_i_d"; + function =3D "pwm_i"; + }; + }; + + pwm_i_pins2: pwm_i_pins2 { + mux { + groups =3D "pwm_i_h"; + function =3D "pwm_i"; + }; + }; + + pwm_j_pins: pwm_j_pins { + mux { + groups =3D "pwm_j"; + function =3D "pwm_j"; + }; + }; + + pwm_a_hiz_pins: pwm_a_hiz_pins { + mux { + groups =3D "pwm_a_hiz"; + function =3D "pwm_a_hiz"; + }; + }; + + pwm_b_hiz_pins: pwm_b_hiz_pins { + mux { + groups =3D "pwm_b_hiz"; + function =3D "pwm_b_hiz"; + }; + }; + + pwm_c_hiz_pins: pwm_c_hiz_pins { + mux { + groups =3D "pwm_c_hiz"; + function =3D "pwm_b_hiz"; + }; + }; + + pwm_g_hiz_pins: pwm_g_hiz_pins { + mux { + groups =3D "pwm_g_hiz"; + function =3D "pwm_g_hiz"; + }; + }; + nand_pins: nand-pins { mux { groups =3D "emmc_nand_d0", @@ -449,6 +611,51 @@ i2c4: i2c@6e000 { status =3D "disabled"; }; =20 + pwm_ab: pwm@58000 { + compatible =3D "amlogic,meson-s4-pwm"; + reg =3D <0x0 0x58000 0x0 0x24>; + clocks =3D <&clkc_periphs CLKID_PWM_A>, + <&clkc_periphs CLKID_PWM_B>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm_cd: pwm@5a000 { + compatible =3D "amlogic,meson-s4-pwm"; + reg =3D <0x0 0x5a000 0x0 0x24>; + clocks =3D <&clkc_periphs CLKID_PWM_C>, + <&clkc_periphs CLKID_PWM_D>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm_ef: pwm@5c000 { + compatible =3D "amlogic,meson-s4-pwm"; + reg =3D <0x0 0x5c000 0x0 0x24>; + clocks =3D <&clkc_periphs CLKID_PWM_E>, + <&clkc_periphs CLKID_PWM_F>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm_gh: pwm@5e000 { + compatible =3D "amlogic,meson-s4-pwm"; + reg =3D <0x0 0x5e000 0x0 0x24>; + clocks =3D <&clkc_periphs CLKID_PWM_G>, + <&clkc_periphs CLKID_PWM_H>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm_ij: pwm@60000 { + compatible =3D "amlogic,meson-s4-pwm"; + reg =3D <0x0 0x60000 0x0 0x24>; + clocks =3D <&clkc_periphs CLKID_PWM_I>, + <&clkc_periphs CLKID_PWM_J>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + nand: nand-controller@8c800 { compatible =3D "amlogic,meson-axg-nfc"; reg =3D <0x0 0x8c800 0x0 0x100>, <0x0 0x8c000 0x0 0x4>; --=20 2.37.1