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charset="utf-8" The Starry HX83102 based mipi panel should never have been part of the boe tv101wum driver. Discussion with Doug and Linus in V1 [1], we need a separate driver to enable the hx83102 controller. In hx83102 driver, add DSI commands as macros. So it can add some panels with same control model in the future. [1]: https://lore.kernel.org/all/CACRpkdbzYZAS0=3DzBQJUC4CB2wj4s1h6n6aSAZQv= dMV95r3zRUw@mail.gmail.com Signed-off-by: Cong Yang --- drivers/gpu/drm/panel/Kconfig | 9 + drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 99 --- drivers/gpu/drm/panel/panel-himax-hx83102.c | 567 ++++++++++++++++++ 4 files changed, 577 insertions(+), 99 deletions(-) create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index d037b3b8b999..eb378c897353 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -145,6 +145,15 @@ config DRM_PANEL_LVDS handling of power supplies or control signals. It implements automatic backlight handling if the panel is attached to a backlight controller. =20 +config DRM_PANEL_HIMAX_HX83102 + tristate "himax HX83102-based panels" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y if you want to enable support for panels based on the + himax HX83102 controller. + config DRM_PANEL_HIMAX_HX83112A tristate "Himax HX83112A-based DSI panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index f156d7fa0bcc..8fa9e38382f6 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) +=3D panel-ebbg-ft871= 9.o obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) +=3D panel-elida-kd35t133.o obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) +=3D panel-feixin-k101-im2ba02= .o obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) +=3D panel-feiyang-fy07024= di26a30d.o +obj-$(CONFIG_DRM_PANEL_HIMAX_HX83102) +=3D panel-himax-hx83102.o obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) +=3D panel-himax-hx83112a.o obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) +=3D panel-himax-hx8394.o obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) +=3D panel-ilitek-ili9322.o diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/d= rm/panel/panel-boe-tv101wum-nl6.c index 0ffe8f8c01de..11c1c56145c8 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -1300,74 +1300,6 @@ static const struct panel_init_cmd starry_qfh032011_= 53g_init_cmd[] =3D { {}, }; =20 -static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] =3D { - _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00), - _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36,= 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11, - 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 0x33), - _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3,= 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5), - _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63,= 0x5C, 0x01, 0x9E), - _INIT_DCS_CMD(0xE9, 0xCD), - _INIT_DCS_CMD(0xBA, 0x84), - _INIT_DCS_CMD(0xE9, 0x3F), - _INIT_DCS_CMD(0xBC, 0x1B, 0x04), - _INIT_DCS_CMD(0xBE, 0x20), - _INIT_DCS_CMD(0xBF, 0xFC, 0xC4), - _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5,= 0x03), - _INIT_DCS_CMD(0xE9, 0xCC), - _INIT_DCS_CMD(0xC7, 0x80), - _INIT_DCS_CMD(0xE9, 0x3F), - _INIT_DCS_CMD(0xE9, 0xC6), - _INIT_DCS_CMD(0xC8, 0x97), - _INIT_DCS_CMD(0xE9, 0x3F), - _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01), - _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33), - _INIT_DCS_CMD(0xCC, 0x02), - _INIT_DCS_CMD(0xE9, 0xC4), - _INIT_DCS_CMD(0xD0, 0x03), - _INIT_DCS_CMD(0xE9, 0x3F), - _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF), - _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F), - _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08,= 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03, - 0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, = 0x17, 0x94, 0x07, 0x94, 0x00, 0x00), - _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,= 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A, - 0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, = 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1= 8, 0x18, 0x18, 0x18), - _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,= 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A, - 0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, = 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1= 8, 0x18, 0x18, 0x18), - _INIT_DCS_CMD(0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA,= 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, - 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, = 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0), - _INIT_DCS_CMD(0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C,= 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, - 0xAB, 0x55, 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, = 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x5= 5, 0x5C, 0x68, 0x73), - _INIT_DCS_CMD(0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A,= 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10), - _INIT_DCS_CMD(0xBD, 0x01), - _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11), - _INIT_DCS_CMD(0xCB, 0x86), - _INIT_DCS_CMD(0xD2, 0x3C, 0xFA), - _INIT_DCS_CMD(0xD3, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,= 0x0C, 0x01), - _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0,= 0x00, 0x00, 0x20, 0x40, 0x50, 0x40), - _INIT_DCS_CMD(0xBD, 0x02), - _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF,= 0xFE, 0xAA, 0xA0), - _INIT_DCS_CMD(0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03,= 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03, 0x02, 0x= 01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00), - _INIT_DCS_CMD(0xBD, 0x03), - _INIT_DCS_CMD(0xE9, 0xC6), - _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8), - _INIT_DCS_CMD(0xE9, 0x3F), - _INIT_DCS_CMD(0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA,= 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0x= FC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, - 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00), - _INIT_DCS_CMD(0xBD, 0x00), - _INIT_DCS_CMD(0xE9, 0xC4), - _INIT_DCS_CMD(0xBA, 0x96), - _INIT_DCS_CMD(0xE9, 0x3F), - _INIT_DCS_CMD(0xBD, 0x01), - _INIT_DCS_CMD(0xE9, 0xC5), - _INIT_DCS_CMD(0xBA, 0x4F), - _INIT_DCS_CMD(0xE9, 0x3F), - _INIT_DCS_CMD(0xBD, 0x00), - _INIT_DCS_CMD(0x11), - _INIT_DELAY_CMD(120), - _INIT_DCS_CMD(0x29), - {}, -}; - static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) { return container_of(panel, struct boe_panel, base); @@ -1767,34 +1699,6 @@ static const struct panel_desc starry_qfh032011_53g_= desc =3D { .lp11_before_reset =3D true, }; =20 -static const struct drm_display_mode starry_himax83102_j02_default_mode = =3D { - .clock =3D 162680, - .hdisplay =3D 1200, - .hsync_start =3D 1200 + 60, - .hsync_end =3D 1200 + 60 + 20, - .htotal =3D 1200 + 60 + 20 + 40, - .vdisplay =3D 1920, - .vsync_start =3D 1920 + 116, - .vsync_end =3D 1920 + 116 + 8, - .vtotal =3D 1920 + 116 + 8 + 12, - .type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, -}; - -static const struct panel_desc starry_himax83102_j02_desc =3D { - .modes =3D &starry_himax83102_j02_default_mode, - .bpc =3D 8, - .size =3D { - .width_mm =3D 141, - .height_mm =3D 226, - }, - .lanes =3D 4, - .format =3D MIPI_DSI_FMT_RGB888, - .mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | - MIPI_DSI_MODE_LPM, - .init_cmds =3D starry_himax83102_j02_init_cmd, - .lp11_before_reset =3D true, -}; - static int boe_panel_get_modes(struct drm_panel *panel, struct drm_connector *connector) { @@ -1970,9 +1874,6 @@ static const struct of_device_id boe_of_match[] =3D { { .compatible =3D "starry,2081101qfh032011-53g", .data =3D &starry_qfh032011_53g_desc }, - { .compatible =3D "starry,himax83102-j02", - .data =3D &starry_himax83102_j02_desc - }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, boe_of_match); diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c b/drivers/gpu/drm/= panel/panel-himax-hx83102.c new file mode 100644 index 000000000000..ac8329f89195 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c @@ -0,0 +1,567 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for panels based on Himax HX83102 controller, such as: + * + * - Starry 10.51" WUXGA MIPI-DSI panel + * + * Based on drivers/gpu/drm/panel/panel-boe-tv101wum.c + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include