From nobody Fri Dec 26 01:29:35 2025 Received: from mail-pl1-f176.google.com (mail-pl1-f176.google.com [209.85.214.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4155513E027 for ; Fri, 19 Apr 2024 23:48:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713570487; cv=none; b=Bgxk6Rfd8N5zWV/288Atc+rEJPA/s6z18j7WpWmjlmrImpdH1y0YbVgeoo1ijkj2cfpVFRuCxqWJ6IX1XgSUqiOQyzqFkq2wMqogAqjsxJZ3OrMHVXohakM5F0tEe0SjFzpttbq1ltBp2iykoXdTvzZxrej1sJLctHeyf9DWvSY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713570487; c=relaxed/simple; bh=+BS7mctHpN9iWLFPEwC2/74zIoWzY97OXSTjHAOIU1s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Aw80UxjLoe2VWpZRRdFLY3pLjCqWChjMxbcM+LqzyMSRUbg6N3JYOGeiLBpt4I3bQelRVcjzVTZVL0IYP9czqSLUkW+qYglLkfM5VELqIokjaVgCziQbyfEtoDLn0q7dbd11rA4R9lX08op8QHvZ8XpB9KiI5HfamVwQJpVO1ZU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=0O6iL23/; arc=none smtp.client-ip=209.85.214.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="0O6iL23/" Received: by mail-pl1-f176.google.com with SMTP id d9443c01a7336-1e4c4fb6af3so18678515ad.0 for ; Fri, 19 Apr 2024 16:48:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713570485; x=1714175285; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oLadZMY/1E+aj61iqE390ie32fUnJXqsMN5cFXtebck=; b=0O6iL23/oe+eBGKeMRcBL3gb3aUl9h7Q8dbdGrM2iK3QFSkNNQ/ffKNvsQheHxMRZW 11eMczk8wu0F2Ltv8hRopaualHCH2usIIDA2fHl3X9lQjOB6RqgQl1fhrQOn50T7lH85 wYmge7UNBbP93H5hYZHgOsRb/t/EpW8ovXxV3j6Hrutwfei5XWFMj0izTbTPwb78dT/D 0U4WBgwLGi7glj4uK1DgzKCJXfgLrM0w4zQcir1XwX6UaQbIFWdBZyrAvb18unMMZp/R sbSsX/UwssePCJsetUzWp1RcegAK0oh2D46W4TeNe5NDScyiRv9TBSr7bLQzrp8Xzjp8 NNsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713570485; x=1714175285; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oLadZMY/1E+aj61iqE390ie32fUnJXqsMN5cFXtebck=; b=W9CQYu5l/EFJ1RCp2sapzRTdlSqcMsLYSPaxqAFjwJSmQzufSoFN7kDo+0bjMU6M3w xVagpiuVMmK2YT66sb+q1xQksX10RRpC2pY7k0+og7y6900A8VvQsfmiSpWxT61Y2kXa nzuW1INg38tfPIw+pENuQ43pxDyKZrU6HUNgaNJOyDxQ5Wo5j5N+XMePx5dD3ggDKfaZ Vab9BJ8QiiWNwNxA/wwo1Gj3lT1lqqVWOa1emqwNupqcxb4N4qBqtEh2cm0fTCXq2gRo Sj1xBUUBz0K7Jod6bndJzUTjIT5Zhox3DvmRaFU9JH0AgQoKLuY6LKLCYU5LyqmsqkiS WmBg== X-Gm-Message-State: AOJu0YxkKSnTJ1SE8W1c+mOIIi/b1axQOysSEAz/0Ljoyg1c80EUoeNZ Y1YfSeAjCxVXdbiEjAcy5fTgbf8mW4zijwBwv5JfdNmrUnLKTHQcFYm2+mMz/qlBKUJUep2JZGb k X-Google-Smtp-Source: AGHT+IEvBph6MwRCbI7XrCelJMnCCSQbSD7j1tJCROcKUOJKQW1V7Ng3imAkSqKF24OFdFi/RyQiKw== X-Received: by 2002:a17:902:f544:b0:1e3:f622:f21a with SMTP id h4-20020a170902f54400b001e3f622f21amr10308080plf.24.1713570484830; Fri, 19 Apr 2024 16:48:04 -0700 (PDT) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id w17-20020a170902d11100b001e42f215f33sm3924017plw.85.2024.04.19.16.48.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Apr 2024 16:48:04 -0700 (PDT) From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Anup Patel , Andrew Jones , Ajay Kaher , Albert Ou , Alexandre Ghiti , samuel.holland@sifive.com, Conor Dooley , Juergen Gross , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paolo Bonzini , Paul Walmsley , Shuah Khan , virtualization@lists.linux.dev, Will Deacon , x86@kernel.org Subject: [PATCH v8 11/24] RISC-V: KVM: No need to update the counter value during reset Date: Sat, 20 Apr 2024 08:17:27 -0700 Message-Id: <20240420151741.962500-12-atishp@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240420151741.962500-1-atishp@rivosinc.com> References: <20240420151741.962500-1-atishp@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The virtual counter value is updated during pmu_ctr_read. There is no need to update it in reset case. Otherwise, it will be counted twice which is incorrect. Fixes: 0cb74b65d2e5 ("RISC-V: KVM: Implement perf support without sampling") Reviewed-by: Anup Patel Reviewed-by: Andrew Jones Signed-off-by: Atish Patra --- arch/riscv/kvm/vcpu_pmu.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c index cee1b9ca4ec4..b5159ce4592d 100644 --- a/arch/riscv/kvm/vcpu_pmu.c +++ b/arch/riscv/kvm/vcpu_pmu.c @@ -397,7 +397,6 @@ int kvm_riscv_vcpu_pmu_ctr_stop(struct kvm_vcpu *vcpu, = unsigned long ctr_base, { struct kvm_pmu *kvpmu =3D vcpu_to_pmu(vcpu); int i, pmc_index, sbiret =3D 0; - u64 enabled, running; struct kvm_pmc *pmc; int fevent_code; =20 @@ -432,12 +431,9 @@ int kvm_riscv_vcpu_pmu_ctr_stop(struct kvm_vcpu *vcpu,= unsigned long ctr_base, sbiret =3D SBI_ERR_ALREADY_STOPPED; } =20 - if (flags & SBI_PMU_STOP_FLAG_RESET) { - /* Relase the counter if this is a reset request */ - pmc->counter_val +=3D perf_event_read_value(pmc->perf_event, - &enabled, &running); + if (flags & SBI_PMU_STOP_FLAG_RESET) + /* Release the counter if this is a reset request */ kvm_pmu_release_perf_event(pmc); - } } else { sbiret =3D SBI_ERR_INVALID_PARAM; } --=20 2.34.1